HEF4069UB Hex inverter Rev. 8 -- 16 November 2011 Product data sheet 1. General description The HEF4069UB is a general purpose hex inverter. Each inverter has a single stage. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input. 2. Features and benefits Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Specified from 40 C to +85 C and 40 C to +125 C Complies with JEDEC standard JESD 13-B 3. Applications Oscillator 4. Ordering information Table 1. Ordering information All types operate from 40 C to +125 C. Type number Package Name Description Version HEF4069UBP DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1 HEF4069UBT SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 HEF4069UBTT TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 HEF4069UB NXP Semiconductors Hex inverter 5. Functional diagram 1A 2A 3A 4A 5A 6A 1 2 3 4 5 6 9 8 11 10 13 12 1Y 2Y 3Y 4Y VDD 5Y A 6Y VSS 001aag154 001aag152 Fig 1. Y Functional diagram Fig 2. Schematic diagram (one inverter) 6. Pinning information 6.1 Pinning 1A 1 14 VDD 1Y 2 13 6A 2A 3 12 6Y 2Y 4 HEF4069UB 11 5A 3A 5 10 5Y 3Y 6 9 4A VSS 7 8 4Y 001aag153 Fig 3. Pin configuration 6.2 Pin description Table 2. Pin description Symbol Pin Description 1A to 6A 1, 3, 5, 9, 11, 13 input 1Y to 6Y 2, 4, 6, 8, 10, 12 output VSS 7 ground (0 V) VDD 14 supply voltage HEF4069UB Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 16 November 2011 (c) NXP B.V. 2011. All rights reserved. 2 of 17 HEF4069UB NXP Semiconductors Hex inverter 7. Limiting values Table 3. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDD supply voltage IIK input clamping current VI input voltage IOK output clamping current II/O Conditions Min Max 0.5 VI < 0.5 V or VI > VDD + 0.5 V 0.5 +18 V 10 mA VDD + 0.5 V - 10 mA input/output current - 10 mA IDD supply current - 50 mA Tstg storage temperature 65 +150 C Tamb ambient temperature 40 +125 C Ptot total power dissipation P power dissipation VO < 0.5 V or VO > VDD + 0.5 V Unit Tamb = 40 C to +125 C DIP14 [1] - 750 mW SO14 [2] - 500 mW TSSOP14 [3] - 500 mW - 100 mW per output [1] For DIP14 packages: above Tamb = 70 C, Ptot derates linearly with 12 mW/K. [2] For SO14 packages: above Tamb = 70 C, Ptot derates linearly with 8 mW/K. [3] For TSSOP14 packages: above Tamb = 60 C, Ptot derates linearly with 5.5 mW/K. 8. Recommended operating conditions Table 4. Recommended operating conditions Symbol Parameter VDD supply voltage 3 VI input voltage 0 Tamb ambient temperature 40 - HEF4069UB Product data sheet Conditions in free air All information provided in this document is subject to legal disclaimers. Rev. 8 -- 16 November 2011 Min Typ Max Unit - 15 V - VDD V +125 C (c) NXP B.V. 2011. All rights reserved. 3 of 17 HEF4069UB NXP Semiconductors Hex inverter 9. Static characteristics Table 5. Static characteristics VSS = 0 V; VI = VSS or VDD; unless otherwise specified. Symbol Parameter VIH VIL VOH VOL IOH IOL HIGH-level input voltage LOW-level input voltage Conditions IO < 1 A IO < 1 A HIGH-level IO < 1 A output voltage LOW-level IO < 1 A output voltage VDD Tamb = 40 C Tamb = +25 C Tamb = +85 C Tamb = +125 C Unit Min Max Min Max Min Max Min Max 5V 4 - 4 - 4 - 4 - V 10 V 8 - 8 - 8 - 8 - V 15 V 12.5 - 12.5 - 12.5 - 12.5 - V 5V - 1 - 1 - 1 - 1 V 10 V - 2 - 2 - 2 - 2 V 15 V - 2.5 - 2.5 - 2.5 - 2.5 V 5V 4.95 - 4.95 - 4.95 - 4.95 - V 10 V 9.95 - 9.95 - 9.95 - 9.95 - V 15 V 14.95 - 14.95 - 14.95 - 14.95 - V 5V - 0.05 - 0.05 - 0.05 - 0.05 V 10 V - 0.05 - 0.05 - 0.05 - 0.05 V 15 V - 0.05 - 0.05 - 0.05 - 0.05 V mA HIGH-level VO = 2.5 V output current V = 4.6 V O 5V - 1.7 - 1.4 - 1.1 - 1.1 5V - 0.64 - 0.5 - 0.36 - 0.36 mA VO = 9.5 V 10 V - 1.6 - 1.3 - 0.9 - 0.9 mA VO = 13.5 V 15 V - 4.2 - 3.4 - 2.4 - 2.4 mA LOW-level VO = 0.4 V output current V = 0.5 V O 5V 0.64 - 0.5 - 0.36 - 0.36 - mA 10 V 1.6 - 1.3 - 0.9 - 0.9 - mA VO = 1.5 V 15 V 4.2 - 3.4 - 2.4 - 2.4 - mA A II input leakage current 15 V - 0.1 - 0.1 - 1.0 - 1.0 IDD 5V supply current all valid input combinations; 10 V IO = 0 A 15 V - 0.25 - 0.25 - 7.5 - 7.5 A - 0.5 - 0.5 - 15.0 - 15.0 A - 1.0 - 1.0 - 30.0 - 30.0 A - - - 7.5 - - - - CI input capacitance HEF4069UB Product data sheet digital inputs All information provided in this document is subject to legal disclaimers. Rev. 8 -- 16 November 2011 pF (c) NXP B.V. 2011. All rights reserved. 4 of 17 HEF4069UB NXP Semiconductors Hex inverter 10. Dynamic characteristics Table 6. Dynamic characteristics Tamb = 25 C; for waveforms see Figure 4; for test circuit see Figure 5. Symbol Parameter HIGH to LOW propagation delay tPHL tPLH tTHL [1] nA to nY; LOW to HIGH propagation delay nA to nY HIGH to LOW output transition time output nY LOW to HIGH output transition time tTLH Conditions output nY Extrapolation formula[1] Min Typ Max 5V 18 ns + (0.55 ns/pF)CL - 45 90 ns 10 V 9 ns + (0.23 ns/pF)CL - 20 40 ns 15 V 7 ns + (0.16 ns/pF)CL - 15 25 ns 5V 13 ns + (0.55 ns/pF)CL - 40 80 ns 10 V 9 ns + (0.23 ns/pF)CL - 20 40 ns 15 V 7 ns + (0.16 ns/pF)CL - 15 30 ns 5V 10 ns + (1.00 ns/pF)CL - 60 120 ns 10 V 9 ns + (0.42 ns/pF)CL - 30 60 ns 15 V 6 ns + (0.28 ns/pF)CL - 20 40 ns VDD Unit 5V 10 ns + (1.00 ns/pF)CL - 60 120 ns 10 V 9 ns + (0.42 ns/pF)CL - 30 60 ns 15 V 6 ns + (0.28 ns/pF)CL - 20 40 ns The typical value of the propagation delay and output transition time can be calculated with the extrapolation formula (CL in pF). Table 7. Dynamic power dissipation VSS = 0 V; tr = tf 20 ns; Tamb = 25 C. Symbol Parameter PD dynamic power dissipation VDD Typical formula Where 5 V PD = 600 fi + (fo CL) VDD (W) 2 10 V PD = 4000 fi + (fo CL) VDD2 (W) fi = input frequency in MHz; fo = output frequency in MHz; 15 V PD = 22000 fi + (fo CL) VDD (W) CL = output load capacitance in pF; (fo CL) = sum of the outputs; 2 VDD = supply voltage in V. HEF4069UB Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 16 November 2011 (c) NXP B.V. 2011. All rights reserved. 5 of 17 HEF4069UB NXP Semiconductors Hex inverter 11. Waveforms tr VI 90 % VM input 0V tf 10 % tPHL VOH tPLH 90 % VM output 10 % VOL tTLH 001aag185 tTHL Measurement points: VM = 0.5VDD. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 4. Propagation delay and transition times VDD VI VO G DUT CL RT 001aag182 Definitions for test circuit: CL = load capacitance including jig and probe capacitance; RT = termination resistance should be equal to the output impedance Zo of the pulse generator; For test data refer to Table 8. Fig 5. Test circuit for measuring switching times Table 8. Test data Supply voltage Input VDD VI tr, tf CL 5 V to 15 V VSS or VDD 20 ns 50 pF HEF4069UB Product data sheet Load All information provided in this document is subject to legal disclaimers. Rev. 8 -- 16 November 2011 (c) NXP B.V. 2011. All rights reserved. 6 of 17 HEF4069UB NXP Semiconductors Hex inverter 11.1 Transfer characteristics 001aag159 5.0 500 VO (V) 250 (2) (1) 0 ID (mA) 5 5 (2) (2) 0 5.0 0 2.5 10 VO (V) ID (A) 2.5 001aag160 10 (1) (2) 0 0 0 5 VI (V) 10 VI (V) a. VDD = 5 V; IO = 0 A b. VDD = 10 V; IO = 0 A 001aag161 20 20 VO (V) ID (mA) 10 10 (2) (1) (2) 0 0 0 10 20 VI (V) c. VDD = 15 V; IO = 0 A (1) VO = output voltage. (2) ID = drain current. Fig 6. Typical transfer characteristics HEF4069UB Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 16 November 2011 (c) NXP B.V. 2011. All rights reserved. 7 of 17 HEF4069UB NXP Semiconductors Hex inverter 12. Application information Some examples of applications for the HEF4069UB. Figure 7 shows an astable relaxation oscillator using two HEF4069UB inverters and 2 BAW62 diodes. The oscillation frequency is mainly determined by R1 C1, provided R1 << R2 and R2 C2 << R1 C1. The function of R2 is to minimize the influence of the forward voltage across the protection diodes on the frequency; C2 is a stray (parasitic) capacitance. The period Tp is given by Tp = T1 + T2, where: V DD + V ST T 1 = R1C1In ------------------------V ST 2V DD - V ST T 2 = R1C1In ---------------------------V DD - V ST VST = the signal threshold level of the inverter. The period is fairly independent of VDD, VST and temperature. The duty factor, however, is influenced by VST. VDD VDD A 1/6 HEF4069UB D 1/6 HEF4069UB A B 0V VDD C2 VSS R1 R2 C1 B 0V C 1.5VDD VDD 0.5VDD C 0V -0.5VDD VDD 0.5VDD D 0V forward voltage clamping diode Fig 7. 001aag162 Astable relaxation oscillator HEF4069UB Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 16 November 2011 (c) NXP B.V. 2011. All rights reserved. 8 of 17 HEF4069UB NXP Semiconductors Hex inverter Figure 8 shows a crystal oscillator for frequencies up to 10 MHz using two HEF4069UB inverters. The second inverter amplifies the oscillator output voltage to a level sufficient to drive other Local Oxidation CMOS (LOCMOS) circuits. 22 pF 1 M 1 M 2 MHz 2.2 k 100 pF 22 pF 1/6 HEF4069UB 1/6 HEF4069UB 001aag155 The output inverter is used to amplify the oscillator output voltage to a level sufficient to drive other LOCMOS circuits. Fig 8. Crystal oscillator Figure 9 and Figure 10 show voltage gain and supply current. Figure 11 shows the test set-up and an example of an analog amplifier using one HEF4069UB. 001aag156 75 001aag157 20 IDD (mA) gain (VO/VI) 15 50 typ typ 10 25 5 0 0 0 5 10 15 0 VDD (V) Fig 9. 5 10 15 VDD (V) Typical voltage gain as a function of supply voltage Fig 10. Typical supply current as a function of supply voltage 330 k 1/6 HEF4069UB 001aag158 Fig 11. Test set-up HEF4069UB Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 16 November 2011 (c) NXP B.V. 2011. All rights reserved. 9 of 17 HEF4069UB NXP Semiconductors Hex inverter Figure 12 shows typical forward transconductance and Figure 13 shows the test set-up. 001aag164 10 gfs (mA/V) (1) 7.5 (2) Rbias = 560 k 5.0 (3) VDD 2.5 0.47 F input output Vi 0 0 5 10 100 F A Io VSS 15 VDD (V) 001aag163 (1) Average +2; where: `' is the standard deviation. (2) Average. (3) Average 2; where: `' is the standard deviation. dI g fs = -------o- at VO is constant. dV i fi.= 1 kHz Fig 12. Typical forward transconductance as a function of supply voltage at Tamb = 25 C HEF4069UB Product data sheet Fig 13. Test set-up All information provided in this document is subject to legal disclaimers. Rev. 8 -- 16 November 2011 (c) NXP B.V. 2011. All rights reserved. 10 of 17 HEF4069UB NXP Semiconductors Hex inverter 13. Package outline DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1 ME seating plane D A2 A A1 L c e Z w M b1 (e 1) b MH 8 14 pin 1 index E 1 7 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.2 0.51 3.2 1.73 1.13 0.53 0.38 0.36 0.23 19.50 18.55 6.48 6.20 2.54 7.62 3.60 3.05 8.25 7.80 10.0 8.3 0.254 2.2 inches 0.17 0.02 0.13 0.068 0.044 0.021 0.015 0.014 0.009 0.77 0.73 0.26 0.24 0.1 0.3 0.14 0.12 0.32 0.31 0.39 0.33 0.01 0.087 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT27-1 050G04 MO-001 SC-501-14 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-13 Fig 14. Package outline SOT27-1 (DIP14) HEF4069UB Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 16 November 2011 (c) NXP B.V. 2011. All rights reserved. 11 of 17 HEF4069UB NXP Semiconductors Hex inverter SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index Lp 1 L 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.35 0.014 0.0075 0.34 0.16 0.15 0.010 0.057 inches 0.069 0.004 0.049 0.05 0.244 0.039 0.041 0.228 0.016 0.028 0.024 0.01 0.01 0.028 0.004 0.012 8o o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT108-1 076E06 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 15. Package outline SOT108-1 (SO14) HEF4069UB Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 16 November 2011 (c) NXP B.V. 2011. All rights reserved. 12 of 17 HEF4069UB NXP Semiconductors Hex inverter TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 E D A X c y HE v M A Z 8 14 Q (A 3) A2 A A1 pin 1 index Lp L 1 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.72 0.38 8o o 0 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT402-1 REFERENCES IEC JEDEC JEITA MO-153 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 Fig 16. Package outline SOT402-1 (TSSOP14) HEF4069UB Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 16 November 2011 (c) NXP B.V. 2011. All rights reserved. 13 of 17 HEF4069UB NXP Semiconductors Hex inverter 14. Revision history Table 9. Revision history Document ID Release date Data sheet status Change notice Supersedes HEF4069UB v.8 20111116 Product data sheet - HEF4069UB v.7 Modifications: * * Legal pages updated. Changes in "General description", "Features and benefits" and "Applications". HEF4069UB v.7 20110511 Product data sheet - HEF4069UB v.6 HEF4069UB v.6 20091208 Product data sheet - HEF4069UB v.5 HEF4069UB v.5 20090723 Product data sheet - HEF4069UB v.4 HEF4069UB v.4 20080704 Product data sheet - HEF4069UB_CNV v.3 HEF4069UB_CNV v.3 19950101 Product specification - HEF4069UB_CNV v.2 HEF4069UB_CNV v.2 19950101 Product specification - - HEF4069UB Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 16 November 2011 (c) NXP B.V. 2011. All rights reserved. 14 of 17 HEF4069UB NXP Semiconductors Hex inverter 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term `short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 15.2 Definitions Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification -- The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 15.3 Disclaimers Limited warranty and liability -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors' aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer's sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer's applications and products planned, as well as for the planned application and use of customer's third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer's applications or products, or the application or use by customer's third party customer(s). Customer is responsible for doing all necessary testing for the customer's applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer's third party customer(s). NXP does not accept any liability in this respect. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. 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No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or Export control -- This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. HEF4069UB Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 16 November 2011 (c) NXP B.V. 2011. All rights reserved. 15 of 17 HEF4069UB NXP Semiconductors Hex inverter Non-automotive qualified products -- Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. NXP Semiconductors' specifications such use shall be solely at customer's own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors' standard warranty and NXP Semiconductors' product specifications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors' warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com HEF4069UB Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 -- 16 November 2011 (c) NXP B.V. 2011. All rights reserved. 16 of 17 HEF4069UB NXP Semiconductors Hex inverter 17. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 11.1 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Recommended operating conditions. . . . . . . . 3 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Transfer characteristics . . . . . . . . . . . . . . . . . . 7 Application information. . . . . . . . . . . . . . . . . . . 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Contact information. . . . . . . . . . . . . . . . . . . . . 16 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'. (c) NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 16 November 2011 Document identifier: HEF4069UB