CGS2535V/CGS2535TV Commercial Quad 1 to 4 Clock Drivers/Industrial Quad 1 to 4 Clock Drivers General Description These Clock Generation and Support clock drivers are specifically designed for driving memory arrays requiring large fanouts while operating at high speeds. The CGS2535 is a non-inverting 4 to 16 driver with CMOS I/O structures. The CGS2535 specification guarantees partto-part skew variation. Features n Guaranteed: -- 1.0 ns rise and fall times while driving 12 inches of 50 microstrip terminated with 25 pF -- 350 ps pin-to-pin skew (tOSLH and tOSHL) n 650 ps part-to-part variation on positive or negative transition @ 5V VCC n Operates with either 3.3V or 5.0V supply n Inputs 5V tolerant with VCC in 3.3V range n Symmetric output current drive: 24 mA IOH/IOL n Industrial temperature range -40C to +85C n Symmetric package orientation n Large fanout for memory driving applications n Guaranteed 2 kV ESD protection n Implemented on National's ABT family process n 28-pin PLCC for optimum skew performance Ordering Information Order Number Package Number Package Description CGS2535V CGS2535TV V28A 28-Lead Molded Plastic Leaded Chip Carrier Device also available in Tape and Reel. Specify by appending suffix letter "X" to the order number. Connection Diagrams Pin Assignment for 28-Pin PLCC CGS2535 01195405 01195402 Truth Table Input Output In (0-3) ABCD Out (0-3) (c) 2004 National Semiconductor Corporation DS011954 www.national.com CGS2535V Commercial Quad 1 to 4 Clock Drivers/CGS2535TV Industrial Quad 1 to 4 Clock Drivers February 2004 CGS2535V/CGS2535TV Absolute Maximum Ratings (Note 1) Supply Voltage (VCC) Input Voltage (VI) Input Current 7.0V Recommended Operating Conditions 7.0V Supply Voltage VCC 4.75V to 5.25V -30 mA VCC 3.0V to 3.6V Current Applied to Output (High/Low) Maximum Input Rise/Fall Time Twice the Rated IOH/IOL Operating Temp. Industrial grade (0.8V to 2.0V) Free Air Operating Temperature -40C to +85C Comm. grade Commercial 0C to +70C Storage Temperature Range Typical JA 0 LFM 62C/W 225 LFM 43C/W 500 LFM 34C/W 900 LFM 27C/W 0C to + 70C Industrial -65C to +150C Airflow 5 ns -40C to + 85C Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the DC and AC Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The Recommended Operating Conditions will define the conditions for actual device operation. DC Electrical Characteristics Over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25C. Symbol VIH VIL Parameter Conditions Input High Level Voltage Input Low Level Voltage VCC (V) Min 3.0 2.1 4.5 3.15 5.5 3.85 0.9 1.35 5.5 1.65 Input Clamp Voltage II = -18 mA 4.5 High Level Output Voltage IOH = -50 A 3.0 2.9 4.5 4.4 5.5 5.4 Low Level Output Voltage IOL = 50 A IOL = 24 mA -1.2 3.0 2.46 4.5 3.76 5.5 4.76 3.0 0.1 4.5 0.1 5.5 0.1 3.0 0.44 4.5 0.44 5.5 0.44 VIH = 7V 5.5 7 VIH = VCC 3.6 1 IIH High Level Input Current VIH = VCC 5.5 IIL Low Level Input Current VIL = 0V 5.5 IOLD Minimum Dynamic Output Current (Note 2) VOLD = 1.65V (max) VOLD = 0.9V (max) Minimum Dynamic Output Current (Note 2) VOHD = 3.85V (min) 5.5 -75 VOHD = 2.1V (min) 3.0 (Note 3) -25 CIN Supply Current Input Capacitance Note 3: At VCC = 3.3V, IOLD = 55 mA min; @ VCC = 3.6V, IOLD = 64 mA min At VCC = 3.3V, IOHD = -58 mA min; @ VCC = 3.6V, IOHD = -66 mA min www.national.com 2 5 V V A A -5 A 5.5 75 mA 3.0 (Note 3) 36 mA 3.6 75 5.5 235 5.0 Note 2: Maximum test duration 2.0 ms, one output loaded at a time. V V Input Current @ Max Input Voltage ICC V V II IOHD Units V 4.5 VOH VOL Max 3.0 VIK IOH = -24 mA Typ 5 A pF Over recommended operating free air temperature specified. All typical values are measured at VCC = 5V, TA = 25C. CGS2535 Symbol Parameter VCC TA = +25C (V) CL = 50 pF, RL = 500 TA = -40C to +85C (Note 11) Units (Note 7) CL = 50 pF, RL = 500 Min Typ Max Min Typ Max fmax Frequency Maximum 3.0 tPLH Low-to-High Propagation Delay 3.3 4.5 2.5 4.5 CK to On @ 1 MHz (Note 13) 5.0 3.5 2.0 3.5 High-to-Low Propagation Delay 3.3 4.5 2.5 4.5 CK to On @ 1 MHz (Note 13) 5.0 3.5 2.0 3.5 Low-to-High Propagation Delay 3.3 5.0 2.5 5.0 CK to On @ 66.67 MHz (Note 13) (Note 14) 5.0 4.5 2.0 4.5 High-to-Low Propagation Delay 3.3 5.0 2.5 5.0 CK to On @ 66.67 MHz (Note 13) (Note 14) 5.0 4.5 2.0 4.5 Maximum Skew Common Edge 3.3 150 350 300 350 Output-to-Output Variation 5.0 150 350 300 350 Maximum Skew Common Edge 3.3 150 350 300 350 Output-to-Output Variation 5.0 150 350 300 350 100 5.0 tPHL tPLH tPHL tOSLH MHz 125 ns ns ns ns ps (Note 4) (Note 6) tOSHL ps (Note 4) (Note 6) trise, Rise/Fall Time 3.3 3.5 3.5 tfall (from 0.8V/2.0V to 2.0V/0.8V) (Note 8) 5.0 3.0 3.0 ns trise, Rise/Fall Time 3.3 0.8 1.0 tfall (from 0.8V/2.0V to 2.0V/0.8V) (Note 9) (Note 14) 5.0 0.4 0.6 trise, Rise/Fall Time 3.3 1.0 1.0 tfall (from 0.8V/2.0V to 2.0V/0.8V) (Note 10) (Note 14) 5.0 0.7 0.9 tHigh Pulse Width Duration High 3.3 4.0 4.0 (Note 5) (Note 6) (Note 14) 5.0 4.0 4.0 Pulse Width Duration Low 3.3 4.0 4.0 (Note 5) (Note 6) (Note 14) 5.0 4.0 Part-to-Part Variation of 3.3 650 1.0 ns Low-to-High Transitions 5.0 650 650 ps Part-to-Part Variation of 3.3 650 1.0 ns High-to-Low Transitions 5.0 650 650 ps Part-to-Part Variation of 3.3 1.0 1.0 Low-to-High Transitions 5.0 1.0 1.0 Part-to-Part Variation of 3.3 1.0 1.0 High-to-Low Transitions 5.0 1.0 1.0 tLow tPVLH ns ns ns 4.0 @ 1 MHz (Note 13) tPVHL @ 1 MHz (Note 13) tPVLH @ 66.67 MHz (Note 13) (Note 14) tPVHL ns @ 66.67 MHz (Note 13) (Note 14) Note 4: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same packaged device and output bank. The specifications apply to any outputs switching in the same direction either LOW to HIGH (tOSLH) or HIGH to LOW (tOSHL). Note 5: Time high is measured with outputs at 2.0V or above. Time low is measured with outputs at 0.8V or below. Input waveform characteristics for tHigh, tLow measurement: f = 66.67 MHz, duty cycle = 50%. 3 www.national.com CGS2535V/CGS2535TV AC Electrical Characteristics (Notes 4, 5, 6) CGS2535V/CGS2535TV AC Electrical Characteristics (Notes 4, 5, 6) (Continued) Note 6: The input waveform has a rise and fall time transition time of 2.5 ns (10% to 90%). Note 7: Industrial range (-40C to +85C) limits apply to the commercial temperature range (0C to +70C). Note 8: These Rise and Fall times are measured with CL = 50 pF, RL = 500 (see Figure 1). Note 9: These Rise and Fall times are measured with CL = 25 pF, RL = 500 (see Figure 1), and are guaranteed by design. Note 10: These Rise and Fall times are measured driving 12 inches of 50 microstrip terminated with equivalent CL = 25 pF (see Figure 2), and are guaranteed by design. Note 11: Voltage Range 5.0 is 5.0V 0.25V, 3.3 is 3.3V 0.3V. Note 12: For increased output drive, output pins may be connected together when the corresponding input pins are connected together. Note 13: All 16 outputs switching simultaneously. Note 14: Guaranteed by design. Timing Information 01195407 01195410 01195409 FIGURE 2. A.C. Load (Note 10) CL = Total Load Including Probes FIGURE 1. A.C. Load (Notes 8, 9) CL = Total Load Including Probes www.national.com 4 MEMORY ARRAY DRIVING Another feature associated with these clock drivers is a 350 ps pin-to-pin skew specification. The minimum skew specification allows high speed memory system designers to optimize the performance of their memory sub-system by operating at higher frequencies without having concerns about output-to-output (bank-to-bank) synchronization problems which are associated with driving high capacitive loads (Point B). The diagram below depicts a "2534/35/36/37" a memory subsystem operating at high speed with large memory capacity. The address bus is common to both the memory and the CPU and I/Os. In order to minimize the total load on the address bus, quite often memory arrays are driven by buffers while having the inputs of the buffers tied together. Although this practice was feasible in the conventional memory designs, in today's high speed, large buswidth designs which require address fetching at higher speeds, this technique produces many undesired results such as cross-talk and over/undershoot. CGS2534/35/36/37 Quad 1 to 4 clock drivers were designed specifically to address these application issues on high speed, large memory arrays systems. These drivers are optimized to drive large loads, with 3.5 ns propagation delays. These drivers produce less noise while reducing the total capacitive loading on the address bus by having only four inputs tied together (see the diagram below, point A). This helps to minimize the overshoot and undershoot by having only four outputs being switched simultaneously. These drivers can operate beyond 125 MHz, and are also available in 3V-5V TTL/CMOS versions with large current drive . 01195408 Device VCC I/O 2534 5 TTL Output Configuration 2535 3 or 5 CMOS Non-inverting quad 1-4 2536 3 or 5 CMOS Inverting, Non-inverting, /2 2537 5 TTL Inverting quad 1-4 Inverting quad 1-4 with series 8 output resistors 5 www.national.com CGS2535V/CGS2535TV Also this larger fan-out helps to save board space since for every one of these drivers, two conventional buffers were typically being used. CGS2534/35/36/37 CGS2535V/CGS2535TV Part Numbering Information 01195411 www.national.com 6 inches (millimeters) unless otherwise noted 28-Lead Molded Plastic Leaded Chip Carrier NS Package Number V28A LIFE SUPPORT POLICY NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. BANNED SUBSTANCE COMPLIANCE National Semiconductor certifies that the products and packing materials meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ``Banned Substances'' as defined in CSP-9-111S2. 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