High Voltage Latch-Up Proof,
4-/8-Channel Multiplexers
Enhanced Product ADG5408-EP/ADG5409-EP
Rev. 0 Document Feedback
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FEATURES
Latch-up proof
8 kV human body model (HBM) ESD rating
Low on resistance (13.5 Ω)
±9 V to ±22 V dual-supply operation
9 V to 40 V single-supply operation
Fully specified at ±15 V, ±20 V, +12 V, and +36 V
VSS to VDD analog signal range
ENHANCED PRODUCT FEATURES
Supports defense and aerospace applications
(AQEC standard)
Military temperature range: –55°C to +125°C
Controlled manufacturing baseline
One assembly/test site
One fabrication site
Enhanced product change notification
Qualification data available on request
APPLICATIONS
Relay replacement
Automatic test equipment
Data acquisition
Instrumentation
Avionics
Communication systems
FUNCTIONAL BLOCK DIAGRAMS
ADG5408-EP
S1
S8
D
ADG5409-EP
S1A
S4B
DA
DB
S4A
S1B
1-OF-4
DECODER
1-OF-8
DECODER
A0 A1 ENA0 A1 A2 EN
13397-001
Figure 1.
GENERAL DESCRIPTION
The ADG5408-EP/ADG5409-EP are monolithic CMOS analog
multiplexers comprising eight single channels and four differential
channels, respectively. The ADG5408-EP switches one of eight
inputs to a common output, as determined by the 3-bit binary
address lines, A0, A1, and A2. The ADG5409-EP switches one
of four differential inputs to a common differential output, as
determined by the 2-bit binary address lines, A0 and A1.
An EN input on both devices enables or disables the device.
When EN is disabled, all channels switch off. The on-resistance
profile is very flat over the full analog input range, which ensures
good linearity and low distortion when switching audio signals.
High switching speed also makes the parts suitable for video
signal switching.
Each switch conducts equally well in both directions when on,
and each switch has an input signal range that extends to the
power supplies. In the off condition, signal levels up to the
supplies are blocked.
The ADG5408-EP/ADG5409-EP do not have VL pins; rather, the
logic power supply is generated internally by an on-chip voltage
generator.
Additional application and technical information can be found
in the ADG5408/ADG5409 data sheet.
PRODUCT HIGHLIGHTS
1. Trench isolation guards against latch-up. A dielectric trench
separates the P and N channel transistors thereby preventing
latch-up even under severe overvoltage conditions.
2. Low RON.
3. Dual-supply operation. For applications where the analog
signal is bipolar, the ADG5408-EP/ADG5409-EP can be
operated from dual supplies up to ±22 V.
4. Single-supply operation. For applications where the analog
signal is unipolar, the ADG5408-EP/ADG5409-EP can be
operated from a single rail power supply up to 40 V.
5. 3 V logic compatible digital inputs: VINH = 2.0 V, VINL = 0.8 V.
6. No VL logic power supply required.
ADG5408-EP/ADG5409-EP Enhanced Product
Rev. 0 | Page 2 of 18
TABLE OF CONTENTS
Features .............................................................................................. 1
Enhanced Product Features ............................................................ 1
Applications ....................................................................................... 1
Functional Block Diagrams ............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
±15 V Dual Supply ....................................................................... 3
±20 V Dual Supply ....................................................................... 4
12 V Single Supply ........................................................................ 5
36 V Single Supply .........................................................................6
Continuous Current per Channel, Sx or D ................................8
Absolute Maximum Ratings ............................................................9
ESD Caution...................................................................................9
Pin Configurations and Function Descriptions ......................... 10
Typical Performance Characteristics ........................................... 12
Test Circuits ..................................................................................... 16
Outline Dimensions ....................................................................... 18
Ordering Guide .......................................................................... 18
REVISION HISTORY
9/15—Revision 0: Initial Version
Enhanced Product ADG5408-EP/ADG5409-EP
Rev. 0 | Page 3 of 18
SPECIFICATIONS
±15 V DUAL SUPPLY
VDD = +15 V ± 10%, VSS = −15 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Parameter 25°C −40°C to +85°C −55°C to +125°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range VDD to VSS V
On Resistance, RON 13.5 Ω typ VS = ±10 V, IS = −10 mA; see Figure 24
15 18 22 Ω max VDD = +13.5 V, VSS = −13.5 V
On-Resistance Match Between
Channels, ∆RON
0.3 Ω typ VS = ±10 V, IS = −10 mA
0.8 1.3 1.4 Ω max
On-Resistance Flatness, RFLAT (ON) 1.8 Ω typ VS = ±10 V, IS = −10 mA
2.2 2.6 3 Ω max
LEAKAGE CURRENTS VDD = +16.5 V, VSS = −16.5 V
Source Off Leakage, IS (Off) ±0.05 nA typ VS = ±10 V, VD = 10 V; see Figure 27
±0.25 ±1 ±7 nA max
Drain Off Leakage, ID (Off) ±0.1 nA typ VS = ±10 V, VD = 10 V; see Figure 27
±0.4 ±4 ±30 nA max
Channel On Leakage, ID (On), IS (On) ±0.1 nA typ VS = VD = ±10 V; see Figure 23
±0.4 ±4 ±30 nA max
DIGITAL INPUTS
Input High Voltage, VINH 2.0 V min
Input Low Voltage, VINL 0.8 V max
Input Current, IINL or IINH 0.002 μA typ VIN = VGND or VDD
±0.1 μA max
Digital Input Capacitance, CIN 3 pF typ
DYNAMIC CHARACTERISTICS1
Transition Time, tTRANSITION 170 ns typ RL = 300 Ω, CL = 35 pF
217 258 292 ns max VS = 10 V; see Figure 30
tON (EN) 140 ns typ RL = 300 Ω, CL = 35 pF
175 213 242 ns max VS = 10 V; see Figure 32
tOFF (EN) 130 ns typ RL = 300 Ω, CL = 35 pF
161 183 198 ns max VS = 10 V; see Figure 32
Break-Before-Make Time Delay, tD 50 ns typ RL = 300 Ω, CL = 35 pF
13 ns min VS1 = VS2 = 10 V; see Figure 31
Charge Injection, QINJ 115 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF;
see Figure 33
Off Isolation −60 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see
Figure 26
Channel-to-Channel Crosstalk −60 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see
Figure 25
Total Harmonic Distortion + Noise 0.01 % typ RL = 1 kΩ, 15 V p-p, f = 20 Hz to 20 kHz;
see Figure 28
−3 dB Bandwidth RL = 50 Ω, CL = 5 pF; see Figure 29
ADG5408-EP 50 MHz typ
ADG5409-EP 87 MHz typ
Insertion Loss 0.9 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz;
Figure 29
CS (Off) 15 pF typ VS = 0 V, f = 1 MHz
CD (Off)
ADG5408-EP 102 pF typ VS = 0 V, f = 1 MHz
ADG5409-EP 50 pF typ VS = 0 V, f = 1 MHz
ADG5408-EP/ADG5409-EP Enhanced Product
Rev. 0 | Page 4 of 18
Parameter 25°C −40°C to +85°C −55°C to +125°C Unit Test Conditions/Comments
CD (On), CS (On)
ADG5408-EP 133 pF typ VS = 0 V, f = 1 MHz
ADG5409-EP 81 pF typ VS = 0 V, f = 1 MHz
POWER REQUIREMENTS VDD = +16.5 V, VSS = −16.5 V
IDD 45 μA typ Digital inputs = 0 V or VDD
55 80 μA max
ISS 0.001 μA typ Digital inputs = 0 V or VDD
1 μA max
VDD/VSS ±9/±22 V min/V max GND = 0 V
1 Guaranteed by design; not subject to production test.
±20 V DUAL SUPPLY
VDD = +20 V ± 10%, VSS = −20 V ± 10%, GND = 0 V, unless otherwise noted.
Table 2.
Parameter 25°C −40°C to +85°C −55°C to +125°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range VDD to VSS V
On Resistance, RON 12.5 Ω typ VS = ±15 V, IS = −10 mA; see Figure 24
14 17 21 Ω max VDD = +18 V, VSS = −18 V
On-Resistance Match Between
Channels, ∆RON
0.3 Ω typ VS = ±15 V, IS = −10 mA
0.8 1.3 1.4 Ω max
On-Resistance Flatness, RFLAT (ON) 2.3 Ω typ VS = ±15 V, IS = −10 mA
2.7 3.1 3.5 Ω max
LEAKAGE CURRENTS VDD = +22 V, VSS = −22 V
Source Off Leakage, IS (Off) ±0.1 nA typ VS = ±15 V, VD = 15 V; see Figure 27
±0.25 ±1 ±7 nA max
Drain Off Leakage, ID (Off) ±0.15 nA typ VS = ±15 V, VD = 15 V; see Figure 27
±0.4 ±4 ±30 nA max
Channel On Leakage, ID (On), IS (On) ±0.15 nA typ VS = VD = ±15 V; see Figure 23
±0.4 ±4 ±30 nA max
DIGITAL INPUTS
Input High Voltage, VINH 2.0 V min
Input Low Voltage, VINL 0.8 V max
Input Current, IINL or IINH 0.002 μA typ VIN = VGND or VDD
±0.1 μA max
Digital Input Capacitance, CIN 3 pF typ
DYNAMIC CHARACTERISTICS1
Transition Time, tTRANSITION 160 ns typ RL = 300 Ω, CL = 35 pF
207 237 262 ns max VS = 10 V; see Figure 30
tON (EN) 140 ns typ RL = 300 Ω, CL = 35 pF
165 194 218 ns max VS = 10 V; see Figure 32
tOFF (EN) 133 ns typ RL = 300 Ω, CL = 35 pF
153 174 189 ns max VS = 10 V; see Figure 32
Break-Before-Make Time Delay, tD 38 ns typ RL = 300 Ω, CL = 35 pF
8 ns min VS1 = VS2 = 10 V; see Figure 31
Charge Injection, QINJ 155 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see
Figure 33
Off Isolation −60 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see
Figure 26
Channel-to-Channel Crosstalk −60 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz;
see Figure 25
Enhanced Product ADG5408-EP/ADG5409-EP
Rev. 0 | Page 5 of 18
Parameter 25°C −40°C to +85°C −55°C to +125°C Unit Test Conditions/Comments
Total Harmonic Distortion + Noise 0.012 % typ RL = 1 kΩ, 20 V p-p, f = 20 Hz to 20 kHz;
see Figure 28
−3 dB Bandwidth RL = 50 Ω, CL = 5 pF; see Figure 29
ADG5408-EP 50 MHz typ
ADG5409-EP 88 MHz typ
Insertion Loss 0.8 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz;
see Figure 29
CS (Off) 17 pF typ VS = 0 V, f = 1 MHz
CD (Off)
ADG5408-EP 98 pF typ VS = 0 V, f = 1 MHz
ADG5409-EP 48 pF typ VS = 0 V, f = 1 MHz
CD (On), CS (On)
ADG5408-EP 128 pF typ VS = 0 V, f = 1 MHz
ADG5409-EP 80 pF typ VS = 0 V, f = 1 MHz
POWER REQUIREMENTS VDD = +22 V, VSS = −22 V
IDD 50 μA typ Digital inputs = 0 V or VDD
70 120 μA max
ISS 0.001 μA typ Digital inputs = 0 V or VDD
1 μA max
VDD/VSS ±9/±22 V min/V max GND = 0 V
1 Guaranteed by design; not subject to production test.
12 V SINGLE SUPPLY
VDD = 12 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 3.
Parameter 25°C −40°C to +85°C −55°C to +125°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to VDD V
On Resistance, RON 26 Ω typ
VS = 0 V to 10 V, IS = −10 mA; see
Figure 24
30 36 42 Ω max VDD = 10.8 V, VSS = 0 V
On-Resistance Match Between
Channels, ∆RON
0.3 Ω typ VS = 0 V to 10 V, IS = −10 mA
1 1.5 1.6 Ω max
On-Resistance Flatness, RFLAT (ON) 5.5 Ω typ VS = 0 V to 10 V, IS = −10 mA
6.5 8 12 Ω max
LEAKAGE CURRENTS VDD = 13.2 V, VSS = 0 V
Source Off Leakage, IS (Off) ±0.02 nA typ VS = 1 V/10 V, VD = 10 V/1 V; see
Figure 27
±0.25 ±1 ±7 nA max
Drain Off Leakage, ID (Off) ±0.05 nA typ VS = 1 V/10 V, VD = 10 V/1 V; see
Figure 27
±0.4 ±4 ±30 nA max
Channel On Leakage, ID (On), IS (On) ±0.05 nA typ VS = VD = 1 V/10 V; see Figure 23
±0.4 ±4 ±30 nA max
DIGITAL INPUTS
Input High Voltage, VINH 2.0 V min
Input Low Voltage, VINL 0.8 V max
Input Current, IINL or IINH 0.002 μA typ VIN = VGND or VDD
±0.1 μA max
Digital Input Capacitance, CIN 3 pF typ
ADG5408-EP/ADG5409-EP Enhanced Product
Rev. 0 | Page 6 of 18
Parameter 25°C −40°C to +85°C −55°C to +125°C Unit Test Conditions/Comments
DYNAMIC CHARACTERISTICS1
Transition Time, tTRANSITION 230 ns typ RL = 300 Ω, CL = 35 pF
321 388 430 ns max VS = 8 V; see Figure 30
tON (EN) 215 ns typ RL = 300 Ω, CL = 35 pF
276 345 397 ns max VS = 8 V; see Figure 32
tOFF (EN) 134 ns typ RL = 300 Ω, CL = 35 pF
161 187 209 ns max VS = 8 V; see Figure 32
Break-Before-Make Time Delay, tD 118 ns typ RL = 300 Ω, CL = 35 pF
44 ns min VS1 = VS2 = 8 V; see Figure 31
Charge Injection, QINJ 45 pC typ VS = 6 V, RS = 0 Ω, CL = 1 nF; see
Figure 33
Off Isolation −60 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz;
see Figure 26
Channel-to-Channel Crosstalk −60 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz;
see Figure 25
Total Harmonic Distortion + Noise 0.1 % typ RL = 1 kΩ, 6 V p-p, f = 20 Hz to 20 kHz;
see Figure 28
−3 dB Bandwidth RL = 50 Ω, CL = 5 pF; see Figure 29
ADG5408-EP 35 MHz typ
ADG5409-EP 74 MHz typ
Insertion Loss −1.8 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz;
see Figure 29
CS (Off) 22 pF typ VS = 6 V, f = 1 MHz
CD (Off)
ADG5408-EP 119 pF typ VS = 6 V, f = 1 MHz
ADG5409-EP 59 pF typ VS = 6 V, f = 1 MHz
CD (On), CS (On)
ADG5408-EP 146 pF typ VS = 6 V, f = 1 MHz
ADG5409-EP 86 pF typ VS = 6 V, f = 1 MHz
POWER REQUIREMENTS VDD = 13.2 V
IDD 40 μA typ Digital inputs = 0 V or VDD
50 75 μA max
VDD 9/40 V min/V max GND = 0 V, VSS = 0 V
1 Guaranteed by design; not subject to production test.
36 V SINGLE SUPPLY
VDD = 36 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 4.
Parameter 25°C −40°C to +85°C −55°C to +125°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range 0 V to VDD V
On Resistance, RON 14.5 Ω typ
VS = 0 V to 30 V, IS = −10 mA; see
Figure 24
16 19 23 Ω max VDD = 32.4 V, VSS = 0 V
On-Resistance Match Between
Channels, ∆RON
0.3 Ω typ VS = 0 V to 30 V, IS = −10 mA
0.8 1.3 1.4 Ω max
On-Resistance Flatness, RFLAT (ON) 3.5 Ω typ VS = 0 V to 30 V, IS = −10 mA
4.3 5.5 6.5 Ω max
Enhanced Product ADG5408-EP/ADG5409-EP
Rev. 0 | Page 7 of 18
Parameter 25°C −40°C to +85°C −55°C to +125°C Unit Test Conditions/Comments
LEAKAGE CURRENTS VDD =39.6 V, VSS = 0 V
Source Off Leakage, IS (Off) ±0.1 nA typ VS = 1 V/30 V, VD = 30 V/1 V; see
Figure 27
±0.25 ±1 ±7 nA max
Drain Off Leakage, ID (Off) ±0.15 nA typ VS = 1 V/30 V, VD = 30 V/1 V; see
Figure 27
±0.4 ±4 ±30 nA max
Channel On Leakage, ID (On), IS (On) ±0.15 nA typ VS = VD = 1 V/30 V; see Figure 23
±0.4 ±4 ±30 nA max
DIGITAL INPUTS
Input High Voltage, VINH 2.0 V min
Input Low Voltage, VINL 0.8 V max
Input Current, IINL or IINH 0.002 μA typ VIN = VGND or VDD
±0.1 μA max
Digital Input Capacitance, CIN 3 pF typ
DYNAMIC CHARACTERISTICS1
Transition Time, tTRANSITION 187 ns typ RL = 300 Ω, CL = 35 pF
242 257 281 ns max VS = 18 V; see Figure 30
tON (EN) 160 ns typ RL = 300 Ω, CL = 35 pF
195 219 237 ns max VS = 18 V; see Figure 32
tOFF (EN) 147 ns typ RL = 300 Ω, CL = 35 pF
184 184 190 ns max VS = 18 V; see Figure 32
Break-Before-Make Time Delay, tD 53 ns typ RL = 300 Ω, CL = 35 pF
14 ns min VS1 = VS2 = 18 V; see Figure 31
Charge Injection, QINJ 150 pC typ VS = 18 V, RS = 0 Ω, CL = 1 nF;
see Figure 33
Off Isolation −60 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz;
see Figure 26
Channel-to-Channel Crosstalk −60 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz;
see Figure 25
Total Harmonic Distortion + Noise 0.4 % typ RL = 1 kΩ, 18 V p-p, f = 20 Hz to 20 kHz;
see Figure 28
−3 dB Bandwidth RL = 50 Ω, CL = 5 pF; see Figure 29
ADG5408-EP 45 MHz typ
ADG5409-EP 76 MHz typ
Insertion Loss −1 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz;
see Figure 29
CS (Off) 18 pF typ VS = 18 V, f = 1 MHz
CD (Off)
ADG5408-EP 120 pF typ VS = 18 V, f = 1 MHz
ADG5409-EP 60 pF typ VS = 18 V, f = 1 MHz
CD (On), CS (On)
ADG5408-EP 137 pF typ VS = 18 V, f = 1 MHz
ADG5409-EP 80 pF typ VS = 18 V, f = 1 MHz
POWER REQUIREMENTS VDD = 39.6 V
IDD 80 μA typ Digital inputs = 0 V or VDD
100 155 μA max
VDD 9/40 V min/V max GND = 0 V, VSS = 0 V
1 Guaranteed by design; not subject to production test.
ADG5408-EP/ADG5409-EP Enhanced Product
Rev. 0 | Page 8 of 18
CONTINUOUS CURRENT PER CHANNEL, Sx OR D
Table 5. ADG5408-EP
Parameter 25°C 85°C 125°C Unit
CONTINUOUS CURRENT, Sx OR D (θJA = 30.4°C/W)
VDD = +15 V, VSS = −15 V 207 113 60 mA maximum
VDD = +20 V, VSS = −20 V 218 117 61 mA maximum
VDD = 12 V, VSS = 0 V 168 99 57 mA maximum
VDD = 36 V, VSS = 0 V 214 116 61 mA maximum
Table 6. ADG5409-EP
Parameter 25°C 85°C 125°C Unit
CONTINUOUS CURRENT, Sx OR D (θJA = 30.4°C/W)
VDD = +15 V, VSS = −15 V 156 95 55 mA maximum
VDD = +20 V, VSS = −20 V 165 98 56 mA maximum
VDD = 12 V, VSS = 0 V 126 81 50 mA maximum
VDD = 36 V, VSS = 0 V 161 97 56 mA maximum
Enhanced Product ADG5408-EP/ADG5409-EP
Rev. 0 | Page 9 of 18
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 7.
Parameter Rating
VDD to VSS 48 V
VDD to GND −0.3 V to +48 V
VSS to GND +0.3 V to −48 V
Analog Inputs1 VSS − 0.3 V to VDD + 0.3 V or
30 mA, whichever occurs first
Digital Inputs1 VSS − 0.3 V to VDD + 0.3 V or
30 mA, whichever occurs first
Peak Current, Sx or D Pins
ADG5408-EP 435 mA (pulsed at 1 ms, 10%
duty cycle maximum)
ADG5409-EP 300 mA (pulsed at 1 ms, 10%
duty cycle maximum)
Continuous Current, Sx or D2 Data + 15%
Temperature Range
Operating −55°C to +125°C
Storage −65°C to +150°C
Junction Temperature 150°C
Thermal Impedance, θJA
16-Lead LFCSP (4-Layer
Board)
30.4°C/W
Reflow Soldering Peak
Temperature, Pb-Free
As per JEDEC J-STD-020
1 Overvoltages at the Ax, EN, Sx, and D pins are clamped by internal diodes.
Limit current to the maximum ratings given.
2 See Table 5.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Only one absolute maximum rating can be applied at any
one time.
ESD CAUTION
ADG5408-EP/ADG5409-EP Enhanced Product
Rev. 0 | Page 10 of 18
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1V
SS
NOTES
1. THE EXPOSED PAD IS
CONNECTED INTERNALLY. FOR
INCREASED RELIABILITY OF THE
SOLDER JOINTS AND MAXIMUM
THERMAL CAPABILITY, IT IS
RECOMMENDED THAT THE PAD BE
SOLDERED TO THE SUBSTRATE, V
SS
.
2
S1
3
S2
4S3
11 V
DD
12 GND
10 S5
9S6
5
S4
6
D
7
S8
8
S7
15 A0
16 EN
14 A1
13 A2
TOP VIEW
(Not to Scale)
ADG5408-EP
13397-003
Figure 2. ADG5408-EP Pin Configuration
Table 8. ADG5408-EP Pin Function Descriptions
Pin No. Mnemonic Description
15 A0 Logic Control Input.
16 EN Active High Digital Input. When low, the device is disabled and all switches are off. When high, Ax logic inputs
determine on switches.
1 VSS Most Negative Power Supply Potential. In single-supply applications, this pin can be connected to ground.
2 S1 Source Terminal 1. This pin can be an input or an output.
3 S2 Source Terminal 2. This pin can be an input or an output.
4 S3 Source Terminal 3. This pin can be an input or an output.
5 S4 Source Terminal 4. This pin can be an input or an output.
6 D Drain Terminal. This pin can be an input or an output.
7 S8 Source Terminal 8. This pin can be an input or an output.
8 S7 Source Terminal 7. This pin can be an input or an output.
9 S6 Source Terminal 6. This pin can be an input or an output.
10 S5 Source Terminal 5. This pin can be an input or an output.
11 VDD Most Positive Power Supply Potential.
12 GND Ground (0 V) Reference.
13 A2 Logic Control Input.
14 A1 Logic Control Input.
EP Exposed Pad
The exposed pad is connected internally. For increased reliability of the solder joints and maximum thermal
capability, it is recommended that the pad be soldered to the substrate, VSS.
Table 9. ADG5408-EP Truth Table
A2 A1 A0 EN On Switch
X X X 0 None
0 0 0 1 1
0 0 1 1 2
0 1 0 1 3
0 1 1 1 4
1 0 0 1 5
1 0 1 1 6
1 1 0 1 7
1 1 1 1 8
Enhanced Product ADG5408-EP/ADG5409-EP
Rev. 0 | Page 11 of 18
1V
SS
2
S1A
3
S2A
4S3A
11 S1B
12 V
DD
10 S2B
9S3B
5
S4A
6
DA
7
DB
8
S4B
15 A0
16 EN
14 A1
13 GND
NOTES
1. THE EXPOSED PAD IS
CONNECTED INTERNALLY. FOR
INCREASED RELIABILI
T
Y OF THE
SOLDER JOINTS AND MAXIMUM
THERM
A
L CAPABILITY, IT IS
RECOMMENDED THAT THE PAD BE
SOLDERED TO THE SUBSTRATE, V
SS
.
TOP VIEW
(Not to Scale)
ADG5409-EP
13397-005
Figure 3. ADG5409-EP Pin Configuration
Table 10. ADG5409-EP Pin Function Descriptions
Pin No. Mnemonic Description
15 A0 Logic Control Input.
16 EN Active High Digital Input. When low, the device is disabled and all switches are off. When high, Ax logic
inputs determine on switches.
1 VSS Most Negative Power Supply Potential. In single-supply applications, this pin can be connected to ground.
2 S1A Source Terminal 1A. This pin can be an input or an output.
3 S2A Source Terminal 2A. This pin can be an input or an output.
4 S3A Source Terminal 3A. This pin can be an input or an output.
5 S4A Source Terminal 4A. This pin can be an input or an output.
6 DA Drain Terminal A. This pin can be an input or an output.
7 DB Drain Terminal B. This pin can be an input or an output.
8 S4B Source Terminal 4B. This pin can be an input or an output.
9 S3B Source Terminal 3B. This pin can be an input or an output.
10 S2B Source Terminal 2B. This pin can be an input or an output.
11 S1B Source Terminal 1B. This pin can be an input or an output.
12 VDD Most Positive Power Supply Potential.
13 GND Ground (0 V) Reference.
14 A1 Logic Control Input.
EP Exposed Pad
The exposed pad is connected internally. For increased reliability of the solder joints and maximum thermal
capability, it is recommended that the pad be soldered to the substrate, VSS.
Table 11. ADG5409-EP Truth Table
A1 A0 EN On Switch Pair
X X 0 None
0 0 1 1
0 1 1 2
1 0 1 3
1 1 1 4
ADG5408-EP/ADG5409-EP Enhanced Product
Rev. 0 | Page 12 of 18
TYPICAL PERFORMANCE CHARACTERISTICS
0
5
10
15
20
25
–18 –14 –10 –6 –2 2 6 10 14 18
ON RESISTANCE ()
V
S
, V
D
(V)
T
A
= 25°C
V
DD
= +9V
V
SS
= –9V
V
DD
= +10V
V
SS
= –10V
V
DD
= +11V
V
SS
= –11V
V
DD
= +13.5V
V
SS
= –13.5V V
DD
= +15V
V
SS
= –15V
V
DD
= +16.5V
V
SS
= –16.5V
13397-028
Figure 4. RON as a Function of VS, VD (Dual Supply)
0
2
4
6
8
10
12
14
16
–25 –20 –15 –10 –5 0 5 10 15 20 25
ON RESISTANCE ()
V
S
, V
D
(V)
T
A
= 25°C
V
DD
= +22V
V
SS
= –22V
V
DD
= +20V
V
SS
= –20V
V
DD
= +18V
V
SS
= –18V
13397-029
Figure 5. RON as a Function of VS, VD (Dual Supply)
0
–5
–10
–15
–20
–25
–30
–
35
0 –2 –4 –6 –8 –10 –12 –14
ON RESISTANCE ()
V
S
, V
D
(V)
T
A
= 25°C
V
DD
= 9V
V
SS
= 0V
V
DD
= 10V
V
SS
= 0V V
DD
= 10.8V
V
SS
= 0V
V
DD
=11V
V
SS
= 0V
V
DD
= 12V
V
SS
= 0V
V
DD
= 13.2V
V
SS
= 0V
13397-023
Figure 6. RON as a Function of VS, VD (Single Supply)
0
2
4
6
8
10
12
14
16
0 5 10 15 20 25 30 35 40 45
ON RESISTANCE ()
V
S
, V
D
(V)
T
A
= 25°C
V
DD
= 39.6V
V
SS
= 0V
V
DD
= 36V
V
SS
= 0V
V
DD
= 32.4V
V
SS
= 0V
13397-027
Figure 7. RON as a Function of VS, VD (Single Supply)
0
5
10
15
20
25
–15 –10 –5 0 5 10 15
ON RESISTANCE ()
V
S
, V
D
(V)
V
DD
= +15V
V
SS
= –15V
T
A
= +125°C
T
A
= +85°C
T
A
= +25°C
T
A
= –40°C
T
A
= –55°C
13397-030
Figure 8. RON as a Function of VS (VD) for Different Temperatures,
±15 V Dual Supply
–20 –15 –10 –5 0 5 10 15 20
ON RESISTANCE ()
T
A
= +125°C
T
A
= +85°C
T
A
= +25°C
T
A
= –40°C
V
S
, V
D
(V)
T
A
= –55°C
0
2
4
6
8
10
12
14
16
18
20
V
DD
= +20V
V
SS
= –20V
13397-024
Figure 9. RON as a Function of VS (VD) for Different Temperatures,
±20 V Dual Supply
Enhanced Product ADG5408-EP/ADG5409-EP
Rev. 0 | Page 13 of 18
0
5
10
15
20
25
30
35
40
024681012
V
S
, V
D
(V)
ON RESISTANCE ()
T
A
= +125°C
T
A
= +85°C
T
A
= +25°C
T
A
=–40°C
V
DD
= 12V
V
SS
= 0V
T
A
= –55°C
13397-031
Figure 10. RON as a Function of VS (VD) for Different Temperatures,
12 V Single Supply
0
5
10
15
20
25
ON RESISTANCE ()
T
A
= +125°C
T
A
= +85°C
T
A
= +25°C
T
A
= –40°C
V
S
, V
D
(V)
V
DD
= 36V
V
SS
= 0V
0 4 8 12 16 20 24 28 32 36
T
A
= –55°C
13397-032
Figure 11. RON as a Function of VD (VS) for Different Temperatures,
36 V Single Supply
0 25 50 75 100 125
LEAKAGE CURRENT (nA)
TEMPERATURE (°C)
0.5
–1.0
0
–2.0
–0.5
–1.5
V
DD
= +15V
V
SS
= –15V
V
BIAS
= +10V/–10V
I
D
, I
S
(ON) + +
I
D
, I
S
(ON) – –
I
D
(OFF) + –
I
S
(OFF) + –
I
S
(OFF) – + I
D
(OFF) – +
13397-034
Figure 12. Leakage Currents vs. Temperature, ±15 V Dual Supply
0 255075100125
LEAKAGE CURRENT (nA)
TEMPERATURE (°C)
1
–1
0
–3
–2
V
DD
= +20V
V
SS
= –20V
V
BIAS
= +15V/–15V
I
D
, I
S
(ON) + +
I
D
, I
S
(ON) – –
I
D
(OFF) + –
I
S
(OFF) + –
I
S
(OFF) – +
I
D
(OFF) – +
13397-035
Figure 13. Leakage Currents vs. Temperature, ±20 V Dual Supply
0 255075100125
LEAKAGE CURRENT (nA)
TEMPERATURE (°C)
0.5
–1.0
0
–2.0
–0.5
–1.5
VDD = 12V
VSS = 0V
VBIAS = 1V/10V
ID, IS (ON) + +
ID, IS (ON) – –
ID (OFF) + –
IS (OFF) + –
ID (OFF) – +
IS (OFF) – +
13397-033
Figure 14. Leakage Currents vs. Temperature, 12 V Single Supply
0 255075100125
LEAKAGE CURRENT (nA)
TEMPERATURE (°C)
1
–1
0
–3
–2
V
DD
= +36V
V
SS
= 0V
V
BIAS
= 1V/30V
I
D
, I
S
(ON) + +
I
D
, I
S
(ON) – –
I
D
(OFF) + –
I
S
(OFF) + –
I
S
(OFF) – +
I
D
(OFF) – +
13397-036
Figure 15. Leakage Currents vs. Temperature, 36 V Single Supply
ADG5408-EP/ADG5409-EP Enhanced Product
Rev. 0 | Page 14 of 18
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
OFF ISOL
A
TION (dB)
FREQUENCY (Hz)
100k10k 1M 10M 100M 1G1k
T
A
= 25°C
V
DD
= +15V
V
SS
= –15V
13397-021
Figure 16. Off Isolation vs. Frequency, ±15 V Dual Supply
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
CROSSTALK (dB)
FREQUENCY (Hz)
10k 100k 1M 10M 100M 1G
T
A
= 25°C
V
DD
= +15V
V
SS
= –15V
13397-026
Figure 17. Crosstalk vs. Frequency, ±15 V Dual Supply
0
50
100
150
200
250
300
2010 0 10203040
CHARGE INJECTION (pC)
T
A
= 25°C V
DD
= +20V
V
SS
= –20V
V
DD
= +15V
V
SS
= –15V
V
DD
= +36V
V
SS
= 0V
V
DD
= +12V
V
SS
= 0V
V
S
(V)
13397-019
Figure 18. Charge Injection vs. Source Voltage
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
ACPSRR (dB)
FREQUENCY (Hz)
1k 1M 10M10k 100k
T
A
= 25°C
V
DD
= +15V
V
SS
= –15V
NO DECOUPLING
CAPACITORS
DECOUPLING
CAPACITORS
13397-022
Figure 19. ACPSRR vs. Frequency, ±15 V Dual Supply
0
0.02
0.04
0.06
0.08
0.10
0.12
0 5 10 15 20
THD + N (%)
FREQUENCY (kHz)
VDD = 12V, VSS = 0V, VS = 6V p-p
VDD = 36V, VSS = 0V, VS = 18V p-p
VDD = 15V, VSS = 15V, VS = 15V p-p
VDD = 20V, VSS = 20V, VS = 20V p-p
LOAD = 1k
TA = 25°C
13397-025
Figure 20. THD + N vs. Frequency
–5.0
–4.5
–4.0
–3.5
–3.0
–2.5
–2.0
–1.5
–1.0
–0.5
0
INSERTION LOSS (dB)
FREQUENCY (Hz)
10k 100k 1M 10M 100M1k 1G
ADG5408-EP
ADG5409 -EP
TA = 25°C
VDD = +15V
VSS = –15V
13397-020
Figure 21. Bandwidth
Enhanced Product ADG5408-EP/ADG5409-EP
Rev. 0 | Page 15 of 18
TIME (ns)
TEMPERATURE (°C)
130
180
230
280
330
380
–55 –35 –15 5 25 45 65 85 105 125
V
DD
= +12V, V
SS
= 0V
V
DD
= +15V, V
SS
= –15V
V
DD
= +36V, V
SS
= 0V
V
DD
= +20V, V
SS
= –20V
13397-018
Figure 22. tTRANSITION Times vs. Temperature
ADG5408-EP/ADG5409-EP Enhanced Product
Rev. 0 | Page 16 of 18
TEST CIRCUITS
S2
V
D
V
D
S8
S1 D
I
D
(ON)
NC
NC = NO CONNECT
A
13397-008
Figure 23. On Leakage
I
DS
SD
V
S
V
R
ON
= V/I
DS
13397-006
Figure 24. On Resistance
CHANNEL-TO-CHANNEL CROSSTALK = 20 log V
OUT
GND
S1
D
S2
V
OUT
NETWORK
ANALYZER
R
L
50
R
L
50
V
S
V
S
V
DD
V
SS
0.1µF
V
DD
0.1µF
V
SS
13397-014
Figure 25. Channel-to-Channel Crosstalk
V
OUT
50
NETWORK
ANALYZER
R
L
50
Sx
D
V
S
V
DD
V
SS
0.1µF
V
DD
0.1µF
V
SS
GND
50
OFF ISOLATION = 20 log V
OUT
V
S
13397-013
Figure 26. Off Isolation
S1 D
V
S
V
D
I
S
(OFF)
S8
I
D
(OFF)
A
A
A
13397-007
Figure 27. Off Leakage
V
OUT
R
S
AUDIO PRECISION
R
L
10k
IN
V
IN
Sx
D
V
S
V p-p
V
DD
V
SS
0.1µF
V
DD
0.1µF
V
SS
GND
13397-015
Figure 28. THD + Noise Figure
V
OUT
50
NETWORK
ANALYZER
R
L
50
Sx
D
INSERTION LOSS = 20 log
V
OUT
WITH SWITCH
V
OUT
WITHOUT SWITCH
V
S
V
DD
V
SS
0.1µF
V
DD
0.1µF
V
SS
GND
13397-017
Figure 29. Bandwidth
Enhanced Product ADG5408-EP/ADG5409-EP
Rev. 0 | Page 17 of 18
3V
0V
OUTPUT
t
r
< 20ns
t
f
< 20ns
A
DDRESS
DRIVE (V
IN
)
t
TRANSITION
t
TRANSITION
50% 50%
90%
90%
OUTPUT
ADG5408-EP*
A0
A1
A2
50
300
GND
S1
S2 TO S7
S8
D
35pF
V
IN
2.4V EN
V
DD
V
SS
V
DD
V
SS
V
S1
V
S8
*SIMILAR CONNECTION FOR ADG5409-EP.
13397-009
Figure 30. Address to Output Switching Times, tTRANSITION
OUTPUT
A0
A1
A2
50
300
GND
S1
S2 TO S7
S8
D
35pF
V
IN
2.4V EN
V
DD
V
SS
V
DD
V
SS
V
S
*SIMILAR CONNECTION FOR ADG5409-EP.
3V
0V
OUTPUT
80% 80%
A
DDRESS
DRIVE (V
IN
)
t
D
13397-010
ADG5408-EP*
Figure 31. Break-Before-Make Delay, tD
OUTPUT
A0
A1
A2
50300
GND
S1
S2 TO S8
D
35pF
V
IN
EN
V
DD
V
SS
V
DD
V
SS
V
S
3V
0V
OUTPUT
50% 50%
t
OFF
(EN)
t
ON
(EN)
0.9V
O
0.9V
O
ENABLE
DRIVE (V
IN
)
13397-011
ADG5408-EP*
*SIMILAR CONNECTION FOR ADG5409-EP.
Figure 32. Enable Delay, tON (EN), tOFF (EN)
3V
V
IN
V
OUT
Q
INJ
= C
L
× V
OUT
V
OUT
DSx
EN
GND C
L
1nF
V
OUT
V
IN
R
S
V
S
V
DD
V
SS
V
DD
V
SS
A0
A1
A2
ADG5408-EP*
*SIMILAR CONNECTION FOR ADG5409-EP.
13397-012
Figure 33. Charge Injection
ADG5408-EP/ADG5409-EP Enhanced Product
Rev. 0 | Page 18 of 18
OUTLINE DIMENSIONS
2.70
2.60 SQ
2.50
COMPLIANT
TO
JEDEC STANDARDS MO-220-WGGC.
1
0.65
BSC
BOTTOM VIEWTOP VIEW
16
5
8
9
12
13
4
EXPOSED
PAD
PIN1
INDICATOR
4.10
4.00 SQ
3.90
0.45
0.40
0.35
S
EATING
PLANE
0.80
0.75
0.70 0.05 MAX
0.02 NOM
0.20 REF
0.20 MIN
COPLANARITY
0.08
PIN 1
INDICATOR
0.35
0.30
0.25
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
08-16-2010-C
Figure 34. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ]
4 mm × 4 mm Body, Very Very Thin Quad
(CP-16-17)
Dimensions shown in millimeters
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option
ADG5408TCPZ-EP-RL7 −55°C to +125°C 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-16-17
ADG5408TCPZ-EP −55°C to +125°C 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-16-17
ADG5409TCPZ-EP-RL7 −55°C to +125°C 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-16-17
ADG5409TCPZ-EP −55°C to +125°C 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-16-17
1 Z = RoHS Compliant Part.
©2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D13397-0-9/15(0)
