High Voltage Latch-Up Proof, 4-/8-Channel Multiplexers ADG5408-EP/ADG5409-EP Enhanced Product FEATURES FUNCTIONAL BLOCK DIAGRAMS Latch-up proof 8 kV human body model (HBM) ESD rating Low on resistance (13.5 ) 9 V to 22 V dual-supply operation 9 V to 40 V single-supply operation Fully specified at 15 V, 20 V, +12 V, and +36 V VSS to VDD analog signal range ADG5408-EP ADG5409-EP S1 S1A DA S4A D S1B DB S8 Supports defense and aerospace applications (AQEC standard) Military temperature range: -55C to +125C Controlled manufacturing baseline One assembly/test site One fabrication site Enhanced product change notification Qualification data available on request 1-OF-8 DECODER 1-OF-4 DECODER A0 A1 A2 EN A0 A1 EN 13397-001 ENHANCED PRODUCT FEATURES S4B Figure 1. APPLICATIONS Relay replacement Automatic test equipment Data acquisition Instrumentation Avionics Communication systems GENERAL DESCRIPTION The ADG5408-EP/ADG5409-EP are monolithic CMOS analog multiplexers comprising eight single channels and four differential channels, respectively. The ADG5408-EP switches one of eight inputs to a common output, as determined by the 3-bit binary address lines, A0, A1, and A2. The ADG5409-EP switches one of four differential inputs to a common differential output, as determined by the 2-bit binary address lines, A0 and A1. The ADG5408-EP/ADG5409-EP do not have VL pins; rather, the logic power supply is generated internally by an on-chip voltage generator. An EN input on both devices enables or disables the device. When EN is disabled, all channels switch off. The on-resistance profile is very flat over the full analog input range, which ensures good linearity and low distortion when switching audio signals. High switching speed also makes the parts suitable for video signal switching. 1. Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the power supplies. In the off condition, signal levels up to the supplies are blocked. 4. Rev. 0 Additional application and technical information can be found in the ADG5408/ADG5409 data sheet. PRODUCT HIGHLIGHTS 2. 3. 5. 6. Trench isolation guards against latch-up. A dielectric trench separates the P and N channel transistors thereby preventing latch-up even under severe overvoltage conditions. Low RON. Dual-supply operation. For applications where the analog signal is bipolar, the ADG5408-EP/ADG5409-EP can be operated from dual supplies up to 22 V. Single-supply operation. For applications where the analog signal is unipolar, the ADG5408-EP/ADG5409-EP can be operated from a single rail power supply up to 40 V. 3 V logic compatible digital inputs: VINH = 2.0 V, VINL = 0.8 V. No VL logic power supply required. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 (c)2015 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com ADG5408-EP/ADG5409-EP Enhanced Product TABLE OF CONTENTS Features .............................................................................................. 1 36 V Single Supply.........................................................................6 Enhanced Product Features ............................................................ 1 Continuous Current per Channel, Sx or D ................................8 Applications ....................................................................................... 1 Absolute Maximum Ratings ............................................................9 Functional Block Diagrams ............................................................. 1 ESD Caution...................................................................................9 General Description ......................................................................... 1 Pin Configurations and Function Descriptions ......................... 10 Product Highlights ........................................................................... 1 Typical Performance Characteristics ........................................... 12 Revision History ............................................................................... 2 Test Circuits ..................................................................................... 16 Specifications..................................................................................... 3 Outline Dimensions ....................................................................... 18 15 V Dual Supply ....................................................................... 3 Ordering Guide .......................................................................... 18 20 V Dual Supply ....................................................................... 4 12 V Single Supply ........................................................................ 5 REVISION HISTORY 9/15--Revision 0: Initial Version Rev. 0 | Page 2 of 18 Enhanced Product ADG5408-EP/ADG5409-EP SPECIFICATIONS 15 V DUAL SUPPLY VDD = +15 V 10%, VSS = -15 V 10%, GND = 0 V, unless otherwise noted. Table 1. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On-Resistance Match Between Channels, RON On-Resistance Flatness, RFLAT (ON) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID (On), IS (On) 25C 13.5 15 0.3 0.8 1.8 2.2 0.05 0.25 0.1 0.4 0.1 0.4 -40C to +85C -55C to +125C Unit Test Conditions/Comments VDD to VSS V typ max typ VS = 10 V, IS = -10 mA; see Figure 24 VDD = +13.5 V, VSS = -13.5 V VS = 10 V, IS = -10 mA 18 22 1.3 1.4 2.6 3 1 7 4 30 4 30 max typ max nA typ nA max nA typ nA max nA typ nA max VS = 10 V, IS = -10 mA VDD = +16.5 V, VSS = -16.5 V VS = 10 V, VD = 10 V; see Figure 27 VS = 10 V, VD = 10 V; see Figure 27 VS = VD = 10 V; see Figure 23 DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH 2.0 0.8 0.002 0.1 Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS1 Transition Time, tTRANSITION 3 V min V max A typ A max pF typ VIN = VGND or VDD Break-Before-Make Time Delay, tD 170 217 140 175 130 161 50 Charge Injection, QINJ 115 ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ Off Isolation -60 dB typ Channel-to-Channel Crosstalk -60 dB typ Total Harmonic Distortion + Noise 0.01 % typ -3 dB Bandwidth ADG5408-EP ADG5409-EP Insertion Loss 50 87 0.9 MHz typ MHz typ dB typ 15 pF typ RL = 50 , CL = 5 pF, f = 1 MHz; Figure 29 VS = 0 V, f = 1 MHz 102 50 pF typ pF typ VS = 0 V, f = 1 MHz VS = 0 V, f = 1 MHz tON (EN) tOFF (EN) 258 292 213 242 183 198 13 CS (Off ) CD (Off ) ADG5408-EP ADG5409-EP Rev. 0 | Page 3 of 18 RL = 300 , CL = 35 pF VS = 10 V; see Figure 30 RL = 300 , CL = 35 pF VS = 10 V; see Figure 32 RL = 300 , CL = 35 pF VS = 10 V; see Figure 32 RL = 300 , CL = 35 pF VS1 = VS2 = 10 V; see Figure 31 VS = 0 V, RS = 0 , CL = 1 nF; see Figure 33 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 26 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 25 RL = 1 k, 15 V p-p, f = 20 Hz to 20 kHz; see Figure 28 RL = 50 , CL = 5 pF; see Figure 29 ADG5408-EP/ADG5409-EP Parameter CD (On), CS (On) ADG5408-EP ADG5409-EP POWER REQUIREMENTS IDD ISS 25C Enhanced Product -40C to +85C 133 81 45 55 0.001 Unit Test Conditions/Comments pF typ pF typ VS = 0 V, f = 1 MHz VS = 0 V, f = 1 MHz VDD = +16.5 V, VSS = -16.5 V Digital inputs = 0 V or VDD A typ A max A typ A max V min/V max Digital inputs = 0 V or VDD -55C to +125C Unit Test Conditions/Comments VDD to VSS V typ max typ VS = 15 V, IS = -10 mA; see Figure 24 VDD = +18 V, VSS = -18 V VS = 15 V, IS = -10 mA 80 1 9/22 VDD/VSS 1 -55C to +125C GND = 0 V Guaranteed by design; not subject to production test. 20 V DUAL SUPPLY VDD = +20 V 10%, VSS = -20 V 10%, GND = 0 V, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On-Resistance Match Between Channels, RON On-Resistance Flatness, RFLAT (ON) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID (On), IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH 25C 12.5 14 0.3 0.8 2.3 2.7 0.1 0.25 0.15 0.4 0.15 0.4 -40C to +85C 17 21 1.3 1.4 3.1 3.5 1 7 4 30 4 30 2.0 0.8 0.002 0.1 Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS1 Transition Time, tTRANSITION 3 nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max pF typ Charge Injection, QINJ 155 ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ Off Isolation -60 dB typ Channel-to-Channel Crosstalk -60 dB typ tON (EN) tOFF (EN) Break-Before-Make Time Delay, tD 160 207 140 165 133 153 38 max typ max 237 262 194 218 174 189 8 Rev. 0 | Page 4 of 18 VS = 15 V, IS = -10 mA VDD = +22 V, VSS = -22 V VS = 15 V, VD = 15 V; see Figure 27 VS = 15 V, VD = 15 V; see Figure 27 VS = VD = 15 V; see Figure 23 VIN = VGND or VDD RL = 300 , CL = 35 pF VS = 10 V; see Figure 30 RL = 300 , CL = 35 pF VS = 10 V; see Figure 32 RL = 300 , CL = 35 pF VS = 10 V; see Figure 32 RL = 300 , CL = 35 pF VS1 = VS2 = 10 V; see Figure 31 VS = 0 V, RS = 0 , CL = 1 nF; see Figure 33 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 26 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 25 Enhanced Product Parameter Total Harmonic Distortion + Noise -3 dB Bandwidth ADG5408-EP ADG5409-EP Insertion Loss CS (Off ) CD (Off ) ADG5408-EP ADG5409-EP CD (On), CS (On) ADG5408-EP ADG5409-EP POWER REQUIREMENTS IDD ISS ADG5408-EP/ADG5409-EP 25C 0.012 -40C to +85C Unit % typ Test Conditions/Comments RL = 1 k, 20 V p-p, f = 20 Hz to 20 kHz; see Figure 28 RL = 50 , CL = 5 pF; see Figure 29 50 88 0.8 MHz typ MHz typ dB typ 17 pF typ RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 29 VS = 0 V, f = 1 MHz 98 48 pF typ pF typ VS = 0 V, f = 1 MHz VS = 0 V, f = 1 MHz 128 80 pF typ pF typ VS = 0 V, f = 1 MHz VS = 0 V, f = 1 MHz VDD = +22 V, VSS = -22 V Digital inputs = 0 V or VDD 50 70 0.001 A typ A max A typ A max V min/V max Digital inputs = 0 V or VDD -55C to +125C Unit Test Conditions/Comments 0 V to VDD V typ 120 1 9/22 VDD/VSS 1 -55C to +125C GND = 0 V Guaranteed by design; not subject to production test. 12 V SINGLE SUPPLY VDD = 12 V 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 3. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On-Resistance Match Between Channels, RON On-Resistance Flatness, RFLAT (ON) 25C -40C to +85C 26 30 0.3 36 42 max typ 1 5.5 6.5 1.5 1.6 VS = 0 V to 10 V, IS = -10 mA 8 12 max typ max nA typ VDD = 13.2 V, VSS = 0 V VS = 1 V/10 V, VD = 10 V/1 V; see Figure 27 LEAKAGE CURRENTS Source Off Leakage, IS (Off ) 0.02 0.25 0.05 1 Drain Off Leakage, ID (Off ) 0.4 0.05 0.4 4 30 4 30 Channel On Leakage, ID (On), IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH 7 2.0 0.8 0.002 0.1 Digital Input Capacitance, CIN VS = 0 V to 10 V, IS = -10 mA; see Figure 24 VDD = 10.8 V, VSS = 0 V VS = 0 V to 10 V, IS = -10 mA 3 Rev. 0 | Page 5 of 18 nA max nA typ VS = 1 V/10 V, VD = 10 V/1 V; see Figure 27 nA max nA typ nA max VS = VD = 1 V/10 V; see Figure 23 V min V max A typ A max pF typ VIN = VGND or VDD ADG5408-EP/ADG5409-EP Parameter DYNAMIC CHARACTERISTICS1 Transition Time, tTRANSITION 25C Enhanced Product -40C to +85C -55C to +125C 388 430 345 397 187 209 Test Conditions/Comments RL = 300 , CL = 35 pF VS = 8 V; see Figure 30 RL = 300 , CL = 35 pF VS = 8 V; see Figure 32 RL = 300 , CL = 35 pF VS = 8 V; see Figure 32 RL = 300 , CL = 35 pF VS1 = VS2 = 8 V; see Figure 31 VS = 6 V, RS = 0 , CL = 1 nF; see Figure 33 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 26 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 25 RL = 1 k, 6 V p-p, f = 20 Hz to 20 kHz; see Figure 28 RL = 50 , CL = 5 pF; see Figure 29 Break-Before-Make Time Delay, tD 230 321 215 276 134 161 118 Charge Injection, QINJ 45 ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ Off Isolation -60 dB typ Channel-to-Channel Crosstalk -60 dB typ Total Harmonic Distortion + Noise 0.1 % typ -3 dB Bandwidth ADG5408-EP ADG5409-EP Insertion Loss 35 74 -1.8 MHz typ MHz typ dB typ 22 pF typ RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 29 VS = 6 V, f = 1 MHz 119 59 pF typ pF typ VS = 6 V, f = 1 MHz VS = 6 V, f = 1 MHz 146 86 pF typ pF typ VS = 6 V, f = 1 MHz VS = 6 V, f = 1 MHz VDD = 13.2 V Digital inputs = 0 V or VDD tON (EN) tOFF (EN) 44 CS (Off ) CD (Off ) ADG5408-EP ADG5409-EP CD (On), CS (On) ADG5408-EP ADG5409-EP POWER REQUIREMENTS IDD 40 50 75 9/40 VDD 1 Unit A typ A max V min/V max GND = 0 V, VSS = 0 V Guaranteed by design; not subject to production test. 36 V SINGLE SUPPLY VDD = 36 V 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 4. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On-Resistance Match Between Channels, RON On-Resistance Flatness, RFLAT (ON) 25C -40C to +85C -55C to +125C Unit 0 V to VDD V typ 14.5 16 0.3 19 23 max typ 0.8 3.5 4.3 1.3 1.4 5.5 6.5 max typ max Rev. 0 | Page 6 of 18 Test Conditions/Comments VS = 0 V to 30 V, IS = -10 mA; see Figure 24 VDD = 32.4 V, VSS = 0 V VS = 0 V to 30 V, IS = -10 mA VS = 0 V to 30 V, IS = -10 mA Enhanced Product ADG5408-EP/ADG5409-EP Parameter LEAKAGE CURRENTS Source Off Leakage, IS (Off ) 0.1 0.25 0.15 1 Drain Off Leakage, ID (Off ) 0.4 0.15 0.4 4 30 4 30 Channel On Leakage, ID (On), IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH 25C -40C to +85C -55C to +125C nA typ 7 2.0 0.8 0.002 0.1 Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS1 Transition Time, tTRANSITION 3 nA max nA typ Test Conditions/Comments VDD =39.6 V, VSS = 0 V VS = 1 V/30 V, VD = 30 V/1 V; see Figure 27 VS = 1 V/30 V, VD = 30 V/1 V; see Figure 27 nA max nA typ nA max VS = VD = 1 V/30 V; see Figure 23 V min V max A typ A max pF typ VIN = VGND or VDD Break-Before-Make Time Delay, tD 187 242 160 195 147 184 53 Charge Injection, QINJ 150 ns typ ns max ns typ ns max ns typ ns max ns typ ns min pC typ Off Isolation -60 dB typ Channel-to-Channel Crosstalk -60 dB typ Total Harmonic Distortion + Noise 0.4 % typ -3 dB Bandwidth ADG5408-EP ADG5409-EP Insertion Loss 45 76 -1 MHz typ MHz typ dB typ 18 pF typ RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 29 VS = 18 V, f = 1 MHz 120 60 pF typ pF typ VS = 18 V, f = 1 MHz VS = 18 V, f = 1 MHz 137 80 pF typ pF typ VS = 18 V, f = 1 MHz VS = 18 V, f = 1 MHz VDD = 39.6 V Digital inputs = 0 V or VDD tON (EN) tOFF (EN) 257 281 219 237 184 190 14 CS (Off ) CD (Off ) ADG5408-EP ADG5409-EP CD (On), CS (On) ADG5408-EP ADG5409-EP POWER REQUIREMENTS IDD 80 100 VDD 1 Unit 155 9/40 Guaranteed by design; not subject to production test. Rev. 0 | Page 7 of 18 A typ A max V min/V max RL = 300 , CL = 35 pF VS = 18 V; see Figure 30 RL = 300 , CL = 35 pF VS = 18 V; see Figure 32 RL = 300 , CL = 35 pF VS = 18 V; see Figure 32 RL = 300 , CL = 35 pF VS1 = VS2 = 18 V; see Figure 31 VS = 18 V, RS = 0 , CL = 1 nF; see Figure 33 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 26 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 25 RL = 1 k, 18 V p-p, f = 20 Hz to 20 kHz; see Figure 28 RL = 50 , CL = 5 pF; see Figure 29 GND = 0 V, VSS = 0 V ADG5408-EP/ADG5409-EP Enhanced Product CONTINUOUS CURRENT PER CHANNEL, Sx OR D Table 5. ADG5408-EP Parameter CONTINUOUS CURRENT, Sx OR D (JA = 30.4C/W) VDD = +15 V, VSS = -15 V VDD = +20 V, VSS = -20 V VDD = 12 V, VSS = 0 V VDD = 36 V, VSS = 0 V 25C 85C 125C Unit 207 218 168 214 113 117 99 116 60 61 57 61 mA maximum mA maximum mA maximum mA maximum 25C 85C 125C Unit 156 165 126 161 95 98 81 97 55 56 50 56 mA maximum mA maximum mA maximum mA maximum Table 6. ADG5409-EP Parameter CONTINUOUS CURRENT, Sx OR D (JA = 30.4C/W) VDD = +15 V, VSS = -15 V VDD = +20 V, VSS = -20 V VDD = 12 V, VSS = 0 V VDD = 36 V, VSS = 0 V Rev. 0 | Page 8 of 18 Enhanced Product ADG5408-EP/ADG5409-EP ABSOLUTE MAXIMUM RATINGS TA = 25C, unless otherwise noted. Table 7. Parameter VDD to VSS VDD to GND VSS to GND Analog Inputs1 1 Digital Inputs Peak Current, Sx or D Pins ADG5408-EP ADG5409-EP Continuous Current, Sx or D2 Temperature Range Operating Storage Junction Temperature Thermal Impedance, JA 16-Lead LFCSP (4-Layer Board) Reflow Soldering Peak Temperature, Pb-Free 1 2 Rating 48 V -0.3 V to +48 V +0.3 V to -48 V VSS - 0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first VSS - 0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Only one absolute maximum rating can be applied at any one time. ESD CAUTION 435 mA (pulsed at 1 ms, 10% duty cycle maximum) 300 mA (pulsed at 1 ms, 10% duty cycle maximum) Data + 15% -55C to +125C -65C to +150C 150C 30.4C/W As per JEDEC J-STD-020 Overvoltages at the Ax, EN, Sx, and D pins are clamped by internal diodes. Limit current to the maximum ratings given. See Table 5. Rev. 0 | Page 9 of 18 ADG5408-EP/ADG5409-EP Enhanced Product S2 3 13 A2 ADG5408-EP TOP VIEW (Not to Scale) 12 GND 11 VDD 10 S5 9 S6 S8 7 S7 8 D 6 S4 5 S3 4 NOTES 1. THE EXPOSED PAD IS CONNECTED INTERNALLY. FOR INCREASED RELIABILITY OF THE SOLDER JOINTS AND MAXIMUM THERMAL CAPABILITY, IT IS RECOMMENDED THAT THE PAD BE SOLDERED TO THE SUBSTRATE, VSS. 13397-003 S1 2 14 A1 16 EN VSS 1 15 A0 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS Figure 2. ADG5408-EP Pin Configuration Table 8. ADG5408-EP Pin Function Descriptions Pin No. 15 16 Mnemonic A0 EN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 EP VSS S1 S2 S3 S4 D S8 S7 S6 S5 VDD GND A2 A1 Exposed Pad Description Logic Control Input. Active High Digital Input. When low, the device is disabled and all switches are off. When high, Ax logic inputs determine on switches. Most Negative Power Supply Potential. In single-supply applications, this pin can be connected to ground. Source Terminal 1. This pin can be an input or an output. Source Terminal 2. This pin can be an input or an output. Source Terminal 3. This pin can be an input or an output. Source Terminal 4. This pin can be an input or an output. Drain Terminal. This pin can be an input or an output. Source Terminal 8. This pin can be an input or an output. Source Terminal 7. This pin can be an input or an output. Source Terminal 6. This pin can be an input or an output. Source Terminal 5. This pin can be an input or an output. Most Positive Power Supply Potential. Ground (0 V) Reference. Logic Control Input. Logic Control Input. The exposed pad is connected internally. For increased reliability of the solder joints and maximum thermal capability, it is recommended that the pad be soldered to the substrate, VSS. Table 9. ADG5408-EP Truth Table A2 X 0 0 0 0 1 1 1 1 A1 X 0 0 1 1 0 0 1 1 A0 X 0 1 0 1 0 1 0 1 EN 0 1 1 1 1 1 1 1 1 Rev. 0 | Page 10 of 18 On Switch None 1 2 3 4 5 6 7 8 S2A 3 14 A1 ADG5409-EP TOP VIEW (Not to Scale) 12 VDD 11 S1B 10 S2B 9 S3B DB 7 S4B 8 DA 6 S4A 5 S3A 4 NOTES 1. THE EXPOSED PAD IS CONNECTED INTERNALLY. FOR INCREASED RELIABILITY OF THE SOLDER JOINTS AND MAXIMUM THERMAL CAPABILITY, IT IS RECOMMENDED THAT THE PAD BE SOLDERED TO THE SUBSTRATE, V SS. 13397-005 VSS 1 S1A 2 13 GND 16 EN ADG5408-EP/ADG5409-EP 15 A0 Enhanced Product Figure 3. ADG5409-EP Pin Configuration Table 10. ADG5409-EP Pin Function Descriptions Pin No. 15 16 Mnemonic A0 EN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 EP VSS S1A S2A S3A S4A DA DB S4B S3B S2B S1B VDD GND A1 Exposed Pad Description Logic Control Input. Active High Digital Input. When low, the device is disabled and all switches are off. When high, Ax logic inputs determine on switches. Most Negative Power Supply Potential. In single-supply applications, this pin can be connected to ground. Source Terminal 1A. This pin can be an input or an output. Source Terminal 2A. This pin can be an input or an output. Source Terminal 3A. This pin can be an input or an output. Source Terminal 4A. This pin can be an input or an output. Drain Terminal A. This pin can be an input or an output. Drain Terminal B. This pin can be an input or an output. Source Terminal 4B. This pin can be an input or an output. Source Terminal 3B. This pin can be an input or an output. Source Terminal 2B. This pin can be an input or an output. Source Terminal 1B. This pin can be an input or an output. Most Positive Power Supply Potential. Ground (0 V) Reference. Logic Control Input. The exposed pad is connected internally. For increased reliability of the solder joints and maximum thermal capability, it is recommended that the pad be soldered to the substrate, VSS. Table 11. ADG5409-EP Truth Table A1 X 0 0 1 1 A0 X 0 1 0 1 EN 0 1 1 1 1 On Switch Pair None 1 2 3 4 Rev. 0 | Page 11 of 18 ADG5408-EP/ADG5409-EP Enhanced Product TYPICAL PERFORMANCE CHARACTERISTICS 25 16 TA = 25C 20 12 VDD = +11V VSS = -11V 15 10 VDD = +13.5V VSS = -13.5V VDD = +15V VSS = -15V VDD = +16.5V VSS = -16.5V 5 TA = 25C 14 ON RESISTANCE () ON RESISTANCE () VDD = +10V VSS = -10V VDD = +9V VSS = -9V 10 VDD = 32.4V VSS = 0V 8 VDD = 39.6V VSS = 0V VDD = 36V VSS = 0V 6 4 -14 -10 -6 -2 2 6 10 14 18 VS, VD (V) 0 13397-028 0 -18 0 10 15 20 25 30 35 40 45 VS, VD (V) Figure 7. RON as a Function of VS, VD (Single Supply) Figure 4. RON as a Function of VS, VD (Dual Supply) 16 5 13397-027 2 25 TA = 25C 14 ON RESISTANCE () ON RESISTANCE () 20 VDD = +18V VSS = -18V 12 10 8 VDD = +22V VSS = -22V VDD = +20V VSS = -20V 6 TA = +125C 15 TA = +85C TA = +25C 10 TA = -40C TA = -55C 4 2 -20 -15 -10 -5 0 5 10 15 20 VS, VD (V) 25 VDD = +15V VSS = -15V 0 -15 -10 13397-029 0 -25 10 15 Figure 8. RON as a Function of VS (VD) for Different Temperatures, 15 V Dual Supply VDD = 10V VSS = 0V VDD = 9V VSS = 0V 16 ON RESISTANCE () -25 -20 -15 VDD = 13.2V VSS = 0V -10 VDD = 12V VSS = 0V VDD = +20V VSS = -20V 18 VDD = 10.8V VSS = 0V VDD = 11V VSS = 0V 14 TA = +125C 12 TA = +85C 10 TA = +25C 8 TA = -40C 6 TA = -55C 4 -5 0 -2 -4 -6 -8 VS, VD (V) -10 -12 -14 Figure 6. RON as a Function of VS, VD (Single Supply) 0 -20 -15 -10 -5 0 5 10 15 20 VS, VD (V) Figure 9. RON as a Function of VS (VD) for Different Temperatures, 20 V Dual Supply Rev. 0 | Page 12 of 18 13397-024 0 2 13397-023 ON RESISTANCE () 5 20 TA = 25C -30 0 VS, VD (V) Figure 5. RON as a Function of VS, VD (Dual Supply) -35 -5 13397-030 5 Enhanced Product ADG5408-EP/ADG5409-EP 1 VDD = +20V VSS = -20V VBIAS = +15V/-15V TA = +125C 25 TA = +85C 20 TA = +25C 15 TA = -40C TA = -55C 10 5 VDD = 12V VSS = 0V 0 2 4 6 8 10 12 VS, VD (V) ID (OFF) - + IS (OFF) - + -1 ID, IS (ON) - - ID (OFF) + - -2 0 25 50 75 100 125 TEMPERATURE (C) Figure 13. Leakage Currents vs. Temperature, 20 V Dual Supply 0.5 VDD = 36V VSS = 0V 20 VDD = 12V VSS = 0V VBIAS = 1V/10V ID, IS (ON) + + IS (OFF) + - LEAKAGE CURRENT (nA) 0 TA = +125C 15 TA = +85C TA = +25C 10 TA = -40C TA = -55C 5 0 0 4 8 12 16 20 24 28 32 36 VS, VD (V) VDD = +15V VSS = -15V VBIAS = +10V/-10V IS (OFF) - + ID, IS (ON) - - -1.0 -2.0 ID (OFF) + - 0 25 50 75 100 125 TEMPERATURE (C) Figure 14. Leakage Currents vs. Temperature, 12 V Single Supply Figure 11. RON as a Function of VD (VS) for Different Temperatures, 36 V Single Supply 0.5 ID (OFF) - + -0.5 -1.5 13397-032 ON RESISTANCE () 0 -3 Figure 10. RON as a Function of VS (VD) for Different Temperatures, 12 V Single Supply 25 ID, IS (ON) + + IS (OFF) + - 13397-033 0 13397-031 ON RESISTANCE () 30 LEAKAGE CURRENT (nA) 35 13397-035 40 1 ID, IS (ON) + + VDD = +36V VSS = 0V VBIAS = 1V/30V IS (OFF) + - ID, IS (ON) + + IS (OFF) + - LEAKAGE CURRENT (nA) IS (OFF) - + -0.5 ID (OFF) - + ID, IS (ON) - - -1.0 ID (OFF) + - 0 IS (OFF) - + ID (OFF) - + -1 ID, IS (ON) - - ID (OFF) + - -2 -2.0 0 25 50 75 100 125 TEMPERATURE (C) -3 0 25 50 75 100 125 TEMPERATURE (C) Figure 15. Leakage Currents vs. Temperature, 36 V Single Supply Figure 12. Leakage Currents vs. Temperature, 15 V Dual Supply Rev. 0 | Page 13 of 18 13397-036 -1.5 13397-034 LEAKAGE CURRENT (nA) 0 ADG5408-EP/ADG5409-EP Enhanced Product 0 -10 -20 -20 -30 -30 ACPSRR (dB) TA = 25C V = +15V -10 VDD = -15V SS -50 -60 -60 -70 -80 -90 -90 -100 -100 100k 1M 10M 100M 1G FREQUENCY (Hz) DECOUPLING CAPACITORS -50 -80 10k NO DECOUPLING CAPACITORS -40 -70 1k TA = 25C VDD = +15V VSS = -15V 1k VDD = 12V, V SS = 0V, V S = 6V p-p 0.10 -30 LOAD = 1k TA = 25C 0.08 -40 THD + N (%) -50 -60 0.06 VDD = 36V, V SS = 0V, V S = 18V p-p 0.04 -70 -80 VDD = 15V, V SS = 15V, V S = 15V p-p 0.02 -90 1M 10M 100M 1G FREQUENCY (Hz) 0 13397-026 100k 0 TA = 25C 15 200 INSERTION LOSS (dB) -1.0 VDD = +36V VSS = 0V 150 100 VDD = +12V VSS = 0V ADG5409 -EP -1.5 ADG5408-EP -2.0 -2.5 -3.0 -3.5 -4.0 VDD = +15V VSS = -15V -4.5 0 10 20 30 VS (V) 40 13397-019 10 1G 0 TA = 25C V = +15V -0.5 VDD = -15V SS VDD = +20V VSS = -20V 50 20 Figure 20. THD + N vs. Frequency 250 0 20 10 FREQUENCY (kHz) Figure 17. Crosstalk vs. Frequency, 15 V Dual Supply 300 5 13397-025 VDD = 20V, V SS = 20V, V S = 20V p-p -100 10k 13397-020 CROSSTALK (dB) 10M 0.12 -20 CHARGE INJECTION (pC) 1M Figure 19. ACPSRR vs. Frequency, 15 V Dual Supply TA = 25C VDD = +15V VSS = -15V -10 100k FREQUENCY (Hz) Figure 16. Off Isolation vs. Frequency, 15 V Dual Supply 0 10k 13397-022 -40 13397-021 OFF ISOLATION (dB) 0 -5.0 1k 10k 100k 1M 10M FREQUENCY (Hz) Figure 21. Bandwidth Figure 18. Charge Injection vs. Source Voltage Rev. 0 | Page 14 of 18 100M Enhanced Product ADG5408-EP/ADG5409-EP 380 330 280 VDD = +36V, V SS = 0V 230 180 VDD = +15V, V SS = -15V 130 -55 VDD = +20V, V SS = -20V -35 -15 5 25 45 65 85 TEMPERATURE (C) 105 125 13397-018 TIME (ns) VDD = +12V, V SS = 0V Figure 22. tTRANSITION Times vs. Temperature Rev. 0 | Page 15 of 18 ADG5408-EP/ADG5409-EP Enhanced Product TEST CIRCUITS D ID (ON) A IS (OFF) S2 A S8 VD NC = NO CONNECT D ID (OFF) A S8 A VS 13397-008 VD S1 13397-007 S1 NC VD Figure 23. On Leakage Figure 27. Off Leakage VDD VSS 0.1F 0.1F VDD AUDIO PRECISION VSS RS Sx V IN D VIN RL 10k GND Figure 28. THD + Noise Figure Figure 24. On Resistance VSS VDD 0.1F VSS 0.1F 0.1F VOUT VDD S1 VSS VDD RL 50 D Sx S2 VS NETWORK ANALYZER VSS RL 50 50 VS D RL 50 GND CHANNEL-TO-CHANNEL CROSSTALK = 20 log 13397-014 GND VOUT VS INSERTION LOSS = 20 log VSS VDD 0.1F 0.1F VDD NETWORK ANALYZER VSS 50 Sx 50 VS D GND OFF ISOLATION = 20 log VOUT VS VOUT 13397-013 RL 50 VOUT WITH SWITCH VOUT WITHOUT SWITCH Figure 29. Bandwidth Figure 25. Channel-to-Channel Crosstalk Figure 26. Off Isolation Rev. 0 | Page 16 of 18 VOUT 13397-017 VDD 0.1F NETWORK ANALYZER VOUT 13397-015 IDS RON = V/IDS VS 13397-006 S VS V p-p D Enhanced Product ADG5408-EP/ADG5409-EP 3V ADDRESS DRIVE (VIN) 50% 50% tr < 20ns tf < 20ns VDD VSS VDD VSS A0 0V VIN S1 A1 50 A2 tTRANSITION tTRANSITION S8 90% ADG5408-EP* 2.4V OUTPUT VS1 S2 TO S7 VS8 OUTPUT D EN 300 GND 35pF 13397-009 90% *SIMILAR CONNECTION FOR ADG5409-EP. Figure 30. Address to Output Switching Times, tTRANSITION 3V ADDRESS DRIVE (VIN) VDD VSS VDD VSS A0 VIN 0V S1 A1 50 VS S2 TO S7 A2 S8 80% ADG5408-EP* 80% OUTPUT 2.4V OUTPUT D EN 300 GND 35pF 13397-010 tD *SIMILAR CONNECTION FOR ADG5409-EP. Figure 31. Break-Before-Make Delay, tD 3V 50% VSS VDD VSS A0 50% S1 A1 0V S2 TO S8 A2 tON (EN) ADG5408-EP* tOFF (EN) 0.9VO 0.9VO OUTPUT VS VIN OUTPUT D EN 50 35pF 300 GND 13397-011 ENABLE DRIVE (VIN) VDD *SIMILAR CONNECTION FOR ADG5409-EP. Figure 32. Enable Delay, tON (EN), tOFF (EN) 3V VDD VSS VDD VSS A0 A1 VIN A2 ADG5408-EP* RS VOUT QINJ = CL x V OUT Sx D EN VS GND VOUT CL 1nF VIN *SIMILAR CONNECTION FOR ADG5409-EP. Figure 33. Charge Injection Rev. 0 | Page 17 of 18 13397-012 VOUT ADG5408-EP/ADG5409-EP Enhanced Product OUTLINE DIMENSIONS PIN 1 INDICATOR 4.10 4.00 SQ 3.90 0.35 0.30 0.25 0.65 BSC 16 13 PIN 1 INDICATOR 12 1 EXPOSED PAD 4 2.70 2.60 SQ 2.50 9 0.80 0.75 0.70 0.45 0.40 0.35 8 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF SEATING PLANE 5 BOTTOM VIEW 0.20 MIN FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COMPLIANT TO JEDEC STANDARDS MO-220-WGGC. 08-16-2010-C TOP VIEW Figure 34. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 4 mm x 4 mm Body, Very Very Thin Quad (CP-16-17) Dimensions shown in millimeters ORDERING GUIDE Model1 ADG5408TCPZ-EP-RL7 ADG5408TCPZ-EP ADG5409TCPZ-EP-RL7 ADG5409TCPZ-EP 1 Temperature Range -55C to +125C -55C to +125C -55C to +125C -55C to +125C Package Description 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] Z = RoHS Compliant Part. (c)2015 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D13397-0-9/15(0) Rev. 0 | Page 18 of 18 Package Option CP-16-17 CP-16-17 CP-16-17 CP-16-17