REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update drawing to reflect current requirements. Editorial changes throughout. - gap 01-03-07 Raymond Monnin B Boilerplate update and part of five year review. tcr 06-10-02 Raymond Monnin THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Gary L. Gross STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http://www.dscc.dla.mil CHECKED BY William J. Johnson APPROVED BY THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A Michael A. Frye DRAWING APPROVAL DATE 93-02-18 REVISION LEVEL B MICROCIRCUIT, MEMORY, DIGITAL, CMOS REGISTERED 32K X 8-BIT UVEPROM, MONOLITHIC SILICON SIZE CAGE CODE A 67268 SHEET DSCC FORM 2233 APR 97 1 OF 5962-91744 14 5962-E600-06 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 91744 Federal stock class designator \ RHA designator (see 1.2.1) 01 M X X Device type (see 1.2.2) Device class designator (see 1.2.3) Case outline (see 1.2.4) Lead finish (see 1.2.5) / \/ Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type 01 02 Generic number Circuit function 7C277 7C277 Access time 32K X 8-bit registered UVEPROM 32K X 8-bit registered UVEPROM 50 ns 40 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, nonJAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter X Y Z Descriptive designator CDIP3-T28 or GDIP4-T28 CQCC1-N32 GDFP2-F28 Terminals 28 32 28 Package style 1/ Dual-in-line package Rectangular leadless chip carrier package Flat package 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1/ Lid shall be transparent to permit ultraviolet light erasure. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91744 A REVISION LEVEL B SHEET 2 1.3 Absolute maximum ratings. 1/ Supply voltage range to ground potential (VCC) ......................... DC voltage applied to the outputs in the high Z state ................ DC input voltage ....................................................................... DC program voltage .................................................................. Maximum power dissipation ...................................................... Lead temperature (soldering, 10 seconds) ................................ Thermal resistance, junction-to-case (JC) ................................ Junction temperature (TJ) .......................................................... Storage temperature range (TSTG) ............................................ Temperature under bias............................................................. Endurance ................................................................................. Data retention ........................................................................... -0.5 V dc to +7.0 V dc -0.5 V dc to +7.0 V dc -3.0 V dc to +7.0 V dc 13.0 V dc 1.0 W 2/ +260C See MIL-STD-1835 +175C -65C to +150C -55C to +125C 50 cycles/byte, minimum 10 years, minimum 1.4 Recommended operating conditions. Supply voltage range (VCC) ....................................................... Ground voltage (GND) .............................................................. Input high voltage (VIH) .............................................................. Input low voltage (VIL) ............................................................... Case operating temperature range (TC) .................................... +4.5 V dc minimum to +5.5 V dc maximum 0 V dc 2.0 V dc minimum 0.8 V dc maximum -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or http://assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 1/ 2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Must withstand the added PD due to short circuit test e.g.; IOS. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91744 A REVISION LEVEL B SHEET 3 2.2 Non-Government publications. The following documents form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation. ELECTRONIC INDUSTRIES ALLIANCE (EIA) JEDEC Standard EIA/JESD 78 - IC Latch-Up Test. (Applications for copies should be addressed to the Electronics Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201; http://www.jedec.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.3.1 Unprogrammed or erased devices. The truth table for unprogrammed devices for contracts involving no altered item drawing shall be as specified on figure 2. When required in screening (see 4.2) group A, C, or D (see 4.3), the devices shall be programmed by the manufacturer prior to test with a checkerboard pattern or equivalent (a minimum of 50 percent of the total number of bits programmed) or to any altered item drawing pattern which includes at least 25 percent of the total number of bits programmed. 3.2.3.2 Programmed devices. The truth table for programmed devices shall be specified by an altered item drawing. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91744 A REVISION LEVEL B SHEET 4 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 42 (see MIL-PRF-38535, appendix A). 3.11 Processing EPROMS. All testing requirements and quality assurance provisions herein, shall be satisfied by the manufacturer prior to delivery. 3.11.1 Erasure of EPROMS. When specified, devices shall be erased in accordance with the procedures and characteristics specified by the manufacturer. 3.11.2 Programmability of EPROMS. When specified, devices shall be programmed to the specified pattern using the procedures and characteristics specified by the manufacturer. 3.11.3 Verification of programmed or erased EPROMs. When specified, devices shall be verified as either programmed to a specified program, or erased. As a minimum, verification shall consist of performing a functional test (subgroup 7) to verify that all bits are in the proper state. Any bit that does not verify to be in the proper state shall constitute a device failure, and shall be removed from the lot. 3.12 Data retention. A data retention stress test shall be completed as part of the vendor's reliability monitors. This test shall be done for initial characterization and after any design or process change which may affect data retention. The methods and procedures may be vendor specific, but shall guarantee the number of years listed in section 1.3 herein over the full military temperature range. The vendor's procedure shall be kept under document control and shall be made available upon request of the acquiring or preparing activity, along with test data. 3.13 Endurance. A reprogrammability test shall be completed as part of the vendor's reliability monitors. This test shall be done for initial characterization and after any design or process change which may affect the reprogrammability of the device. The methods and procedures may be vendor specific, but shall guarantee the number of program/erase endurance cycles listed in section 1.3 herein over the full military temperature range. The vendor's procedure shall be kept under document control and shall be made available upon request of the acquiring or preparing activity, along with test data. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91744 A REVISION LEVEL B SHEET 5 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified VCC = 4.5 V, IOH = -2 mA VIH = 2.0 V, VIL = 0.8 V VCC = 4.5 V, IOL = 8 mA VIH = 2.0 V, VIL= 0.8 V Group A subgroups Device type 1, 2, 3 All 1, 2, 3 All Limits Min 2.4 Unit Max Output high voltage VOH Output low voltage VOL Input high voltage 1/ VIH 1, 2, 3 All Input low voltage 1/ VIL 1, 2, 3 All Input leakage current IIX 1, 2, 3 All -10 10 A Output leakage current IOZ 1, 2, 3 All -40 40 A Output short circuit current 3/, 4/ Power supply current IOS 1, 2, 3 All -20 -90 mA ICC 1, 2, 3 All 130 mA Input capacitance 4/ CIN 4 All 10 pF Output capacitance 4/ COUT 4 All 10 pF 7, 8 All 9, 10, 11 All 10 ns 9, 10, 11 01 02 15 10 ns Functional tests Address setup to ALE inactive Address hold from ALE inactive tAL VIN = VCC to GND VCC = 5.5 V VOUT = VCC to GND 2/ VCC = 5.5 V VCC = 5.5 V, VOUT = GND VCC = 5.5 V, IOUT = 0 mA, VIH = 2.0 V, f = fmax 5/ VCC = 5.0 V, VIN= 2.0 V, TA = +25C, f = 1 MHz (see 4.4.1c) VCC = 5.0 V, VIN = 2.0 V, TA = +25C, f = 1 MHz (see 4.4.1c) See 4.4.1d See figures 3 and 4 and 6/ tLA V 0.4 V 2.0 V 0.8 V See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91744 A REVISION LEVEL B SHEET 6 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified See figures 3 and 4 and 6/ Group A subgroups Device type 9, 10, 11 tHA 01 02 01 02 All Min 15 10 50 40 0 E S setup to clock high 3/ tSES All 15 E S hold from clock high 3/ Output valid from clock high 3/ Clock pulse width tHES All 10 tCO 01 02 All Output low Z from clock high 4/, 7/ Output high Z from clock high 4/, 7/, 9/ tLZC Address pulse width tLL Address setup to clock high Address hold time from clock high tSA tPWC Limits Unit Max ns 25 20 20 Output low Z from E low 4/, 8/ tLZE 01 02 01 02 01 Output high Z from E high 4/, 8/, 9/ tHZE 02 01 20 30 02 20 1/ 2/ 3/ 4/ 5/ 6/ tHZC 30 20 30 20 30 These are absolute values with respect to device ground and all overshoots and undershoots due to system or tester noise are included. For devices using the synchronous enable, the device must be clocked after applying these voltages to perform this measurement. For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 1 second. VOUT = 0.5 V has been chosen to avoid test problems caused by tester ground degradation. Tested initially and after any design or process changes that affect that parameter, and therefore shall be guaranteed to the limits specified in table I. At f = fmax, address inputs are cycling at the maximum frequency of 1/tSA AC tests are performed with input rise and fall times of 5 ns or less, timing reference levels of 1.5 V, input pulse levels of 0 to 3.0 V, and the output load on figure 3. 7/ Applies only when the synchronous E s function is used. 8/ 9/ Applies only when the synchronous E function is used. Transition is measured at steady-state high level -500 mV or steady-state low level +500 mV on the output from the 1.5 V level on the input, CL = 5 pF (including scope and jig). See figure 3. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91744 A REVISION LEVEL B SHEET 7 Device types Case outlines Terminal number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 ALL X, Z Y Terminal symbol A9 NC A8 A9 A7 A8 A6 A7 A5 A6 A4 A5 A3 A4 A2 A3 A1 A2 A0 A1 O0 A0 O1 NC O2 O0 GND O1 O3 O2 O4 GND O5 NC O6 O3 O7 O4 O5 E/ES 21 22 23 CP ALE A14 24 25 26 27 28 29 30 31 32 A13 A12 A11 A10 VCC --------- O6 O7 E/ES CP ALE NC A14 A13 A12 A11 A10 VCC FIGURE 1. Terminal connections. Mode A14-A0 Read Output Disable A14-A0 A14-A0 Read modes CP E/ES VIL VIH VIH X ALE OUTPUTS VIL X O7-O0 HIGH Z NOTE: 1. X can be VIL or VIH FIGURE 2. Truth table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91744 A REVISION LEVEL B SHEET 8 SEE NOTE SEE NOTE Circuit A Output load Circuit B Output load for tHZC and tHZE NOTE: Including scope and jig (minimum values). Circuit Load R1 R2 CL A 658 403 30 B 658 403 5 AC test conditions Input pulse levels Input rise and fall times Input timing reference levels Output reference levels GND to 3.0 V 5 ns 1.5 V 1.5 V FIGURE 3. Output load circuit and test conditions. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91744 A REVISION LEVEL B SHEET 9 FIGURE 4. Switching waveforms. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91744 A REVISION LEVEL B SHEET 10 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015. (2) TA = +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table IIA herein. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table IIA herein. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-38535, appendix B. 4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified herein. Quality conformance inspection for device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91744 A REVISION LEVEL B SHEET 11 4.4.1 Group A inspection. a. Tests shall be as specified in table IIA herein. b. Subgroups 5 and 6 in table I, method c. Subgroup 4 (CIN and COUT measurements) shall be measured only for the initial test and after process or design changes which may affect capacitance. Capacitance shall be measured between the designated terminal and GND at a frequency of 1 MHz. Sample size is 15 devices with no failures, and all input and output terminals tested. d. For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table. For device classes Q and V, subgroups 7 and 8 shall include verifying the functionality of the device. e. O/V (latch-up) tests shall be measured only for initial qualification and after any design or process changes which may affect the performance of the device. For device class M, procedures and circuits shall be maintained under document revision level control by the manufacturer and shall be made available to the preparing activity or acquiring activity upon request. For device classes Q and V, the procedures and circuits shall be under the control of the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the preparing activity or acquiring activity upon request. Testing shall be on all pins, on five devices with zero failures. Latch-up test shall be considered destructive. Information contained in JEDEC Standard EIA/JESD 78 may be used for reference. f. All devices selected for testing shall be programmed with a checkerboard pattern, or equivalent. After completion of all testing, the devices shall be erased and verified except devices being submitted to groups B, C, and D testing. 4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein. 4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883: a. Test condition D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MILSTD-883. b. TA = +125C, minimum. c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD883. 4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein. 4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). a. End-point electrical parameters shall be as specified in table IIA herein. b. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device classes must meet the postirradiation end-point electrical parameter limits as defined in table I at TA = +25C 5C, after exposure, to the subgroups specified in table IIA herein. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91744 A REVISION LEVEL B SHEET 12 TABLE IIA. Electrical test requirements. Line No. 1 Test Requirements Interim electrical Parameters (see 4.2) Static burn-in I method 1015 Same as line 1 2 3 4 6 6A 7 8 9 10 Final electrical Parameters (programmed devices) Final electrical Parameters (unprogrammed devices) Group A test Requirements Group C end-point electrical parameters Group D end-point electrical parameters Group E end-point electrical parameters Subgroups (per MIL-PRF-38535, table III) Subgroups (in accordance with MIL-STD-883, method 5005, table I) Device class M Device class Q Device class V 1, 7, 9 Not required Not required Required Required Required Dynamic burn-in (method 1015) Same as line 1 5 1/, 2/, 3/, 4/, 5/, 6/ 1*, 7* Required 1*, 7* 1*, 2, 3, 7*, 8A, 8B, 9, 10, 11 1*, 2, 3, 7*, 8A, 8B, 9, 1*, 2, 3, 7*, 8A, 10, 11 8B, 9, 10, 11 1*, 2, 3, 7*, 8A, 8B 1*, 2, 3, 7*, 8A, 8B 1*, 2, 3, 7*, 8A, 8B 1, 2, 3, 4**, 7, 8A, 8B, 1, 2, 3, 4**, 7, 9, 10, 11 8A, 8B, 9, 10, 11 2, 3, 7, 8A, 8B 1, 2, 3, 7, 8A, 8B 1, 2, 3, 4**, 7, 8A, 8B, 9, 10, 11 2, 3, 8A, 8B 2, 3, 8A, 8B 2, 3, 8A, 8B 1, 7, 9 1, 7, 9 1, 7, 9 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1/ 2/ 3/ 4/ 5/ Blank spaces indicate tests are not applicable. Any or all subgroups may be combined when using high-speed testers. * indicates PDA applies to subgroup 1 and 7. ** see 4.4.1c. indicates delta limit (see table IIB) shall be required where specified, and the delta values shall be computed with reference to the previous interim electrical parameters (line 1). 6/ See 4.4.1e. TABLE IIB. Delta limits at +25C. Test 1/ IIX Device types All 10 percent of specified value in table I 10 percent of specified value in table I 1/ The above parameter shall be recorded before and after the required burn-in and life tests to determine the delta. IOZ STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91744 A REVISION LEVEL B SHEET 13 4.5 Programming procedure. The programming procedures shall be as specified by the device manufacturer and shall be made available upon request. 4.6 Delta measurements for device class V. Delta measurements, as specified in table IIA, shall be made and recorded before and after the required burn-in screens and steady-state life tests to determine delta compliance. The electrical parameters to be measured, with associated delta limits are listed in table IIB. The device manufacturer may, at his option, either perform delta measurements or within 24 hours after burn-in perform final electrical parameter tests, subgroups 1, 7, and 9. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor prepared specification or drawing. 6.1.2 Substitutability. Device class Q devices will replace device class M devices. 6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus (DSCC) when a system application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544. 6.4 Comments. Comments on this drawing should be directed to DSCC-VA , Columbus, Ohio 43218-3990, or telephone (614) 692-0547. 6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. CIN ......................................................Input terminal capacitance. COUT ...................................................Output terminal capacitance. GND...................................................Ground zero voltage potential. ICC ......................................................Supply current. IIX........................................................Input current. IOZ ......................................................Output current. TC .......................................................Case temperature. VCC .....................................................Positive supply voltage. 6.6 Sources of supply. 6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to this drawing. 6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103. The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DSCC-VA. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-91744 A REVISION LEVEL B SHEET 14 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 06-10-02 Approved sources of supply for SMD 5962-91744 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DSCC maintains an online database of all current sources of supply at http://www.dscc.dla.mil/Programs/Smcr/. Standard microcircuit drawing PIN 1/ 5962-9174401MXA 5962-9174401MYA 5962-9174401MZA 5962-9174402MXA 5962-9174402MYA 5962-9174402MZA Vendor CAGE number 0C7V7 0C7V7 0C7V7 0C7V7 0C7V7 0C7V7 Vendor similar PIN 2/ CY7C277-50WMB CY7C277-50QMB CY7C277-50TMB CY7C277-40WMB CY7C277-40QMB CY7C277-40TMB 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. Vendor CAGE number 0C7V7 Vendor name and address QP Semiconductor 2945 Oakmead Village Court Santa Clara, CA 95051 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin.