Low Power, Unity Gain, Fully
Differential Amplifier and ADC Driver
Data Sheet
AD8476
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©20112012 Analog Devices, Inc. All rights reserved.
FEATURES
Very low power
330 μA supply current
Extremely low harmonic distortion
−126 HD2 at 10 kHz
−128 HD3 at 10 kHz
Fully differential or single-ended inputs/outputs
Differential output designed to drive precision ADCs
Drives switched capacitor and Σ-Δ ADCs
Rail-to-rail outputs
VOCM pin adjusts output common mode
Robust overvoltage up to 18 V beyond supplies
High performance
Suitable for driving 16-bit converter up to 250 kSPS
39 nV/√Hz output noise
1 ppm/°C gain drift maximum
200 μV maximum output offset
10 V/μs slew rate
6 MHz bandwidth
Single supply: 3 V to 18 V
Dual supplies: ±1.5 V to ±9 V
APPLICATIONS
ADC driver
Differential instrumentation amplifier building block
Single-ended-to-differential converter
Battery-powered instruments
FUNCTIONAL BLOCK DIAGRAM
10kΩ
10kΩ
10kΩ
10kΩ
INN 1
+V
S
2
VOCM 3
+OUT 4
INP
8
–V
S
7
NC
6
–OUT
5
NOTES
1. NC = NO CONNECT.
DO NOT CONNECT TO THIS PIN.
10195-001
AD8476
Figure 1. 8-Lead MSOP
12
11
10
1
3
4
NC
–OUT
+OUT
9VOCM
INP
INN
2
INP
INN
6
+VS
5
+VS
7
+VS
8
+VS
16 –VS
15 –VS
14 –VS
13 –VS
10kΩ
10kΩ
10kΩ
10kΩ
AD8476
NOTES
1. NC = NO CONNECT. DO NO T CO NNE CT TO THIS PIN.
10195-002
Figure 2. 16-Lead LFCSP
GENERAL DESCRIPTION
The AD8476 is a very low power, fully differential precision
amplifier with integrated gain resistors for unity gain. It is an ideal
choice for driving low power, high performance ADCs as a
single-ended-to-differential or differential-to-differential
amplifier. It provides a precision gain of 1, common-mode level
shifting, low temperature drift, and rail-to-rail outputs for
maximum dynamic range.
The AD8476 also provides overvoltage protection from large
industrial input voltages up to ±23 V while operating on a dual 5 V
supply. Power dissipation on a single 5 V supply is only 1.5 mW.
The AD8476 works well with SAR, Σ-Δ, and pipeline converters.
The high current output stage of the part allows it to drive the
switched capacitor front-end circuits of many ADCs with
minimal error.
Unlike many differential drivers on the market, the AD8476 is
a high precision amplifier. With 200 µV maximum output
offset, 39 nV/√Hz noise, and −102 dB THD + N at 10 kHz, the
AD8476 pairs well with low power, high accuracy converters.
Considering its low power consumption and high precision, the
slew-enhanced AD8476 has excellent speed, settling to 16-bit
precision for 250 kSPS acquisition times.
The AD8476 is available in space-saving 16-lead, 3 mm × 3 mm
LFCSP and 8-lead MSOP packages. It is fully specified over the
−40°C to +125°C temperature range.
AD8476 Data Sheet
Rev. B | Page 2 of 24
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 5
Thermal Resistance ...................................................................... 5
Maximum Power Dissipation ..................................................... 5
ESD Caution .................................................................................. 5
Pin Configuration and Function Descriptions ............................. 6
Typical Performance Characteristics ............................................. 8
Terminology .................................................................................... 16
Theory of Operation ...................................................................... 17
Overview ..................................................................................... 17
Circuit Information .................................................................... 17
DC Precision ............................................................................... 17
Input Voltage Range ................................................................... 18
Driving the AD8476................................................................... 18
Power Supplies ............................................................................ 18
Applications Information .............................................................. 19
Typical Configuration ................................................................ 19
Single-Ended-to-Differential Conversion ............................... 19
Setting the Output Common-Mode Voltage .......................... 19
Low Power ADC Driving .......................................................... 20
Outline Dimensions ....................................................................... 21
Ordering Guide .......................................................................... 22
REVISION HISTORY
5/12Rev. A to Rev. B
Added LFCSP Throughout .............................................................. 1
Added Harmonic Distortion Values to Features Section and
Changed Bandwidth from 5 MHz to 6 MHz ................................ 1
Changed −3 dB Small Signal Bandwidth from 5 MHz to 6 MHz,
Changed HD2 from −120 dB to −126 dB, and Changed HD3
from −122 dB to −128 dB, Table 1 .................................................. 3
Changes to Figure 17 and Figure 19 ............................................. 10
Changes to Figure 25 ...................................................................... 11
Changes to Figure 30 ...................................................................... 12
Added Low Power ADC Driving Section ................................... 20
Updated Outline Dimensions ....................................................... 21
Changes to Ordering Guide .......................................................... 22
11/11Rev. 0 to Rev. A
Changes to Table 1 ............................................................................ 3
Changes to Typical Performance Characteristics ......................... 7
Added Figure 39; Renumbered Sequentially .............................. 13
Added Table 5 .................................................................................. 18
Removed Low Power ADC Driving Section ............................... 19
Removed Figure 52 ......................................................................... 19
10/11Revision 0: Initial Version
Data Sheet AD8476
Rev. B | Page 3 of 24
SPECIFICATIONS
VS = +5 to ±5 V, VOCM = midsupply, VOUT = V+OUT − V−OUT, RL = 2 kΩ differential, referred to output (RTO), TA = 25°C, unless
otherwise noted.
Table 1.
Parameter Test Conditions/Comments
B Grade A Grade
Unit Min Typ Max Min Typ Max
DYNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth VOUT = 200 mV p-p 6 6 MHz
−3 dB Large Signal Bandwidth VOUT = 2 V p-p 1 1 MHz
Slew Rate VOUT = 2 V step 10 10 V/µs
Settling Time to 0.01% VOUT = 2 V step 1.0 1.0 µs
Settling Time to 0.001% VOUT = 2 V step 1.6 1.6 µs
NOISE/DISTORTION1
THD + N f = 10 kHz, VOUT = 2 V p-p,
22 kHz filter
−102 −102 dB
HD2 f = 10 kHz, VOUT = 2 V p-p −126 −126 dB
HD3 f = 10 kHz, VOUT = 2 V p-p −128 −128 dB
IMD3
f
1
= 95 kHz, f
2
= 105 kHz,
VOUT = 2 V p-p
−82
−82
dBc
Output Voltage Noise f = 0.1 Hz to 10 Hz 6 6 µV p-p
Spectral Noise Density f = 10 kHz 39 39 nV/√Hz
GAIN 1 1 V/V
Gain Error RL = ∞ 0.02 0.04 %
Gain Drift −40°C ≤ TA ≤ +125°C 1 1 ppm/°C
Gain Nonlinearity VOUT = 4 V p-p 5 5 ppm
OFFSET AND CMRR
Differential Offset2 50 200 50 500 µV
vs. Temperature −40°C ≤ TA ≤ +125°C 900 900 µV
Average TC −40°C ≤ TA ≤ +125°C 1 4 1 4 µV/°C
vs. Power Supply (PSRR) VS = ±2.5 V to ±9 V 90 90 dB
Common-Mode Offset2 50 50 µV
Common-Mode Rejection
Ratio
VIN,cm = ±5 V 90 80 dB
INPUT CHARACTERISTICS
Input Voltage Range3 Differential input −VS + 0.05 +VS − 0.05 −VS + 0.05 +VS 0.05 V
Single-ended input 2(−VS + 0.05) 2(+V 0.05) 2(−VS + 0.05) 2(+VS − 0.05) V
Impedance4 Vcm = VS/2
Single-Ended Input 13.3 13.3 kΩ
Differential Input 20 20 kΩ
Common-Mode Input
10
10
kΩ
OUTPUT CHARACTERISTICS
Output Swing VS = +5 V −VS + 0.125 +VS − 0.14 −VS + 0.125 +VS − 0.14
VS = ±5 V −VS + 0.155 +VS0.18 −VS + 0.155 +VS0.18
Output Balance Error ∆VOUT,cm/∆VOUT,dm 90 80 dB
Output Impedance 0.1 0.1
Capacitive Load Per output 20 20 pF
Short-Circuit Current Limit 35 35 mA
VOCM CHARACTERISTICS
VOCM Input Voltage Range −VS + 1 +VS − 1 −VS + 1 +VS − 1 V
VOCM Input Impedance 500 500 kΩ
VOCM Gain Error 0.05 0.05 %
AD8476 Data Sheet
Rev. B | Page 4 of 24
Parameter Test Conditions/Comments
B Grade A Grade
Unit Min Typ Max Min Typ Max
POWER SUPPLY
Specified Supply Voltage ±5 ±5 V
Operating Supply Voltage
Range
3 18 3 18 V
Supply Current VS = +5 V, TA = 25°C 300 330 300 330 μA
VS = ±5 V, TA = 25°C 330 380 330 380 μA
Over Temperature −40°C ≤ TA ≤ +125°C 400 500 400 500 μA
TEMPERATURE RANGE
Specified Performance Range −40 +125 −40 +125 °C
1 Includes amplifier voltage and current noise, as well as noise of internal resistors.
2 Includes input bias and offset current errors.
3 The input voltage range is a function of the voltage supplies and ESD diodes.
4 Internal resistors are trimmed to be ratio matched but have ±20% absolute accuracy.
Data Sheet AD8476
Rev. B | Page 5 of 24
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Supply Voltage ±10 V
Maximum Voltage at Any Input Pin
+V
S
+ 18 V
Minimum Voltage at Any Input Pin −VS18 V
Storage Temperature Range 65°C to +15C
Specified Temperature Range −40°C to +125°C
Package Glass Transition Temperature (TG) 150°C
ESD (Human Body Model) 2500 V
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
The θJA values in Table 3 assume a 4-layer JEDEC standard
board with zero airflow.
Table 3. Thermal Resistance
Package Type θJA Unit
8-Lead MSOP 209.0 °C/W
16-Lead LFCSP, 3 mm × 3 mm
78.5
°C/W
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation for the AD8476 is limited
by the associated rise in junction temperature (TJ) on the die. At
approximately 15C, which is the glass transition temperature,
the properties of the plastic change. Even temporarily exceeding
this temperature limit may change the stresses that the package
exerts on the die, permanently shifting the parametric performance
of the amplifiers. Exceeding a temperature of 15C for an
extended period may result in a loss of functionality.
ESD CAUTION
AD8476 Data Sheet
Rev. B | Page 6 of 24
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
INN
1
+V
S2
VOCM
3
+OUT
4
INP
8
–V
S
7
NC
6
–OUT
5
AD8476
TOP VIEW
(No t t o Scal e)
10195-004
NOTES
1. P INS L ABE LED NC CAN BE ALL OW E D
TO FLOAT, BUT IT IS BETTER TO CONNECT
THESE PINS TO GROUND. AVOID ROUTING
HIGH SPE E D S IG NALS THRO UGH THE S E
PI NS BE CAUS E NOIS E COUPLI NG MAY RE S ULT.
Figure 3. 8-Lead MSOP Pin Configuration
Table 4. 8-Lead MSOP Pin Function Descriptions
Pin No. Mnemonic Description
1 INN Negative Input .
2 +VS Positive Supply.
3 VOCM Output Common-Mode Adjust.
4 +OUT Noninverting Output.
5 −OUT Inverting Output.
6 NC This pin is not connected internally (see Figure 3).
7
−V
S
Negative Supply.
8 INP Positive Input.
Data Sheet AD8476
Rev. B | Page 7 of 24
12
11
10
1
3
4
NC
–OUT
+OUT
9VOCM
INP
INN
2
INP
INN
6+VS
5+VS
7+VS
8
+VS
16 –VS
15 –VS
14 –VS
13 –VS
AD8476
TOP VIEW
(No t t o Scal e)
10195-003
NOTES
1. P INS L ABE LED NC CAN BE ALL OW E D TO FL OAT ,
BUT IT IS BETTER TO CONNECT THESE PINS TO
GROUND. AV OI D ROUT ING HIGH S P E E D S IG NALS
THROUGH THES E P INS BE CAUS E NOI S E COUPL ING
MAY RESULT.
2. SO LDER T HE E X P OSE D P ADDLE ON T HE BACK OF
THE P ACKAGE T O A G ROUND PLANE.
Figure 4. 16-Lead LFCSP Pin Configuration
Table 5. 16-Lead LFCSP Pin Function Descriptions
Pin No. Mnemonic Description
1
INP
Positive Input.
2 INP Positive Input.
3 INN Negative Input.
4 INN Negative Input .
5 +VS Positive Supply.
6
+V
S
Positive Supply.
7 +VS Positive Supply.
8 +VS Positive Supply.
9 VOCM Output Common-Mode Adjust.
10 +OUT Noninverting Output.
11 −OUT Inverting Output.
12 NC This pin is not connected internally (see Figure 4).
13 −VS Negative Supply.
14 −VS Negative Supply.
15 −VS Negative Supply.
16 −VS Negative Supply.
EPAD Solder the exposed paddle on the back of the package to a ground plane.
AD8476 Data Sheet
Rev. B | Page 8 of 24
TYPICAL PERFORMANCE CHARACTERISTICS
VS = +5 V, G = 1, VOCM connected to 2.5 V, RL = 2 kΩ differentially, TA = 25°C, referred to output (RTO), unless otherwise noted.
50
–50
–40
–30
–20
–10
0
10
20
30
40
–40 –25 –10 520 35 50 65 80 95 110 125
CMRR (µV/V)
TEMPERATURE (°C)
10195-005
NORM ALIZED TO 25°C
Figure 5. CMRR vs. Temperature
–40 –25 –10 520 35 50 65 80 95 110 125
OFFSET VOLTAGE (µV)
TEMPERATURE (°C)
10195-006
–1500
–1300
–1100
–900
–700
–500
–300
–100
100
300
500
700
900
1100
1300
1500 NORM ALIZED TO 25°C
Figure 6. System Offset Temperature Drift
–40 –25 –10 520 35 50 65 80 95 110 125
GAIN ERRO R ( µV/V)
TEMPERATURE (°C)
10195-007
–150
–100
–50
0
50
100
150 NORM ALIZED TO 25°C
Figure 7. Gain Error vs. Temperature
15
–15
–10
–5
0
5
10
–15 –10 –5 0 5 10 15
COMMON-MODE VOLT AGE (V)
OUTPUT VOLTAGE (V)
10195-008
VS = ±5V
VS = ±2. 5V
Figure 8. Input Common-Mode Voltage vs. Output Voltage,
VS = ±5 V and ±2.5 V
115
65
70
75
80
85
90
95
100
105
110
10 100 1k 10k 100k 1M
CMRR (dB)
FREQUENCY (Hz)
VS = ±5V
VS = +5V
10195-010
Figure 9. Common-Mode Rejection vs. Frequency
–20
–100
–90
–80
–70
–60
–50
–40
–30
100 1k 10k 100k 1M 10M
PSRR ( dB)
FRE QUENCY ( Hz )
10195-011
VS = ±5V
VS = +5V
Figure 10. Power Supply Rejection vs. Frequency
Data Sheet AD8476
Rev. B | Page 9 of 24
20
18
16
14
12
10
8
6
4
2
0
100 1k 10k 100k 10M1M
MAXIMUM OUTPUT VOLT AGE (V p -p )
FRE QUENCY ( Hz )
2kΩ LOAD
NO LOAD
10195-012
Figure 11. Maximum Output Voltage vs. Frequency
1k 10k 100k 1M
OUTPUT VOLTAGE SWING (V)
REFERRED TO SUPPLY VO L T AGES
R
LOAD (Ω)
10195-013
–55°C
–40°C
+25°C
+85°C
+125°C
+VS
0.050
0.025
0.075
0.100
0.125
–VS
0.025
0.050
0.075
0.100
0.125
0.150
0.175
0.150
0.175
Figure 12. Output Voltage Swing vs. RLOAD vs. Temperature, VS = ±5 V
–40 –25 –10 520 35 50 65 80 95 110 125
SLEW RATE (V/µS)
TEMPERATURE (°C)
10195-015
15
5
6
7
8
9
10
11
12
13
14
RISE
FALL
Figure 13. Slew Rate vs. Temperature
–40 –25 –10 520 35 50 65 80 95 110 125
CURRENT ( mA)
TEMPERATURE (°C)
10195-016
50
5
10
15
20
25
30
35
40
45
V
S
= ±5V
V
S
= ±2. 5V
Figure 14. Short-Circuit Current vs. Temperature
10µA 100µA 1mA 10mA
OUTPUT VOLTAGE SWING (V)
REFERRED TO SUPPLY VO L T AGES
CURRENT ( A)
10195-014
+V
S
0.050
0.025
0.075
0.100
0.125
–V
S
0.025
0.050
0.075
0.100
0.125
0.150
0.175
0.150
0.175 +125°C
+85°C
+25°C
–40°C
–55°C
Figure 15. Output Voltage Swing vs. Load Current vs. Temperature,
VS = ±5 V
2V/DIV
2µs/DIV
10195-051
V
IN
V
OUT
Figure 16. Overdrive Recovery, VS = +5 V
AD8476 Data Sheet
Rev. B | Page 10 of 24
10
–50
–45
–40
–35
–30
–25
–20
–15
–10
–5
0
5
100 1k 10k 100k 1M 10M
GAIN (d B)
FREQUENCY (Hz)
V
S
= ±5V
V
S
= +5V
10195-017
Figure 17. Small Signal Frequency Response for Various Supplies
10
–50
–45
–40
–35
–30
–25
–20
–15
–10
–5
0
5
100 1k 10k 100k 1M 10M
GAIN (d B)
FREQUENCY (Hz)
RL = 10kΩ
RL = 2kΩ
RL = 200Ω
10195-018
Figure 18. Small Signal Frequency Response for Various Loads
10
–50
–45
–40
–35
–30
–25
–20
–15
–10
–5
0
5
100 1k 10k 100k 1M 10M
OUTPUT M AGNI TUDE ( dB)
FRE QUENCY ( Hz )
10195-019
CL = 5pF
CL = 10pF
CL = 15pF
Figure 19. Small Signal Frequency Response for Various Capacitive Loads
10
–50
–45
–40
–35
–30
–25
–20
–15
–10
–5
0
5
100 1k 10k 100k 1M 10M
GAIN (d B)
FREQUENCY (Hz)
V
S
= ±5V
V
S
= +5V
10195-020
Figure 20. Large Signal Frequency Response for Various Supplies
10
–40
–35
–30
–25
–20
–15
–10
–5
0
5
100 1k 10k 100k 1M 10M
OUTPUT M AGNI TUDE ( dB)
FREQUENCY (Hz)
R
L
= 10kΩ
R
L
= 2kΩ
R
L
= 200Ω
10195-021
Figure 21. Large Signal Frequency Response for Various Loads
10
–40
–35
–30
–25
–20
–15
–10
–5
0
5
100 1k 10k 100k 1M 10M
OUTPUT M AGNI TUDE ( dB)
FRE QUENCY ( Hz )
10195-101
C
L
= 5pF
C
L
= 10pF
C
L
= 15pF
Figure 22. Large Signal Frequency Response for Various Capacitive Loads
Data Sheet AD8476
Rev. B | Page 11 of 24
5
–25
–20
–15
–10
–5
0
1k 10k 100k 1M 10M
OUTPUT M AGNI TUDE ( dB)
FRE QUENCY ( Hz )
VO CM = 1.0V
VO CM = 2.5V
VO CM = 4.0V
10195-024
Figure 23. Small Signal Frequency Response for Various VOCM Levels
5
–30
–25
–20
–15
–10
–5
0
1k 100k10k 1M 10M
OUTPUT M AGNI TUDE ( dB)
VO CM INPUT FREQUENCY ( Hz )
10195-056
POSITIVE OUTPUT (2 LOAD) V
S
= 5V
NEGATIVE OUTPUT (2 LOAD)
Figure 24. VOCM Small Signal Frequency Response
50mV/DIV
500ns/DIV
VS = ±5V
VS = +5V
VS = +3V
10195-029
Figure 25. Small Signal Pulse Response for Various Supplies
5
–35
–20
–25
–30
–15
–10
–5
0
1k 10k 100k 1M 10M
OUTPUT M AGNI TUDE ( dB)
FREQUENCY (Hz)
C
L
= 5pF
C
L
= 10pF
C
L
= 15pF
10195-027
Figure 26. Large Signal Frequency Response for Various VOCM Level
5
–30
–25
–20
–15
–10
–5
0
1k 100k10k 1M
OUTPUT M AGNI TUDE ( dB)
VO CM INPUT FREQUENCY ( Hz )
10195-055
POSITIVE OUTPUT
NEGATIVE OUTPUT
Figure 27. VOCM Large Signal Frequency Response
500mV/DIV
500ns/DIV
10195-032
VS = ±5V
VS = +5V
VS = +3V
Figure 28. Large Signal Pulse Response for Various Supplies
AD8476 Data Sheet
Rev. B | Page 12 of 24
50mV/DIV
500ns/DIV
R
L
= 10kΩ
R
L
= 2kΩ
R
L
= 200Ω
10195-031
Figure 29. Small Signal Step Response for Various Resistive Loads, VS = ±5 V
50mV/DIV
500ns/DIV
C
L
= 0pF
C
L
= 5pF
C
L
= 10pF
10195-030
Figure 30. Small Signal Step Response for Various Capacitive Loads, VS = ±5 V
20mV/DIV
500ns/DIV
10195-035
Figure 31. VOCM Small Signal Step Response
500mV/DIV
500ns/DIV
R
L
= 10kΩ
R
L
= 2kΩ
R
L
= 200Ω
10195-033
Figure 32. Large Signal Step Response for Various Resistive Loads, VS = ±5 V
500mV/DIV
500ns/DIV
C
L
= 0pF
C
L
= 5pF
C
L
= 10pF
10195-034
Figure 33. Large Signal Step Response for Various Capacitive Loads, VS = ±5 V
500mV/DIV
10µs/DIV
10195-038
Figure 34. VOCM Large Signal Step Response
Data Sheet AD8476
Rev. B | Page 13 of 24
3.0
–3.0
–2.5
–2.0
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
2.0
2.5
0100908070605040302010
OUTPUT VOLTAGE (µV)
TIME (Seconds)
10195-039
Figure 35. 0.1 Hz to 10 Hz Voltage Noise
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
100 1k 10k 100k 1M
HARMO NIC DIS TO RTI ON (dBc)
FRE QUENCY ( Hz )
10195-040
HD2, R
L
= NO LOAD
HD3, R
L
= NO LOAD
HD2, R
L
= 2kΩ LOAD
HD3, R
L
= 2kΩ LOAD
Figure 36. Harmonic Distortion vs. Frequency at Various Loads
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
100 1k 10k 100k 1M
HARMO NIC DIS TO RTI ON (dBc)
FRE QUENCY ( Hz )
10195-042
HD2 (VS = ±5V , RL = 2kΩ)
HD3 (VS = ±5V , RL = 2kΩ)
HD2 (VS = +5V, RL = 2kΩ)
HD3 (VS = +5V, RL = 2kΩ)
Figure 37. Harmonic Distortion vs. Frequency at Various Supplies
140
130
120
110
100
90
80
70
60
50
40
30
20 110 100 1k 10k 100k
SPECTRAL NOISE DENSITY (nV/ Hz)
FRE QUENCY ( Hz )
10195-036
Figure 38. Voltage Noise Density vs. Frequency
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
100 1k 10k 100k 1M
HARMO NIC DIS TO RTI ON (dBc)
FRE QUENCY ( Hz )
10195-046
HD2 (V
OUT
= 4V p-p)
HD3 (V
OUT
= 4V p-p)
HD2 (V
OUT
= 2V p-p)
HD3 (V
OUT
= 2V p-p)
Figure 39. Harmonic Distortion vs. Frequency at Various VOUT,dm
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140 012345678910
HARMO NIC DIS TO RTI ON (dBc)
V
OUT
(V p-p)
10195-047
HD2, V
S
= 5V
HD3, V
S
= 5V
Figure 40. Harmonic Distortion vs. VOUT,dm, f = 10 kHz
AD8476 Data Sheet
Rev. B | Page 14 of 24
–140
–130
–120
–110
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
100 1k 10k 100k 1M
HARMO NIC DI STORTION (dBc)
FREQUENCY (Hz)
HD2 (SING LE- E NDE D INPUT)
HD3 (SING LE- E NDE D INPUT)
HD2 (DI FF E RE NTI AL I NP UT)
HD3 (DI FF E RE NTI AL I NP UT)
10195-139
Figure 41. Harmonic Distortion vs. Input Drive
–80
–120
–115
–110
–105
–100
–95
–90
–85
10 1k100 10k 100k
THD + N ( dB)
FRE QUENCY ( Hz )
10195-053
VOUT = 2V p-p
VOUT = 4V p-p
VOUT = 8V p-p
Figure 42. Total Harmonic Distortion + Noise vs. Frequency
1µs/DIV
10195-037
1V/DIV
200µV/DIV
0.01%/DIV
Figure 43. Settling Time to 0.01% of 2 V Step
40
–40
–35
–30
–25
–20
–15
–10
–5
0
5
10
15
20
25
30
35
–1.0 –0.8 –0.6 –0.4 –0.2 00.2 0.4 0.6 0.8 1.0
ERRO R ( pp m)
OUTPUT VOLTAGE (V)
10195-200
VS = ±5V
Figure 44. Gain Nonlinearity
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
100 1k 10k 100k 1M
SPURIO US - FREE DY NAM CIC RANG E ( dBc)
FRE QUENCY ( Hz )
10195-049
VS = 5V, RL = 2kΩ
VS = 5V, RL = NO LOAD
Figure 45. Spurious-Free Dynamic Range vs. Frequency at Various Loads
2µs/DIV
10195-100
1V/DIV
20µV/DIV
0.001%/DIV
Figure 46. Settling Time to 0.001% of 2 V Step
Data Sheet AD8476
Rev. B | Page 15 of 24
–30
–40
–50
–60
–70
–80
–90
–100
100 1k 10k 100k 1M 10M
OUTPUT BAL ANCE E RROR (dB)
FRE QUENCY ( Hz )
10195-050
Figure 47. Output Balance Error vs. Frequency
10
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
80 10090 110 1209585 105 115
NORM ALI ZED S P E CTRUM ( dBc)
FRE QUENCY ( Hz )
10195-054
Figure 48. 100 kHz Intermodulation Distortion
1k
100
10
1
0.1
10k 100k 1M 10M
IMPEDANCE (Ω)
FRE QUENCY ( Hz )
10195-052
POSITIVE OUTPUT
NEGATIVE OUTPUT
Figure 49. Output Impedance vs. Frequency
AD8476 Data Sheet
Rev. B | Page 16 of 24
TERMINOLOGY
+IN
VOCM
–IN +OUT
–OUT
VOUT, dm
RL, dm
AD8476
10kΩ
10kΩ
10kΩ
10kΩ
10195-057
Figure 50. Signal and Circuit Definitions
Differential Voltage
Differential voltage refers to the difference between two
node voltages. For example, the output differential voltage (or
equivalently, output differential mode voltage) is defined as
VOUT, dm = (V+OUTV−OUT)
where V+OUT and V−OUT refer to the voltages at the +OUT and
−OUT terminals with respect to a common ground reference.
Similarly, the differential input voltage is defined as
VIN, dm = (V+IN VIN)
Common-Mode Voltage
Common-mode voltage refers to the average of two node voltages
with respect to the local ground reference. The output common-
mode voltage is defined as
VOUT, cm = (V+OUT + V−OUT)/2
Balance
Output balance is a measure of how close the output differential
signals are to being equal in amplitude and opposite in phase.
Output balance is most easily determined by placing a well-
matched resistor divider between the differential voltage nodes
and comparing the magnitude of the signal at the divider midpoint
with the magnitude of the differential signal. By this definition,
output balance is the magnitude of the output common-mode
voltage divided by the magnitude of the output differential
mode voltage.
dmOUT
cmOUT
V
V
ErrorBalanceOutput
,
,
=
Data Sheet AD8476
Rev. B | Page 17 of 24
THEORY OF OPERATION
OVERVIEW
The AD8476 is a fully differential amplifier, with integrated laser-
trimmed resistors, that provides a precision gain of 1. The
internal differential amplifier of the AD8476 differs from
conventional operational amplifiers in that it has two outputs
whose voltages are equal in magnitude, but move in opposite
directions (180° out of phase).
The AD8476 is designed to greatly simplify single-ended-to-
differential conversion, common-mode level shifting and
precision driving of differential signals into low power,
differential input ADCs. The VOCM input allows the user to
set the output common-mode voltage to match with the input
range of the ADC. Like an operational amplifier, the VOCM
function relies on high open-loop gain and negative feedback to
force the output nodes to the desired voltages.
10kΩ
10kΩ
10kΩ
10kΩ
INN 1
+VS2
VOCM 3
+OUT 4
INP
8
–VS
7
NC
6
–OUT
5
NOTES
1. NC = NO CONNECT.
DO NOT CONNECT TO THIS PIN.
10195-058
AD8476
Figure 51. Block Diagram
CIRCUIT INFORMATION
The AD8476 amplifier uses a voltage feedback topology;
therefore, the amplifier exhibits a nominally constant gain
bandwidth product. Like a voltage feedback operational
amplifier, the AD8476 also has high input impedance at its
internal input terminals (the summing nodes of the internal
amplifier) and low output impedance.
The AD8476 employs two feedback loops, one each to control
the differential and common-mode output voltages. The differen-
tial feedback loop, which is fixed with precision laser-trimmed
on-chip resistors, controls the differential output voltage.
Output Common-Mode Voltage (VOCM)
The internal common-mode feedback controls the common-
mode output voltage. This architecture makes it easy for the
user to set the output common-mode level to any arbitrary
value independent of the input voltage. The output common-
mode voltage is forced by the internal common-mode feedback
loop to be equal to the voltage applied to the VOCM input. The
VOCM pin can be left unconnected, and the output common-
mode voltage self-biases to midsupply by the internal feedback
control.
Due to the internal common-mode feedback loop and the fully
differential topology of the amplifier, the AD8476 outputs are
precisely balanced over a wide frequency range. This means that
the amplifier’s differential outputs are very close to the ideal of
being identical in amplitude and exactly 180° out of phase.
DC PRECISION
The dc precision of the AD8476 is highly dependent on the
accuracy of its integrated gain resistors. Using superposition to
analyze the circuit shown in Figure 52, the following equation
shows the relationship between the input and output voltages of
the amplifier:
( ) ( )
( ) ( )
NP
dmOUT
NP
cmOUT
NPNP
dmIN
NPcmIN
RRVRRV
RRRRVRRV
+++=
+++
2
2
1
2
2
1
,
,
,
,
where:
RGP
RFP
RP=
,
RGN
RFN
RN=
NP
dmIN
VVV =
,
)(
2
1
,NPcmIN VVV +=
The differential closed-loop gain of the amplifier is
NP
NPNP
dmIN
dmOUT
RR
RRRR
V
V
++
++
=2
2
,
,
and the common rejection of the amplifier is
( )
NP
NP
cmIN
dmOUT
RR
RR
V
V
++
=2
2
,
,
RFP
RFN
RGP
RGN
V
ON
V
OP
VOCM
V
P
V
N
10195-059
Figure 52. Functional Circuit Diagram of the AD8476 at a Given Gain
The preceding equations show that the gain accuracy and the
common-mode rejection (CMRR) of the AD8476 are deter-
mined primarily by the matching of the feedback networks
(resistor ratios). If the two networks are perfectly matched, that
is, if RP and RN equal RF/RG, then the resistor network does not
generate any CMRR errors and the differential closed loop gain
of the amplifier reduces to
RG
RF
v
v
dmIN
dmOUT
=
,
,
AD8476 Data Sheet
Rev. B | Page 18 of 24
The AD8476 integrated resistors are precision wafer-laser-
trimmed to guarantee a minimum CMRR of 90 dB (32 μV/V),
and gain error of less that 0.02%. To achieve equivalent precision
and performance using a discrete solution, resistors must be
matched to 0.01% or better.
INPUT VOLTAGE RANGE
The AD8476 can measure input voltages as large as the supply
rails. The internal gain and feedback resistors form a divider,
which reduces the input voltage seen by the internal input
nodes of the amplifier. The largest voltage that can be measured
properly is constrained by the output range of the amplifier and
the capability of the amplifier’s internal summing nodes. This
voltage is defined by the input voltage, and the ratio between the
feedback and the gain resistors.
Figure 53 shows the voltage at the internal summing nodes of
the amplifier, defined by the input voltage and internal resistor
network. If VN is grounded, the expression shown reduces to
+
+
==
P
MINUSPLUS
V
RG
RF
VOCM
RGRF
RG
VV 2
1
The internal amplifier of the AD8476 has rail-to-rail inputs.
To obtain accurate measurements with minimal distortion, the
voltage at the internal inputs of the amplifier must stay below
+VS − 1 V and above −VS.
The AD8476 provides overvoltage protection for excessive input
voltages beyond the supply rails. Integrated ESD protection diodes
at the inputs prevent damage to the AD8476 up to +VS + 18 V
and −VS − 18 V.
DRIVING THE AD8476
Care should be taken to drive the AD8476 with a low
impedance source: for example, another amplifier. Source
resistance can unbalance the resistor ratios and, therefore,
significantly degrade the gain accuracy and common-mode
rejection of the AD8476. For the best performance, source
impedance to the AD8476 input terminals should be kept
below 0.1 Ω. Refer to the DC Precision section for details on
the critical role of resistor ratios in the precision of the AD8476.
POWER SUPPLIES
The AD8476 operates over a wide range of supply voltages. It
can be powered on a single supply as low as 3 V and as high as
18 V. The AD8476 can also operate on dual supplies from
±1.5 V to ±9 V
A stable dc voltage should be used to power the AD8476. Note
that noise on the supply pins can adversely affect performance.
For more information, see the PSRR performance curve in
Figure 10.
Place a bypass capacitor of 0.1 μF between each supply pin and
ground, as close as possible to each supply pin. Use a tantalum
capacitor of 10 μF between each supply and ground. It can be
farther away from the supply pins and, typically, it can be
shared by other precision integrated circuits.
RF
RF
RG
RG
VON
VOP
VOCM
VP
VN
VN
RF + RG
RF
VP − VN
RG
RF
VOCM
RF + RG
RG +
+2
1
10195-060
Figure 53. Voltages at the Internal Op Amp Inputs of the AD8476
Data Sheet AD8476
Rev. B | Page 19 of 24
APPLICATIONS INFORMATION
TYPICAL CONFIGURATION
The AD8476 is designed to facilitate single-ended-to-differential
conversion, common-mode level shifting, and precision processing
of signals so that they are compatible with low voltage ADCs.
Figure 54 shows a typical connection diagram of the AD8476.
SINGLE-ENDED-TO-DIFFERENTIAL CONVERSION
Many industrial systems have single-ended inputs from input
sensors; however, the signals are frequently processed by high
performance differential input ADCs for higher precision. The
AD8476 performs the critical function of precisely converting
single-ended signals to the differential inputs of precision
ADCs, and it does so with no need for external components.
To convert a single-ended signal to a differential signal, connect
one input to the signal source and the other input to ground (see
Figure 54). Note that either input can be driven by the source
with the only effect being that the outputs have reversed polarity.
The AD8476 also accepts truly differential input signals in
precision systems with differential signal paths.
SETTING THE OUTPUT COMMON-MODE VOLTAGE
The VOCM pin of the AD8476 is internally biased by a
precision voltage divider comprising of two 1 MΩ resistors
between the supplies. This divider level shifts the output to
midsupply. Relying on the internal bias results in an output
common-mode voltage that is within 0.05% of the expected
value.
10195-102
10kΩ
10kΩ
10kΩ
10kΩ
INN 1
+V
S
2
VOCM 3
+OUT 4
INP
8
–V
S
7
NC
6
–OUT
5
AD8476
LOAD
INPUT
SIGNAL
SOURCE
+5V
–V
OUT
+V
OUT
+
10µF
0.1µF
+
10µF
0.1µF
–5V
Figure 54. Typical Configuration—8-Lead MSOP
In cases where control of the output common-mode level is
desired, an external source or resistor divider can be used to
drive the VOCM pin. If driven directly from a source, or with a
resistor divider of unequal resistor values, the resistance seen by
the VOCM pin should be less than 1 kΩ. If an external voltage
divider consisting of equal resistor values is used to set VOCM
to midsupply, higher values can be used because the external
resistors are placed in parallel with the internal resistors. The
output common-mode offset listed in the Specifications section
assumes that the VOCM input is driven by a low impedance
voltage source.
Because of the internal divider, the VOCM pin sources and sinks
current, depending on the externally applied voltage and its
associated source resistance.
It is also possible to connect the VOCM input to the common-
mode level output of an ADC; however, care must be taken to
ensure that the output has sufficient drive capability. The input
impedance of the VOCM pin is 500 kΩ. If multiple AD8476
devices share one ADC reference output, a buffer may be neces-
sary to drive the parallel inputs.
Table 6. Differential Input ADCs1
ADC Resolution Throughput Rate Power Dissipation
AD7674 16 Bits 100 kSPS 25 mW
AD7684 16 Bits 100 kSPS 6 mW
AD7687 16 Bits 250 kSPS 12.5 mW
AD7688
16 Bits
500 kSPS*
21.5 mW
1 Depending on measurement/application type, check that the AD8476 meets
settling time requirements.
AD8476 Data Sheet
Rev. B | Page 20 of 24
LOW POWER ADC DRIVING
The AD8476 is designed to be a low power driver for ADCs
with up to 16-bit precision and sampling rates of up to
250 kSPS. The circuit in Figure 56 shows the AD8476 driving
the AD7687, a 16-bit, 250 kSPS fully differential SAR ADC.
The filter between the AD8476 and the ADC reduces high
frequency noise and reduces switching transients from the
sampling of the ADC.
Choose the values of this filter with care. Optimal values for the
filter may need to be determined empirically, but the guidelines
discussed herein are provided to help the user. For optimum
performance, this filter should be fast enough to settle full-scale
to 0.5 LSB of the ADC within the acquisition time specified in
the ADC data sheet, in this case, the AD7687. If the filter is
slower than the acquisition time, distortion can result that looks
like harmonics. If the filter is too fast, the noise bandwidth of
the amplifier increases, thereby reducing the SNR of your
system.
Additional considerations help determine the values of the
individual components. THD of the ADC is likely to increase
with source resistance. This is stated in the ADC data sheet.
To reduce this effect, try to use smaller resistance and larger
capacitance. Large capacitance values much greater than 2 nF
are hard for the amplifier to drive. Higher capacitance also
increases the effect of changes in output impedance.
It is also important to consider the signal frequency range of
interest. The AD8476 THD decreases with higher frequency
(see Figure 42) and output impedance increases with higher
frequency (see Figure 49). This higher output impedance yields
slower settling, thus be certain to choose your capacitance so
that the filter still meets the settling requirement at the
maximum frequency of interest.
In the application shown, a 100 Ω resistors and 2.2 nF
capacitors at each output were chosen. For driving the AD7687,
this combination yields an SNR loss of 2.5 dB and good THD
performance for a 20 kHz fundamental frequency, with an ADC
throughput rate of 250kSPS. The filter bandwidth can be
determined by the following equation:
RC
FrequencyFilter
2
1
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
–180
–170
–160
–150
0 20406080100120140
ADC FULL SCALE (dB)
FREQUENCY (kHz)
10195-064
V
IN
= 8V p-p
THD = –112dB
SNR = 93dB
Figure 55. FFT of AD8476 Driving the AD7687
10195-063
AD8476
AD7687
–OUT
+OUT
+IN
–IN VOCM
–V
S
+V
S
+5V
VDD
IN–
IN+
+2.5V +1.8V TO +5V
+5V
REF GND
VIO
SDI
SCK
SDO
CNV
100
100
2.2nF
2.2nF
+4.5V
+2.5V
+0.5V
4V
+
4
V
+
2
V
0V
4V
+
4
V
+
2
V
0V
4V
+4.5
V
+2.5V
+0.5V
4V
Figure 56. AD8476 Conditioning and Level Shifting a Differential Voltage to Drive Single-Supply ADC
Data Sheet AD8476
Rev. B | Page 21 of 24
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MO-187-AA
0.80
0.55
0.40
4
8
1
5
0.65 BSC
0.40
0.25
1.10 MAX
3.20
3.00
2.80
COPLANARITY
0.10
0.23
0.09
3.20
3.00
2.80
5.15
4.90
4.65
PIN 1
IDENTIFIER
15° MAX
0.95
0.85
0.75
0.15
0.05
10-07-2009-B
Figure 57. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
3.10
3.00 SQ
2.90
0.27
0.20
0.15
1.75
1.60 SQ
1.45
01-28-2010-B
1
0.50
BS
C
BOTTOM VIEWTOP VIEW
16
5
8
9
1213
4
EXPOSED
PAD
PIN 1
INDICATOR
0.50
0.40
0.30
SEATING
PLANE
0.05 MAX
0.02 NOM
0.20 REF
0.20 MIN
COPLANARITY
0.08
PIN 1
INDICATOR
FOR PROPER CONNECTIO
N OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
0.80
0.75
0.70
COMPLIANT
TO
JEDEC STANDARDS MO-229-WEEE.
Figure 58. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ]
3 mm × 3 mm Body, Very Very Thin Quad
(CP-16-25)
Dimensions shown in millimeters
AD8476 Data Sheet
Rev. B | Page 22 of 24
ORDERING GUIDE
Model
1
Temperature Range
Package Description
Package Option
Branding
AD8476BCPZ-R7 −40°C to +125°C 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-16-25 Y45
AD8476BCPZ-RL −40°C to +125°C 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-16-25 Y45
AD8476BCPZ-WP −40°C to +125°C 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-16-25 Y45
AD8476ACPZ-R7 −40°C to +125°C 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-16-25 Y44
AD8476ACPZ-RL −40°C to +125°C 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-16-25 Y44
AD8476ACPZ-WP −40°C to +125°C 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-16-25 Y44
AD8476BRMZ −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 Y47
AD8476BRMZ-R7 −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 Y47
AD8476BRMZ-RL −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 Y47
AD8476ARMZ −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 Y46
AD8476ARMZ-R7 −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 Y46
AD8476ARMZ-RL −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 Y46
AD8476-EVALZ
Evaluation Board
1 Z = RoHS Compliant Part.
Data Sheet AD8476
Rev. B | Page 23 of 24
NOTES
AD8476 Data Sheet
Rev. B | Page 24 of 24
NOTES
©20112012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D10195-0-5/12(B)
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
Analog Devices Inc.:
AD8476ACPZ-WP AD8476ARMZ AD8476BCPZ-WP AD8476BRMZ AD8476-EVALZ AD8476ACPZ-R7
AD8476ACPZ-RL AD8476ARMZ-R7 AD8476ARMZ-RL AD8476BCPZ-R7 AD8476BCPZ-RL AD8476BRMZ-R7
AD8476BRMZ-RL