A8514 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver FEATURES AND BENEFITS DESCRIPTION * AEC-Q100 qualified * Wide input voltage range of 5 to 40 V for start/stop, cold crank and load dump requirements * Fully integrated LED current sinks and boost converter with 60 V DMOS * Sync function to synchronize boost converter switching frequency up to 2.3 MHz, allowing operation above the AM band * Excellent input voltage transient response * Single resistor primary OVP minimizes VOUT leakage * Internal secondary OVP for redundant protection * LED current of 80 mA per channel * Drives up to 12 series LEDs in 4 parallel strings * 0.7% to 0.8% LED to LED matching accuracy * PWM and analog dimming inputs * 5000:1 PWM dimming at 200 Hz * Provides driver for external PMOS input disconnect switch * Extensive protection against: Shorted boost switch or inductor Shorted FSET or ISET resistor Shorted output Open or shorted LED pin Open boost Schottky Overtemperature (OTP) The A8514 is a multi-output white LED driver for small-size LCD backlighting. It integrates a current-mode boost converter with internal power switch and four current sinks. The boost converter can drive up to 48 LEDs, 12 LEDs per string, at 80 mA. The LED sinks can be paralleled together to achieve even higher LED currents, up to 320 mA. The A8514 can operate with a single power supply, from 5 to 40 V, which allows the part to withstand load dump conditions encountered in automotive systems. PACKAGE: Continued on the next page... The A8514 can drive an external P-FET to disconnect the input supply from the system in the event of a fault. The A8514 provides protection against output short and overvoltage, open or shorted diode, open or shorted LED pin, shorted boost switch or inductor, shorted FSET or ISET resistor, and IC overtemperature. A dual level cycle-by-cycle current limit function provides soft start and protects the internal current switch against high current overloads. The A8514 has a synchronization pin that allows PWM switching frequencies to be synchronized in the range of 580 kHz to 2.3 MHz. The high switching frequency allows the A8514 to operate above the AM radio band. APPLICATIONS: 20-pin TSSOP with exposed thermal pad (suffix LP) LCD backlighting or LED lighting for: * Automotive infotainment * Automotive cluster * Automotive center stack Not to scale VIN 8 to 16 V CIN 4.7 F 50 V RSC 0.033 RADJ 249 Optional RC 20 CC 22 nF Q1 VC CVDD 0.1 F 100 k D1 2 A / 60 V L1 10 H GATE VSENSE VIN VDD SW PAD RFSET 10 k ROVP 137 k COUT 4.7 F 50 V A8514 FAULT PWM/EN APWM ISET RISET 8.25 k OVP VOUT FSET/SYNC AGND LED1 LED2 LED3 LED4 COMP PGND CP 120 pF RZ 150 CZ 0.47 F Figure 1: Typical Application Circuit A8514-DS, Rev. 8 MCO-0000151 March 13, 2019 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 DESCRIPTION (CONTINUED) The A8514 is provided in a 20-pin TSSOP package (suffix LP) with an exposed pad for enhanced thermal dissipation. It is lead (Pb) free, with 100% matte-tin leadframe plating. SELECTION GUIDE Part Number A8514KLPTR-T 1 Contact AllegroTM Packing [1] 4000 pieces per 13-in. reel for additional packing options ABSOLUTE MAXIMUM RATINGS [2] Characteristic Symbol Rating Unit LEDx Pins -0.3 to 55 V OVP Pin -0.3 to 60 V VSENSE and GATE pins should not exceed VIN by more than 0.4 V -0.3 to 40 V Continuous -0.6 to 62 V VIN, VSENSE, GATE Pins SW Pin Notes -1.0 V AULT Pin F t < 50 ns -0.3 to 40 V ISET, FSET, APWM, COMP Pins -0.3 to 5.5 V -0.3 to 7 V All Other Pins Operating Ambient Temperature TA -40 to 125 C Maximum Junction Temperature TJ(max) 150 C Tstg -55 to 150 C Storage Temperature Range K 2 Stresses beyond those listed in this table may cause permanent damage to the device. The Absolute Maximum ratings are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the Electrical Characteristics table is not implied. Exposure to Absolute Maximum-rated conditions for extended periods may affect device reliability. Specifications Thermal Characteristics Pin-out Diagram and Terminal List Characteristic Performance Functional Description Enabling the IC Powering up: LED pin short-to-ground check Soft start function Frequency selection Sync LED current setting and LED dimming PWM dimming APWM pin Analog dimming LED short detect Overvoltage protection Boost switch overcurrent protection Input overcurrent protection and disconnect switch Table of Contents 2 3 3 8 11 11 11 13 13 14 16 16 17 19 19 20 22 23 Setting the current sense resistor Input UVLO VDD Shutdown Fault protection during operation Application Information Design Example for Boost Configuration Design Example for SEPIC Configuration Package Outline Drawing Appendix A. Feedback Loop Calculations Power Stage Transfer Function Output to Control Transfer Function Stabilizing the Closed Loop System Measuring the Feedback Loop Gain and Phase Margin Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 24 24 24 24 25 27 27 31 35 A-1 A-1 A-2 A-4 A-6 2 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 GATE 1 20 SW VSENSE 2 Pinout Diagram 19 OVP VIN 3 18 PGND FAULT 4 17 PGND COMP 5 16 PGND APWM 6 15 VDD PWM/EN 7 14 LED1 FSET/SYNC 8 13 LED2 ISET 9 12 LED3 AGND 10 11 LED4 Terminal List Table Number Name 1 GATE Function 2 VSENSE 3 VIN 4 T FAUL Indicates a fault condition. Connect a 100 k resistor between this pin and the required logic level voltage. The pin is an open drain type configuration that will be pulled low when a fault occurs. 5 COMP Output of the error amplifier and compensation node. Connect a series RZ-CZ network from this pin to ground for control loop compensation. 6 APWM Analog trimming option for dimming. Applying a digital PWM signal to this pin adjusts the internal ISET current. 7 PWM/EN PWM dimming pin, used to control the LED intensity by using pulse width modulation. Also used to enable the A8514. 8 FSET/SYNC Frequency/synchronization pin. A resistor RFSET from this pin to ground sets the switching frequency. This pin can also be used to synchronize two or more A8514s in the system. The maximum synchronization frequency is 2.3 MHz. Output gate driver pin for external P-channel FET control. Connect this pin to the negative sense side of the current sense resistor RSC. The threshold voltage is measured as VIN - VSENSE . There is also a fixed current sink to allow for trip threshold adjustment. Input power to the A8514 as well as the positive input used for current sense resistor. 9 ISET 10 AGND Connect the RISET resistor between this pin and ground to set the 100% LED current. 11,12,13,14 LEDx Connect the cathodes of the LED strings to these pins. 15 VDD Output of internal LDO; connect a 0.1 F decoupling capacitor between this pin and ground. 16,17.18 PGND LED signal ground. Power ground for internal DMOS device. 19 OVP Overvoltage Condition (OVP) sense; connect the ROVP resistor from VOUT to this pin to adjust the overvoltage protection. 20 SW The drain of the internal DMOS switch of the boost converter. - PAD Exposed pad of the package providing enhanced thermal dissipation. This pad must be connected to the ground plane(s) of the PCB with at least 8 vias, directly in the pad. THERMAL CHARACTERISTICS: May require derating at maximum conditions; see application information Characteristic Symbol Test Conditions [1] Value Unit On 2-layer PCB, 3 in. 40.0 C/W On 4-layer PCB based on JEDEC standard (estimated) 29.0 C/W 2 Package Thermal Resistance 1 Additional RJA thermal information available on the Allegro website. Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 3 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 Functional Block Diagram VDD SW Internal VCC Regulator UVLO VIN VREF 1.235 V Ref Internal VCC AGND FSET/SYNC Diode Open Driver Circuit - Oscillator COMP Fault + + Sense - + Current Sense ISS - Internal Soft Start + PGND - Thermal Shutdown Input Current Sense Amplifier IADJ Fault + GATE PMOS Driver PWM/EN OVP Sense GOFF Fault Enable - VSENSE OVP VREF Open/Short LED Detect PWM 100 k APWM VREF ISS LED1 LED Driver LED2 LED3 ISET Internal VCC ISET LED4 AGND Fault FAULT PAD PGND AGND Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 4 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 ELECTRICAL CHARACTERISTICS [1][2]: Valid at VIN = 16 V, TA = 25C, indicates specifications guaranteed by design and characterization over the full operating temperature range with TA = TJ = -40C to 125C, unless otherwise noted Characteristics Symbol Test Conditions Min. Typ. Max. Unit 5 - 40 V INPUT VOLTAGE SPECIFICATIONS Operating Input Voltage Range [3] VIN UVLO Start Threshold VUVLOrise VIN rising - - 4.35 V UVLO Stop Threshold VUVLOfall VIN falling - - 3.90 V UVLO Hysteresis [2] VUVLOHYS 300 450 600 mV INPUT CURRENTS Input Quiescent Current Input Sleep Supply Current IQ PWM/EN = VIH ; SW = 2 MHz, no load - 5.5 10 mA IQSLEEP VIN = 16 V, VPWMEN = VFSETSYNC = 0 V - 2 10.0 A INPUT LOGIC LEVELS (PWM/EN AND APWM) Input Logic Level-Low VIL VIN throughout operating input voltage range - - 400 mV Input Logic Level-High VIH VIN throughout operating input voltage range 1.5 - - V PWM/EN Pin Open Drain Pull-Down Resistor RPWMEN PWM/EN = 5 V 60 100 140 k APWM Pull-Down Resistor RAPWM PWM/EN = VIH 60 100 140 k fAPWM VIH = 2 V, VIL = 0 V 20 - 1000 kHz 44 48 52 dB APWM APWM Frequency [2] ERROR AMPLIFIER Open Loop Voltage Gain Transconductance AVOL gm 750 990 1220 A/V Source Current IEA(SRC) ICOMP = 10 A VCOMP = 1.5 V - -350 - A Sink Current IEA(SINK) VCOMP = 1.5 V - 350 - A COMP Pin Pull-Down Resistance RCOMP FAULT = 0 - 2000 - VOVP(th) OVP connected to VOUT 7.7 8.1 8.5 V 188 199 210 A - 0.1 1 A 53 55 58 V ISW = 0.750 A, VIN = 16 V 75 300 600 m VSW = 16 V, PWM/EN = VIL - 0.1 1 A 3.0 3.5 4.2 A - 7.00 - A OVERVOLTAGE PROTECTION Overvoltage Threshold OVP Sense Current IOVPH OVP Leakage Current IOVPLKG Secondary Overvoltage Protection VOVP(sec) ROVP = 40.2 k, VIN = 16 V, PWM/EN = VIL BOOST SWITCH Switch On-Resistance RSW Switch Leakage Current ISWLKG Switch Current Limit ISW(LIM) Secondary Switch Current Limit [2] ISW(LIM2) Higher than ISW(LIM)(max) for all conditions, device latches when detected Soft Start Boost Current Limit ISWSS(LIM) Initial soft start current for boost switch - 700 - mA Minimum Switch On-Time tSWONTIME 60 85 111 ns Minimum Switch Off-Time tSWOFFTIME 30 47 68 ns Continued on the next page... Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 5 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 ELECTRICAL CHARACTERISTICS [1][2] (continued): Valid at VIN = 16 V, TA = 25C, indicates specifications guaranteed by design and characterization over the full operating temperature range with TA = TJ = -40C to 125C, unless otherwise noted Characteristics Symbol Test Conditions Min. Typ. Max. Unit 1.8 2 2.2 MHz OSCILLATOR FREQUENCY RFSET = 10 k Oscillator Frequency fSW RFSET = 20 k 0.9 1 1.1 MHz RFSET = 35.6 k 520 580 640 kHz FSET/SYNC Pin Voltage VFSET - 1.00 - V FSET Frequency Range fFSET 580 - 2500 kHz fSWSYNC 580 - 2300 kHz Synchronization Input Minimum OffTime tPWSYNCOFF 150 - - ns Synchronization Input Minimum OnTime tPWSYNCON 150 - - ns RFSET = 10 k SYNCHRONIZATION Synchronized PWM Frequency SYNC Input Logic Voltage VSYNC(H) FSET/SYNC pin, high level 2.0 - - V VSYNC(L) FSET/SYNC pin, low level - - 0.4 V LED CURRENT SINKS LEDx Accuracy ErrLED ISET = 120 A - - 3 % LEDx Matching LEDx ISET = 120 A - - 3 % LEDx Regulation Voltage VLED VLED1=VLED2=VLED3 =VLED4, ISET = 120 A 600 700 800 mV ISET to ILEDx Current Gain AISET ISET = 120 A 633 653 672 A/A ISET Pin Voltage VISET 0.988 1.003 1.018 V Allowable ISET Current ISET 20 - 120 A 4.6 5.1 5.6 V VLED Short Detect VLEDSC While LED sinks are in regulation, sensed from LEDx pin to ground Soft Start LEDx Current ILEDSS Current through each enabled LEDx pin during soft start - 2.0 - mA Maximum PWM Dimming Until OffTime [2] tPWML Measured while PWM/EN = low, during dimming control and internal references are powered-on (exceeding tPWML results in shutdown) - 32,750 - fSW cycles Minimum PWM OnTime tPWMH First cycle when powering-up device - 0.75 2 s - 0.5 1 s - 360 500 ns PWM High to LEDOn Delay tdPWM(on) Time between PWM enable and LED current reaching 90% of maximum PWM Low to LEDOff Delay tdPWM(off) Time between PWM enable going low and LED current reaching 10% of maximum Continued on the next page... Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 6 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 ELECTRICAL CHARACTERISTICS [1][2] (continued): Valid at VIN = 16 V, TA = 25C, indicates specifications guaranteed by design and characterization over the full operating temperature range with TA = TJ = -40C to 125C, unless otherwise noted Characteristics Symbol Test Conditions Min. Typ. Max. Unit - -104 - A GATE PIN GATE Pin Sink Current IGSINK VGS = VIN Gate Fault Shutdown Greater than 2x Current [2] tGFAULT2 - - 3 s Gate Fault Shutdown Greater than 1-2x Current tGFAULT1 - 10,000 - fSW cycles - -6.7 - V 18.8 20.3 21.8 A Gate Voltage VGS Gate to source voltage measured when gate is on VSENSE Pin VSENSE Pin Sink Current IADJ VSENSE Trip Point VSENSEtrip1 Measured between VIN and VSENSE, RADJ = 0 94 104 114 mV VSENSE 2x Trip [2] VSENSEtrip2 2x VSENSEtrip , instantaneous shutdown, RADJ = 0 - 180 - mV VFAULT IFAULT = 1 mA - - 0.5 V IFAULTLKG VFAULT = 5 V - - 1 A - 165 - C - 20 - C FAULT PIN FAULT Pull-Down Voltage AULT Pin Leakage Current F THERMAL PROTECTION (TSD) Thermal Shutdown Threshold [2] TSD Thermal Shutdown Hysteresis [2] TSDHYS Temperature rising 1 For input and output current specifications, negative current is defined as coming out of the node or pin (sourcing); positive current is defined as going into the node or pin (sinking). 2 Ensured by design and characterization, not production tested. 3 Minimum V = 5 V is only required at startup. After startup is completed, the IC is able to function down to V = 4 V. IN IN Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 7 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 CHARACTERISTIC PERFORMANCE TA = TJ 10 9 8 7 6 5 4 3 2 1 0 VIN UVLO Start Threshold Voltage versus Ambient Temperature VUVLOrise (V) IQSLEEP (A) VIN Input Sleep Mode Current versus Ambient Temperature -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 4.40 4.35 4.30 4.25 4.20 4.15 4.10 4.05 4.00 -50 -40 -30 -20 -10 0 2.20 2.15 2.10 2.05 2.00 1.95 1.90 1.85 1.80 Temperature (C) Switching Frequency versus Ambient Temperature VIN UVLO Stop Threshold Voltage versus Ambient Temperature VUVLOfall (V) fSW (MHz) Temperature (C) -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 3.70 3.69 3.68 3.67 3.66 3.65 3.64 3.63 3.62 3.61 3.60 -50 -40 -30 -20 -10 0 Temperature (C) OVP Pin Overvoltage Threshold versus Ambient Temperature 8.4 8.3 VOVP(th) (V) IOVPH (A) 10 20 30 40 50 60 70 80 90 100 110 120 130 Temperature (C) OVP Pin Sense Current versus Ambient Temperature 210 208 206 204 202 200 198 196 194 192 190 10 20 30 40 50 60 70 80 90 100 110 120 130 8.2 8.1 8.0 7.9 7.8 7.7 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 Temperature (C) 7.6 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 Temperature (C) Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 8 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 VSENSE Pin Sink Current versus Ambient Temperature Input Disconnect Switch Gate to Source Voltage -6.3 versus Ambient Temperature 20.8 20.7 20.6 -6.5 IADJ (A) VGS (V) -6.4 -6.6 -6.7 20.5 20.4 20.3 20.2 -6.8 20.1 -6.9 -50 -40 -30 -20 -10 0 20.0 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 Temperature (C) Temperature (C) LED Current versus Ambient Temperature ISET to LED Current Gain versus Ambient Temperature AISET (A/A) 82 81 80 79 78 77 665 660 655 650 645 76 75 10 20 30 40 50 60 70 80 90 100 110 120 130 640 -50 -40 -30 -20 -10 0 Temperature (C) 3 10 20 30 40 50 60 70 80 90 100 110 120 130 Temperature (C) LED to LED Matching Accuracy versus Ambient Temperature 2 LEDx (%) ILED (mA) ISET = 120 A 670 83 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 1 0 -1 -2 -3 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 Temperature (C) Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 9 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 Efficiency (%) 100 Efficiency for Various 4-String Configurations ILED = 70 mA, LED Vf 3.2 V 95 90 6 series LEDs each string 7 series LEDs each string 8 series LEDs each string 85 80 75 5 7 9 11 13 15 17 Input Voltage, VIN (V) Efficiency (%) 100 Efficiency for Various 4-String Configurations ILED = 80 mA, LED Vf 3.2 V 95 90 6 series LEDs each string 85 7 series LEDs each string 8 series LEDs each string 80 75 5 7 9 11 13 15 17 Input Voltage, VIN (V) Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 10 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 FUNCTIONAL DESCRIPTION The A8514 incorporates a current-mode boost controller with internal DMOS switch, and four LED current sinks. It can be used to drive four LED strings of up to 12 white LEDs in series, with current up to 80 mA per string. For optimal efficiency, the output of the boost stage is adaptively adjusted to the minimum voltage required to power all of the LED strings. This is expressed by the following equation: Powering up: LED pin short-to-ground check The VIN pin has a UVLO function that prevents the A8514 from powering-up until the UVLO threshold is reached. After the VIN pin goes above UVLO, and a high signal is present on the PWM/EN pin, the IC proceeds to power-up. As shown in Figure 3, at this point the A8514 enables the disconnect switch and checks if any LEDx pins are shorted to ground and/or are not used. VOUT = max ( VLED1 ,..., VLED4 ) + VREG (1) where VLEDx is the voltage drop across LED strings 1 through 4, and The LED detect phase starts when the GATE voltage of the disconnect switch is equal to VIN - 4.5 V. After the voltage threshold on the LEDx pins exceeds 120 mV, a delay of between 3000 and 4000 clock cycles is used to determine the status of the pins. Thus, the LED detection duration varies with the switching frequency, as shown in the following table: VREG is the regulation voltage of the LED current sinks (typically 0.7 V at the maximum LED current). Enabling the IC The IC turns on when a logic high signal is applied on the PWM/EN pin with a minimum duration of tPWMH for the first clock cycle, and the input voltage present on the VIN pin is greater than the 4.35 V necessary to clear the UVLO (VUVLOrise ) threshold. The power-up sequence is shown in Figure 2. Before the LEDs are enabled, the A8514 driver goes through a system check to determine if there are any possible fault conditions that might prevent the system from functioning correctly. Also, if the FSET/SYNC pin is pulled low, the IC will not power-up. More information on the FSET/SYNC pin can be found in the Sync section of this datasheet. Switching Frequency (MHz) Detection Time (ms) 2 1.5 to 2 1 3 to 4 0.800 3.75 to 5 0.600 5 to 6.7 The LED pin detection voltage thresholds are as follows: LED Pin Voltage LED Pin Status Action <70 mV Short-to-ground Power-up is halted 150 mV Not used LED removed from operation 325 mV LED pin in use None GATE = VIN - 4.5 V VDD GATE C1 FSET/SYNC C2 ISET C1 LEDx C2 C3 LED detection period ISET PWM/EN C4 C3 C4 t Figure 3: Power-up diagram; shows VDD (ch1, 2 V/div.), FSET/SYNC (ch2, 1 V/div.), ISET (ch3, 1 V/div.), and PWM/EN (ch4, 2 V/div.) pins, time = 200 s/div. PWM/EN t Figure 2: Power-up diagram; shows the relationship of an LEDx pin with respect to the gate voltage of the disconnect switch (if used) during the LED detect phase, as well as the duration of the LED detect phase for a switching frequency of 2 MHz; shows GATE (ch1, 5 V/div.), LED (ch2, 500 mV/div.), ISET (ch3, 1 V/div.), and PWM/EN (ch4, 5 V/div.) pins, time = 500 s/div. Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 11 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 LED1 C1 LED1 LED detection period C1 C2 LED2 C2 LED2 C3 ISET LED detection period ISET C3 C4 PWM/EN PWM/EN C4 t t Figure 4A: An LED detect occurring when both LED pins are selected to be used; shows LED1 (ch1, 500 mV/div.), LED2 (ch2, 500 mV/div.), ISET (ch3, 1 V/div.), and PWM/EN (ch4, 5 V/div.) pins, time = 500 s/div. Figure 4B: Example with LED2 pin not being used; the detect voltage is about 150 mV; shows LED1 (ch1, 500 mV/div.), LED2 (ch2, 500 mV/div.), ISET (ch3, 1 V/div.), and PWM/EN (ch4, 5 V/div.) pins, time = 500 s/div. Short removed Pin shorted LED1 C1 LED2 C2 ISET C3 C4 PWM/EN t Figure 4C: Example with one LED shorted to ground. The IC will not proceed with power-up until the shorted LED pin is released, at which point the LED is checked to see if it is being used; shows LED1 (ch1, 500 mV/div.), LED2 (ch2, 500 mV/div.), ISET (ch3, 1 V/div.), and PWM/EN (ch4, 5 V/div.) pins, time = 1 ms/div. Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 12 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver All unused pins should be connected with a 2.37 k resistor to ground, as shown in Figure 5. The unused pin, with the pull-down resistor, will be taken out of regulation at this point and will not contribute to the boost regulation loop. If a LEDx pin is shorted to ground the A8514 will not proceed with soft start until the short is removed from the LEDx pin. This prevents the A8514 from powering-up and putting an uncontrolled amount of current through the LEDs. Soft start function During soft start the LEDx pins are set to sink (ILEDSS) and the boost switch current is reduced to the ISWSS(LIM) level to limit the inrush current generated by charging the output capacitors. When the converter senses that there is enough voltage on the LEDx pins the converter proceeds to increase the LED current to the preset regulation current and the boost switch current limit is switched to the ISW(LIM) level to allow the A8514 to deliver the necessary output power to the LEDs. This is shown in Figure 6. Frequency selection The switching frequency on the boost regulator is set by the resistor connected to the FSET/SYNC pin. The switching frequency can be can be anywhere from 580 kHz to 2.3 MHz. Figure 7 shows the typical switching frequencies for various resistor values, with the relationship between RFSET and typical switching frequency given as: fSW = k / (RFSET + RINT ), or RFSET = k / fSW - RINT GND A8514 LED1 LED2 LED3 LED4 GND Inrush current caused by enabling the disconnect switch (when used) LED1 LED2 LED3 LED4 2.37 k Figure 5: Channel select setup: (left) using only LED1, LED2, and LED3, and (right) using all four channels. Operation during ISWSS(lim) C1 IOUT C2 IIN C3 C4 Normal operation ISW(lim) VOUT PWM/EN t Figure 6: Startup diagram showing the input current, output voltage, and output current; shows IOUT (ch1, 200 mA/div.), IIN (ch2, 1 A/div.), VOUT (ch3, 20 V/div.), and PWM/EN (ch4, 5 V/div.), time = 1 ms/div. 2.1 (2) where RFSET is in in k, fSW is in megahertz, k = 20.9 and RINT (internal resistance of FSET pin) = 0.6 k. A8514 In case during operation a fault occurs that will increase the switching frequency, the FSET/SYNC pin is clamped to a maximum switching frequency of no more than 3.5 MHz. If the FSET/SYNC pin is shorted to GND the part will shut down. For more details see the Fault Mode table later in this datasheet. Switching Frequency, fSW (MHz) A8514 1.9 1.7 1.5 1.3 1.1 0.9 0.7 0.5 10 12 14 16 18 20 22 24 26 28 30 32 34 36 Resistance for RFSET (k) Figure 7: Typical Switching Frequency versus value of RFSET resistor Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 13 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 SYNC The A8514 can also be synchronized using an external clock on the FSET/SYNC pin. Figure 8 shows the correspondence of a sync signal and the FSET/SYNC pin, and Figure 9 shows the result when a sync signal is detected: the LED current does not show any variation while the frequency changeover occurs. At power-up if the FSET/SYNC pin is held low, the IC will not power-up. Only when the FSET/SYNC pin is tri-stated to allow the pin to rise, to about 1 V, or when a synchronization clock is detected, will the A8514 try to power-up. The basic requirement of the sync signal is 150 ns minimum ontime and 150 ns minimum off time, as indicated by the specifications for tPWSYNCON and tPWSYNCOFF . Figure 10 shows the timing for a synchronization clock into the A8514 at 2.2 MHz. Thus any pulse with a duty cycle of 33% to 66% at 2.2 MHz can be used to synchronize the IC. VOUT C1 IOUT C2 C3 FSET/SYNC SW node C4 t Figure 8: Diagram showing a synchronized FSET/SYNC pin and switch node; shows VOUT (ch1, 20 V/div.), IOUT (ch2, 200 mA/div.), FSET/SYNC (ch3, 2 V/div.), and SW node (ch4, 20 V/div.), time = 2 s/div. The SYNC pulse duty cycle ranges for selected switching frequencies are: SYNC Pulse Frequency (MHz) Duty Cycle Range (%) 2.2 33 to 66 2 30 to 70 1 15 to 85 0.800 12 to 88 0.600 9 to 91 If during operation a sync clock is lost, the IC will revert to the preset switching frequency that is set by the resistor RFSET. During this period the IC will stop switching for a maximum period of about 7 s to allow the sync detection circuitry to switch over to the externally preset switching frequency. If the clock is held low for more than 7 s, the A8514 will shut VOUT C1 IOUT C2 C3 2 MHz operation FSET/SYNC 1 MHz operation SW node C4 t Figure 9: Transition of the SW waveform when the SYNC pulse is detected. The A8514 switching at 2 MHz, applied SYNC pulse at 1 MHz; shows VOUT (ch1, 20 V/div.), IOUT (ch2, 200 mA/div.), FSET/SYNC (ch3, 2 V/div.), and SW node (ch4, 20 V/div.), time = 5 s/div. Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 14 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 down. In this shutdown mode the IC will stop switching, the input disconnect switch is open, and the LEDs will stop sinking current. To shutdown the IC into low power mode, the user must disable the IC using the PWM pin, by keeping the pin low for a period of 32,750 clock cycles. If the FSET/SYNC pin is released at any time after 7 s, the A8514 will proceed to soft start. To prevent generating a fault when the external SYNC signal is stuck at low, the circuit shown in Figure 11 can be used. When the external SYNC signal goes low, the A8514 will continue to operate normally at the switching frequency set by RFSET. No FAULT flag is generated. t PWSYNCON If it is necessary to switch over between internal oscillator and external sync during operation, ensure the transition takes place at least 500 ns after the previous PWM = H rising edge. Alternatively, execute the switchover during PWM = L only. This restriction does not apply if PWM dimming is not being used. PWM 500 ns Ext_Sync / FSET 1 V Internal Clock Internal oscillator External Sync 154 ns Figure 12: Avoid switching over between Internal Oscillator and External Sync in highlighted region 150 ns 150 ns t PWSYNCOFF T = 454 ns Figure 10: SYNC pulse on and off time requirements. A8514 External Synchronization Signal FSET 220 pF Schottky Barrier Diode RFSET 10.2 k Figure 11: Countermeasure to prevent external sync signal stuck-at-low fault. Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 15 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 VOUT LED current setting and LED dimming COMP The maximum LED current can be up to 80 mA per channel, and is set through the ISET pin. To set the ILED current, connect a resistor, RISET, between this pin and ground, according to the following formula: RISET = (1.003 x 653) / ILED (3) where ILED is in A and RISET is in . This sets the maximum current through the LEDs, referred to as the 100% current. Standard RISET values, at gain equals 653, are as follows: C2 C1 C3 PWM ILED C4 t Standard Closest RISET Resistor Value (k) LED current per LED, ILED (mA) 8.25 80 10.2 65 16.5 40 22.1 30 PWM dimming The LED current can be reduced from the 100% current level by PWM dimming using the PWM/EN pin. When the PWM/EN pin is pulled high, the A8514 turns on and all enabled LEDs sink 100% current. When PWM/EN is pulled low, the boost converter and LED sinks are turned off. The compensation (COMP) pin is floated, and critical internal circuits are kept active. The typical PWM dimming frequencies fall between 200 Hz and 1 kHz. Figure 13A to Figure 13D provide examples of PWM switching behavior. Figure 13B: Typical PWM diagram showing VOUT, ILED, and COMP pin as well as the PWM signal. PWM dimming frequency is 500 Hz at 1% duty cycle ; shows VOUT (ch1, 10 V/div.), COMP (ch2, 2 V/div.), PWM (ch3, 5 V/div.), and ILED (ch4, 50 mA/div.), time = 500 s/div. PWM C1 ILED C2 t Figure 13C: Delay from rising edge of PWM signal to LED current; shows PWM (ch1, 2 V/div.), and ILED (ch2, 50 mA/div.), time = 200 ns/div. PWM VOUT COMP C2 C1 C3 C1 PWM ILED C2 C4 ILED t Figure 13A: Typical PWM diagram showing VOUT, ILED, and COMP pin as well as the PWM signal. PWM dimming frequency is 500 Hz at 50% duty cycle; shows VOUT (ch1, 10 V/div.), COMP (ch2, 2 V/div.), PWM (ch3, 5 V/div.), and ILED (ch4, 50 mA/div.), time = 500 s/div. t Figure 12D. Delay from falling edge of PWM signal to LED current turn off; shows PWM (ch1, 2 V/div.), and ILED (ch2, 50 mA/div.), time = 200 ns/div. Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 16 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 Another important feature of the A8514 is the PWM signal to LED current delay. This delay is typically less than 500 ns, which allows greater accuracy at low PWM dimming duty cycles, as shown in Figure 14. APWM pin The APWM pin is used in conjunction with the ISET pin (see Figure 15. This is a digital signal pin that internally adjusts the ISET current. When this pin is not used it should be tied to ground. The typical input signal frequency is between 20 kHz and 1 MHz. The duty cycle of this signal is inversely proportional to the percentage of current that is delivered to the LEDs (Figure 16). To use this pin for a trim function, the user should set the maximum output current to a value higher than the required current by at least 5%. The LED ISET current is then trimmed down to the appropriate value. Another consideration that also is important is the limitation of the user APWM signal duty cycle. In some cases it might be preferable to set the maximum ISET current to be 25% to 50% higher, thus allowing the APWM signal to have duty cycles that are between 25% and 50%. APWM 10 ErrLED (%) 8 ISET Worst-case 6 Typical RISET 4 A8514 ISET Current Mirror Current Adjust PWM 2 0 0.1 1 10 LED Driver 100 PWM Duty Cycle, D (%) Figure 16: Simplified block diagram of the APWM and ISET circuit. 12 80 70 60 50 40 30 20 10 0 10 %ErrLED IOUT (mA) Figure 14: Percentage Error of the LED current versus PWM duty cycle (at 200 Hz PWM frequency). IOUT = 80 mA IOUT = 65 mA 8 6 IOUT = 65 mA 4 IOUT = 80 mA 2 0 20 40 60 80 100 APWM Duty Cycle (%) Figure 15: Output current versus duty cycle; 200 kHz APWM signal. 0 0 20 40 60 80 100 APWM Duty Cycle (%) Figure 17: Percentage Error of the LED current versus PWM duty cycle; 200 kHz APWM signal. Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 17 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 As an example, a system that delivers a full LED current of 80 mA per LED would deliver 60 mA of current per LED when an APWM signal is applied with a duty cycle of 25% (Figure 18 and Figure 19). Although the order in which APWM and the PWM signal are enabled does not matter, when enabling the A8514 into low current output while PWM and APWM dimming, the APWM signal should be enable before or at the same time as the PWM signal. This sequence will prevent the light output intensity from changing during power up of the IC. Figure 20 shows the sequencing of the APWM and PWM signal during power-up to prevent inadvertent light intensity changes. The full intensity light output with no APWM or PWM dimming is 80 mA per channel. ILED ILED C1 C1 C2 C2 C3 APWM PWM/EN APWM PWM/EN C3 t t Figure 18: Diagram showing the transition of LED current from 60 mA to 80 mA, when a 25% duty cycle signal is removed from the APWM pin. PWM = 1; shows ILED (ch1, 50 mA/div.), APWM (ch2, 10 V/div.), and PWM/EN (ch3, 5 V/div.), time = 500 s/div. Figure 20: Diagram showing the transition of LED current from 80 mA to 60 mA, when a 25% duty cycle signal is applied to the APWM pin; PWM = 1; shows ILED (ch1, 50 mA/div.), APWM (ch2, 10 V/div.), and PWM/EN (ch3, 5 V/div.), time = 500 s/div. APWM C1 ILED C2 C1 IOUT PWM/EN C2 C3 VOUT C3 APWM PWM/EN C4 t Figure 19: Diagram showing power-up sequencing LED current of 5 mA per channel with a 10% duty cycle PWM signal and a 95% duty cycle APWM signal; shows APWM (ch1, 5 V/div.), ILED (ch2, 50 mA/div.), PWM/EN (ch3, 5 V/div.), and VOUT (ch4, 10 V/div.), time = 500 s/div. t Figure 21: Transition of output current level when a 50% duty cycle signal is applied to the APWM pin, in conjunction with a 50% duty cycle PWM dimming being applied to the PWM pin; shows IOUT (ch1, 50 mA/div.), APWM (ch2, 10 V/div.), and PWM/EN (ch3, 5 V/div.), time = 500 s/div. Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 18 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 Although the APWM dimming function has a wide frequency range, if this function is used strictly as an analog dimming function it is recommended to use frequency ranges between 50 and 500 kHz for best accuracy. The frequency range must be considered only if the user is not using this function as a closed loop trim function. Another limitation is that the propagation delay between this APWM signal and IOUT takes several milliseconds to change the actual LED current. This effect is shown in Figure 18, Figure 19, and Figure 21. Analog dimming The A8514 can also be dimmed by using an external DAC or another voltage source applied either directly to the ground side of the RISET resistor or through an external resistor to the ISET pin (see Figure 20). The limit of this type of dimming depends on the range of the ISET pin. In the case of the A8514 the limit is 20 to 125 A. * For a single resistor (panel A of Figure 22), the ISET current is controlled by the following formula: VISET - VDAC ISET = (4) R ISET where VISET is the ISET pin voltage and VDAC is the DAC output voltage. When the DAC voltage is 0 V the LED current will be at its DAC R ISET VDAC maximum. To keep the internal gain amplifier stable, the user should not decrease the current through the RISET resistor to less than 20 A * For a dual-resistor configuration (panel B of Figure 22), the ISET current is controlled by the following formula: ISET = GND GND (5) The advantage of this circuit is that the DAC voltage can be higher or lower, thus adjusting the LED current to a higher or lower value of the preset LED current set by the RISET resistor: VDAC = 1.003 V; the output is strictly controlled by RISET VDAC > 1.003 V; the LED current is reduced VDAC < 1.003 V; the LED current is increased LED short detect Both LEDx pins are capable of handling the maximum VOUT that the converter can deliver, thus providing protection from the LEDx pin to VOUT in the event of a connector short. An LEDx pin that has a voltage exceeding VLEDSC will be removed from operation (see Figure 23). This is to prevent the IC from dissipating too much power by having a large voltage present on an LEDx pin. A8514 ISET VISET VDAC - VISET - RISET R1 IOUT C1 (A) LED1 DAC R1 A8514 VDAC GND C2 ISET R ISET GND (B) Figure 22: Simplified diagrams of voltage control of ILED: typical applications using a DAC to control ILED using a single resistor (upper), and dual resistors (lower). PWM/EN C3 t Figure 23: Example of the disabling of an LED string when the LED pin voltage is increased above 4.6 V; shows IOUT (ch1, 200 mA/div.), LED1 (ch2, 5 V/div.), and PWM/EN (ch3, 5 V/div.), time = 10 s/div. Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 19 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 While the IC is being PWM-dimmed, the IC rechecks the disabled LED every time the PWM signal goes high, to prevent false tripping of an LED short event. This also allows some self-correction if an intermittent LED pin short to VOUT is present. Overvoltage protection The A8514 has overvoltage protection (OVP) and open Schottky diode (D1 in Figure 1) protection. The OVP protection has a default level of 8.1 V and can be increased up to 53 V by connecting resistor ROVP between the OVP pin and VOUT . When the current into the OVP pin exceeds 199 A (typical), the OVP comparator goes low and the boost stops switching. The following equation can be used to determine the resistance for setting the OVP level: where: ROVP = ( VOUTovp - VOVP(th) ) / IOVPH VOVP(th) is the pin OVP trip point found in the Electrical Characteristics table, and IOVPH is the current into the OVP pin. There are several possibilities for why an OVP condition would be encountered during operation, the two most common being: a disconnected output, and an open LED string. Examples of these are provided in Figure 24 and Figure 25. Figure 24 illustrates when the output of the A8514 is disconnected from load during normal operation. The output voltage instantly increases up to OVP voltage level and then the boost stops switching to prevent damage to the IC. If the output is drained off, eventually the boost might start switching for a short duration until the OVP threshold is hit again. Figure 25 displays a typical OVP event caused by an open LED string. After the OVP condition is detected, the boost stops VOUTovp is the target overvoltage level, Output disconnect event detected (6) ROVP is the value of the external resistor, in , VOUT LED string open condition detected VOUT SW node C2 C1 C3 PWM IOUT C4 t Figure 24: OVP protection in an output disconnect event; shows VOUT (ch1, 10 V/div.), SW node (ch2, 50 V/div.), PWM (ch3, 5 V/div.), and IOUT (ch4, 200 mA/div.), time = 1 ms/div. C2 C1 C3 SW node PWM IOUT C4 t Figure 25: OVP protection in an open LED string event; shows VOUT (ch1, 10 V/div.), SW node (ch2, 50 V/div.), PWM (ch3, 5 V/div.), and IOUT (ch4, 200 mA/div.), time = 500 s/div. Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 20 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 switching, and the open LED string is removed from operation. Afterwards VOUT is allowed to fall, and eventually the boost will resume switching and the A8514 will resume normal operation. A8514 also has built-in secondary overvoltage protection to protect the internal switch in the event of an open diode condition. Open Schottky diode detection is implemented by detecting overvoltage on the SW pin of the device. If voltage on the SW pin exceeds the device safe operating voltage rating, the A8514 disables and remains latched. To clear this fault, the IC must be shut down either by using the PWM/EN signal or by going below Open diode condition detected the UVLO threshold on the VIN pin. Figure 26 illustrates this. As soon as the switch node voltage (SW) exceeds 60 V, the IC shuts down. Due to small delays in the detection circuit, as well as there being no load present, the switch node voltage will rise above the trip point voltage. Figure 27 illustrates when the A8514 is being enabled during an open diode condition. The IC goes through all of its initial LED detection and then tries to enable the boost, at which point the open diode is detected. PWM SW node C1 C2 VOUT IOUT C3 C4 t Figure 26: OVP protection in an open Schottky diode event, while the IC is in normal operation; shows PWM (ch1, 5 V/div.), SW node (ch2, 50 V/div.), VOUT (ch3, 20 V/div.), and IOUT (ch4, 200 mA/div.), time = 1 s/div. Open diode condition detected PWM C1 SW node C2 C3 VOUT IOUT C4 t Figure 27: OVP protection when the IC is enabled during an open diode condition; shows PWM (ch1, 5 V/div.), SW node (ch2, 50 V/div.), VOUT (ch3, 10 V/div.), and IOUT (ch4, 200 mA/div.), time = 500 s/div. Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 21 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 Boost switch overcurrent protection The boost switch is protected with cycle-by-cycle current limiting set at a minimum of 3.0 A. There is also a secondary current limit that is sensed on the boost switch. When detected this current limit immediately shuts down the A8514. The level of this cur- C1 rent limit is set above the cycle-by-cycle current limit to protect the switch from destructive currents when the boost inductor is shorted. Various boost switch overcurrent conditions are shown in Figure 28, Figure 29, and Figure 30. C1 SW node SW node C2 IL IL VOUT VOUT C2 PWM/EN C3 C4 PWM/EN C3 C4 t t Figure 28: Normal operation of the switch node (SW); inductor current (IL) and output voltage (VOUT) for 9 series LEDs in each of four strings configuration; shows SW node (ch1, 20 V/div.), inductor current IL (ch2, 1 A/ div.), VOUT (ch3, 10 V/div.), and PWM/EN (ch4, 5 V/div.), time = 2 s/div. Figure 29: Cycle-by-cycle current limiting; inductor current (yellow trace, IL), note reduction in output voltage as compared to normal operation with the same configuration (Figure 27); shows SW node (ch1, 20 V/div.), inductor current IL (ch2, 1 A/div.), VOUT (ch3, 10 V/div.), and PWM/EN (ch4, 5 V/div.), time = 2 s/div. PWM/EN C1 FAULT C2 SW node C3 IL C4 t Figure 30: Secondary boost switch current limit; when this limit is hit, the A8514 immediately shuts down; shows PWM (ch1, 5 V/div.), VOUT (ch2, 5 V/div.), SW node (ch3, 50 V/div.), and inductor current IL (ch4, 2 A/div.), time = 100 ns/div. Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 22 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 Input overcurrent protection and disconnect switch The primary function of the input disconnect switch is to protect the system and the device from catastrophic input currents during a fault condition. The external circuit implementing the disconnect is shown in Figure 31. If the input disconnect switch is not used, the VSENSE pin must be tied to VIN and the GATE pin must be left open. C1 IIN * 1x mode When the input current is between one and two times the preset current limit value, the disconnect switch enters a constant-current mode for a maximum duration of 10,000 cycles or 5 ms at 2 MHz. During this time, the Fault flag is set immediately and the disconnect switch goes into a linear mode of operation, in which the input current will be limited to a value approximate to the 1x current trip point level (Figure 32). If the fault corrects itself before the expiration of the timer, the Fault flag will be removed and normal operation will resume. The user can also during this time decide whether to shut down the A8514. To immediately shut down the device, pull the FSET/ SYNC pin low for more than 7 s. After the FSET/SYNC pin has been low for a period longer than 7 s, the IC will stop switching, the input disconnect switch will open, and the LEDx pins will stop sinking current. The A8514 can be powered-down into low power mode. To do so, disable the IC by keeping the PWM/EN pin low for a period of 32,750 clock cycles. To keep the disconnect switch stable while the disconnect switch is in 1x mode, use a 22 nF capacitor for CC and a 20 resistor for RC. VIN RSC Q1 RC (3) IIN limited to 3 A (1) Initial fault detected C2 (2) Disconnect switch goes into a linear mode When selecting the external PMOS, check for the following parameters: * Drain-source breakdown voltage V(BR)DSS > -40 V * Gate threshold voltage (make sure it is fully conducting at VGS = -4 V, and cut-off at -1 V) * RDS(on): Make sure the on-resistance is rated at VGS = -4.5 V or similar, not at -10 V; derate it for higher temperature The input disconnect switch has two modes of operation: FAULT GATE (4) After 12.5 ms, disconnect switch shuts down C3 C4 PWM/EN t Figure 32: Showing typical wave forms for a 3-A, 1X current limit under a fault condition; shows fSW = 800 kHz, FAULT (ch1, 5 V/div.), IIN (ch2, 2 A/ div.), GATE (ch3, 5 V/div.), and PWM/EN (ch4, 5 V/div.), time = 5 ms/div. FAULT Fault flag set at 1x trip point C1 C2 A8514 shuts down at 2x trip point GATE IIN C3 C4 PWM/EN t Figure 33: 2x mode, secondary overcurrent fault condition. IIN is the input current through the switch. The Fault flag is set at the 1x current limit, and when the 2x current limit is reached the A8514 disables the gate of the disconnect switch (GATE); shows FAULT (ch1, 5 V/div.), GATE (ch2, 10 V/ div.), IIN (ch3, 2 A/div.), and PWM/EN (ch4, 5 V/div.), time = 5 s/div. VIN To L1 To L1 CC RADJ GATE VSENSE VIN GATE A8514 VSENSE VIN A8514 Figure 31: Typical circuit (left) with the input disconnect feature implemented, and (right) without the input disconnect feature. Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 23 A8514 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver * 2x current limit If the input current level goes above 2x of the preset current limit threshold, the A8514 will shut down in less than 3 s regardless of user input (Figure 33). This is a latched condition. The Fault flag is also set to indicate a fault. This feature is meant to prevent catastrophic failure in the system due to inductor short to ground, switch pin short to ground, or output short to ground. Setting the current sense resistor The typical threshold for the current sense circuit is 104 mV, when RADJ is 0 . This voltage can be trimmed by the RADJ resistor. The typical 1x trip point should be set at about 3 A, which coincides with the cycle-by-cycle current limit minimum threshold. For example, given 3 A of input current, and the calculated maximum value of the sense resistor, RSC = 0.033 . VIN RADJ = (VSENSETRIP - VADJ ) / IADJ (7) VDD C3 PWM/EN C4 t The RSC chosen is 0.03 , a standard. Also: IOUT C1 C2 Figure 34: Shutdown showing a falling input voltage (VIN); shows VIN (ch1, 2 V/div.), IOUT (ch2, 200 mA/div.), VDD (ch3, 5 V/div.), and PWM/EN (ch4, 2 V/div.), time = 5 ms/div. The trip point voltage is calculated as: VADJ = 3.0 A x 0.03 = 0.090 V RADJ = (0.104 - 0.09 V) / (20.3 A) = 731 Input UVLO When VIN and VSENSE rise above the VUVLOrise threshold, the A8514 is enabled. A8514 is disabled when VIN falls below the VUVLOfall threshold for more than 50 s. This small delay is used to avoid shutting down because of momentary glitches in the input power supply. When VIN falls below 4.35 V, the IC will shut down (see Figure 33). VDD The VDD pin provides regulated bias supply for internal circuits. Connect the capacitor CVDD with a value of 0.1 F or greater to this pin. The internal LDO can deliver no more than 2 mA of current with a typical VDD of about 3.5 V, enabling this pin to serve as the pull-up voltage for the FAULT pin. Shutdown If the PWM/EN pin is pulled low for more than tPWML (32,750 clock cycles), the device enters shutdown mode and clears all GATE C1 IOUT C2 VDD C3 PWM/EN C4 t Figure 35: Shutdown using the enable function, showing the 16 ms delay between the PWM/EN signal and when the VDD and GATE of the disconnect switch turns off; shows GATE (ch1, 10 V/div.), IOUT (ch2, 200 mA/ div.), VDD (ch3, 5 V/div.), and PWM/EN (ch4, 2 V/div.), time = 5 ms/div. Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 24 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 internal fault registers. As an example, at a 2 MHz clock frequency, it will take approximately 16.3 ms to shut down the IC into the low power mode (Figure 35). When the A8514 is shut down, the IC will disable all current sources and wait until the PWM/EN signal goes high to re-enable the IC. If faster shut down is required, the FSET/SYNC pin can be used. The possible fault conditions that the device can detect are: Open LED pin, LED pin shorted to ground, shorted inductor, VOUT short to ground, SW pin shorted to ground, ISET pin shorted to ground, and input disconnect switch source shorted to ground. Fault protection during operation The A8514 constantly monitors the state of the system to determine if any fault conditions occur during normal operation. The response to a triggered fault condition is summarized in the Fault Mode table. * Some of the protection features might not be active during startup, to prevent false triggering of fault conditions. Note the following: * Some of these faults will not be protected if the input disconnect switch is not being used. An example of this is VOUT short to ground. Fault Mode Table Fault Name Type Active Fault Flag Set Primary switch overcurrent protection (cycle-by-cycle current limit) Auto-restart Always No This fault condition is triggered by the cycle-bycycle current limit, ISW(LIM). Secondary switch current limit Input disconnect current limit Secondary OVP Latched Latched Latched Always Always Always Boost Disconnect switch Sink driver Off for a single cycle On On Yes When the current through the boost switch exceeds secondary current SW limit (ISW(LIM2)) the device immediately shuts down the disconnect switch, LED drivers, and boost. The Fault flag is set. To reenable the device, the PWM/EN pin must be pulled low for 32,750 clock cycles. Off Off Off Yes The device is immediately shut off if the voltage across the input sense resistor is 2X the preset current value. The Fault flag is set. If the input current limit is between 1X and 2X, the Fault flag is set but the IC will continue to operate normally for tGFAULT1 or until it is shut down. To re-enable the device the PWM/EN pin must be pulled low for 32,750 clock cycles. Off Off Off Yes Secondary overvoltage protection is used for open diode detection. When diode D1 opens, the SW pin voltage will increase until VOVP(SEC) is reached. This fault latches the IC. The input disconnect switch is disabled as well as the LED drivers, and the Fault flag is set. To re-enable the part the PWM pin must be pulled low for 32,750 clock cycles. Off Off Off Description Continued on the next page... Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 25 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 Fault Mode Table (continued) Fault Name LED Pin Short Protection LED Pin open ISET Short Protection FSET/SYNC Short Protection Overvoltage Protection Type Auto-restart Auto-restart Auto-restart Auto-restart Auto-restart Active Startup Normal Operation Always Always Always Fault Flag Set Description Boost Disconnect Switch Sink driver Off On Off No This fault prevents the device from starting-up if either of the LEDx pins are shorted. The device stops soft-start from starting while either of the LEDx pins are determined to be shorted. After the short is removed, soft-start is allowed to start. No When an LEDx pin is open the device will determine which LED pin is open by increasing the output voltage until OVP is reached. Any LED string not in regulation will be turned off. The device will then go back to normal operation by reducing the output voltage to the appropriate voltage level. On On Off for open pins. On for all others. No This fault occurs when the ISET current goes above 150% of the maximum current. The boost will stop switching, the disconnect switch will turn off, and the IC will disable the LED sinks until the fault is removed. When the fault is removed the IC will try to to regulate to the preset LED current. Off On Off Yes Fault occurs when the FSET/SYNC current goes above 150% of maximum current, about 180 A. The boost will stop switching, the disconnect switch will turn off, and the IC will disable the LED sinks until the fault is removed. When the fault is removed the IC will try to restart with soft-start. Off Off Off No Fault occurs when OVP pin exceeds VOVP(th) threshold. The A8514 will immediately stop switching to try to reduce the output voltage. If the output voltage decreases then the A8514 will restart switching to regulate the output voltage. Stop during OVP event. On On On On Off for shorted pins. On for all others. LED Short Protection Auto-restart Always No Fault occurs when the LED pin voltage exceeds VLEDSC. When the LED short protection is detected the LED string that is above the threshold will be removed from operation. Overtemperature Protection Auto-restart Always No Fault occurs when the die temperature exceeds the overtemperature threshold, 165C. Off Off Off VIN UVLO Auto-restart Always No Fault occurs when VIN drops below VUVLO , 3.90 V maximum. This fault resets all latched faults. Off Off Off Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 26 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 APPLICATION INFORMATION Design Example for Boost Configuration This section provides a method for selecting component values when designing an application using the A8514. The resulting design is diagrammed in Figure 36. Then the OVP resistor is: Assumptions: For the purposes of this example, the following are given as the application requirements: where both IOVPH and VOVP(th) are taken from the Electrical Characteristics table. * VBAT: 10 to 14 V Chose a value of resistor that is higher value than the calculated ROVP . In this case a value of 137 k was selected. Below is the actual value of the minimum OVP trip level with the selected resistor: * Quantity of LED channels, #CHANNELS : 4 * Quantity of series LEDs per channel, #SERIESLEDS : 10 * LED current per channel, ILED : 60 mA ROVP = (VOUT(OVP) - VOVP(th) ) / IOVPH (9) = (34.7 (V) - 8.1 (V)) / 199 (A) = 133.67 k VOUT(OVP) = 137 (k) x 199 (A) + 8.1 (V) = 35.36 V * Vf at 60 mA: 3.2 V Step 3b: At this point a quick check must be done to see if the * fSW : 2 MHz conversion ratio is acceptable for the selected frequency. * TA(max): 65C Dmaxofboost = 1 - tSWOFFTIME x fSW * PWM dimming frequency: 200 Hz, 1% duty cycle = 1 - 68 (ns) x 2.0 (MHz) = 86.4% Procedure: The procedure consists of selecting the appropriate configuration and then the individual component values, in an ordered sequence. where the minimum off-time (tSWOFFTIME) is found in the Electrical Characteristics table. The Theoretical Maximum VOUT is then calculated as: Step 1: Connect LEDs to pins LED1 and LED2. Step 2: Determining the LED current setting resistor RISET: RISET = (VISET x AISET) / ILED (7) = (1.003 (V) x 653) / 60 mA = 10.92 k Step 3: Determining the OVP resistor. The OVP resistor is connected between the OVP pin and the output voltage of the converter. VIN(min) 1 - Dmaxofboost - Vd (11) 10 (V) - 0.4 (V) = 73.13 V 1 - 0.864 where Vd is the diode forward voltage. Step 3a: The first step is determining the maximum voltage based on the LED requirements. The regulation voltage, VLED , of the A8514 is 700 mV. A constant term, 2 V, is added to give margin to the design due to noise and output voltage ripple. = 10 x 3.2 V+ 0.7 V + 2 V = 34.7 V VOUT(max) = = Choose a 11.00 k resistor. VOUT(OVP) = #SERIESLEDS x Vf + VLED + 2 (V) (10) (8) The Theoretical Maximum VOUT value must be greater than the value VOUT(OVP) . If this is not the case, the switching frequency of the boost converter must be reduced to meet the maximum duty cycle requirements. Step 4: Selecting the inductor. The inductor must be chosen such that it can handle the necessary input current. In most applications, due to stringent EMI requirements, the system must operate in continuous conduction mode throughout the whole input voltage range. Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 27 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 Step 4a: Determining the duty cycle, calculated as follows: D(max) = 1 - = 1- VIN(min) Step 4d: Double-check to make sure the 1/2 current ripple is less than IIN(min): (12) VOUT(OVP) + Vd 10 (V) = 72.04% 35.36 (V) + 0.4 (V) to the system. The minimum input current will dictate the inductor value. The maximum current rating will dictate the current rating of the inductor. First, the maximum input current, given: = 4 ILED (13) 0.060 (A) = 0.240 A = VOUT(OVP) IOUT VIN(min) 0.67 A > 0.19 A A good inductor value to use would be 10 H. compensation for the inductor chosen. The slope compensation value is determined by the following formula: 3.6 fSW Slope Compensation = = 3.6 A /s (19) 2 10 6 Next insert the inductor value used in the design: ILused = then: IIN(max) = (14) 35.36 (V) 240 (mA) = 0.94 A 10 (V) 0.90 = Required Slope (min) = (15) 35.36 (V) 240 (mA) = 0.67 A 14 (V) 0.90 A good approximation of efficiency, , can be taken from the efficiency curves located in the datasheet. A value of 90% is a good starting approximation. Step 4c: Determining the inductor value. To ensure that the inductor operates in continuous conduction mode, the value of the inductor must be set such that the 1/2 inductor ripple current is not greater than the average minimum input current. A first past assumes Iripple to be 40% of the maximum inductor current: IL = IIN(max) x Iripple then: (16) = 0.94 x 0.40 = 0.376 A L= = VIN(min) IL fSW (17) D(max) 10 (V) 0.376 (A) 2 (MHz) 0.72 = 9.57 H (20) 10 (V) 0.72 = 0.36 A 10 (H) 2.0 (MHz) ILused 1 10 -6 1 (1 - D(max)) (21) fSW Next, calculate minimum input current, as follows: = VIN(min) D(max) Lused fSW Calculate the minimum required slope: where is efficiency. VOUT(OVP) IOUT IIN(min) = VIN(max) (18) Step 4e: This step is used to verify that there is sufficient slope Step 4b: Determining the maximum and minimum input current IOUT = #CHANNELS IIN(min) > 1/2 IL = 0.36 (A) 1 10 -6 1 (1 - 0.72) 2.0 (MHz) = 2.57 A/s If the minimum required slope is greater than the calculated slope compensation, the inductor value must be increased. Note: The slope compensation value is in A/s, and 1x10 -6 is a constant multiplier. Step 4f: Determining the inductor current rating. The inductor current rating must be greater than the IIN(max) value plus the ripple current IL, calculated as follows: L(min) = IIN(max) + 1/2 ILused (22) = 0.94 (A) + 0.36 (A) / 2 = 1.12 A Step 5: Determining the resistor value for a particular switching frequency. Use the RFSET values shown in Figure 7. For example, a 10 k resistor will result in a 2 MHz switching frequency. Step 6: Choosing the proper switching diode. The switching diode must be chosen for three characteristics when it is used in LED lighting circuitry. The most obvious two are: current rating of the diode and reverse voltage rating. Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 28 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 The reverse voltage rating should be such that during operation condition, the voltage rating of the device is larger than the maximum output voltage. In this case it is VOUT(OVP). The peak current through the diode is calculated as: Idp = IIN(max) + 1/2 ILused (23) = 0.94 (A) + 0.36 (A) / 2 = 1.12 A The third major component in deciding the switching diode is the reverse current, IR , characteristic of the diode. This characteristic is especially important when PWM dimming is implemented. During PWM off-time the boost converter is not switching. This results in a slow bleeding off of the output voltage, due to leakage currents. IR can be a large contributor, especially at high temperatures. On the diode that was selected in this design, the current varies between 1 and 100 A. Step 7: Choosing the output capacitors. The output capacitors must be chosen such that they can provide filtering for both the boost converter and for the PWM dimming function. The biggest factors that contribute to the size of the output capacitor are: PWM dimming frequency and PWM duty cycle. Another major contributor is leakage current, ILK . This current is the combination of the OVP leakage current as well as the reverse current of the switching diode. In this design the PWM dimming frequency is 200 Hz and the minimum duty cycle is 1%. Typically, the voltage variation on the output, VCOUT , during PWM dimming must be less than 250 mV, so that no audible hum can be heard. The capacitance can be calculated as follows: COUT = ILK 1 - D(min) fPWM(dimming) V COUT = 200 A (24) 1 - 0.01 = 3.96 F 200 Hz 0.250 V A capacitor larger than 3.96 F should be selected due to degradation of capacitance at high voltages on the capacitor. A ceramic 4.7 F 50 V capacitor is a good choice to fulfill this requirement. Corresponding capacitors include: The rms current through the capacitor is given by: ILused IIN(max) x 12 1 - D(max) D(max) + ICOUTrms = IOUT 0.36 (A) 0.72 + 0.94 (A) x 12 1 - 0.72 =0.240 (A) (25) = 0.39 A The output capacitor must have a current rating of at least 390 mA. The capacitor selected in this design was a 4.7 F 50 V capacitor with a 3 A current rating. Step 8: Selecting input capacitor. The input capacitor must be selected such that it provides a good filtering of the input voltage waveform. To reduce the switching frequency noise, a good rule of thumb is to set the input voltage high frequency ripple VIN to be 1% of the minimum input voltage. The minimum input capacitor requirements are as follows: CIN = = ILused 8 8 (26) fSW VIN 0.36 (A) 2 (MHz) 0.1 (V) = 0.23 F The rms current through the capacitor is given by: CINrms = ILused / 12 = 0.104 A (27) A good ceramic input capacitor with ratings of 2.2 F 50 V or 4.7 F 50 V will suffice for this application. Corresponding capacitors include: Vendor Value Part number Vendor Value Part number Murata 4.7 F 50 V GRM32ER71H475KA88L Murata 4.7 F 50 V GRM32ER71H475KA88L Murata 2.2 F 50 V GRM31CR71H225KA88L Murata 2.2 F 50 V GRM31CR71H225KA88L Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 29 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 The required electrolytic capacitor will be: ( I T ) 106 (30) CIN = = 59.4 F VIN If this issue is important to the customer, it is recommended to use a 50 V/ 68 F, low ESR value electrolytic capacitor. Selecting the electrolytic input capacitor according to dimming transient During a PWM dimming transient, unless an adequate input capacitor is used, the input voltage drops significantly. The input capacitor ripple current, I , during the dimming transient is the same as the input maximum DC current, and can be calculated by: I = IINDC(max) = VOUT IOUT VIN(min) Step 9: Choosing the input disconnect switch components. Set the input disconnect 1X current limit to 3 A by choosing a sense resistor. The calculated maximum value of the sense resistor is: (28) RSC(max) = VSENSEtrip / 3.0 (A) = 0.104 (V) / 3.0 (A) = 0.035 The RSC chosen is 0.033 , a standard. where VIN(min) is the minimum input voltage, 10 V. Consider the case where: = 0.88, VIN(min) = 10 V, VOUT = 33.1 V, IOUT = 0.24 A, then: The trip point voltage must be: VADJ = 3.0 (A) x 0.033 () = 0.099 (V) RADJ = (VSENSEtrip - VADJ ) / IADJ (typ) (32) RADJ = (0.104 (V) - 0.099 (V)) / 20.3 (A) = 246.31 A value of 249 was chosen for this design. I = IINDC(max) = (33.1 x 0.24) / (10 x 0.88) = 0.9 A Allowing VIN to drop by VIN = 0.5 V, and considering the feedback loop bandwidth, or cross over frequency, to be fC = 30 kHz, the input drop will last T, calculated by : T = 1 /fC = 33 x 10-6 (second) VIN 10 to 14 V CIN 4.7 F RSC 0.033 RADJ 249 RC 20 D1 2 A / 60 V L1 10 H GATE VSENSE VIN VDD CVDD 0.1 F SW PAD RFSET 10 k OVP VOUT ROVP 137 k COUT1 4.7 F COUT2 2.2 F A8514 FAULT PWM/EN APWM ISET RISET 11 k calculate RZ, CZ, and CP. Using L1 = 10 H, COUT = (4.7 F + 2.2 F ), and fC = 30 kHz, the calculation results for RZ , CZ , and CP are: RZ = 499 , CZ = 100 nF, and CP = 320 pF. CC 22 nF VC 100 k Step 10: See appendix A for a detailed description of how to (29) Q1 (31) FSET/SYNC AGND LED1 LED2 10 LEDs each string LED3 LED4 COMP PGND CP 320 pF RZ 499 CZ 100 nF Figure 36: The schematic diagram showing calculated values from the design example above. Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 30 A8514 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver Design Example for SEPIC Configuration This section provides a method for selecting component values when designing an application using the A8514 in SEPIC (Single-Ended Primary-Inductor Converter) circuit. SEPIC topology has the advantage that it can generate a positive output voltage either higher or lower than the input voltage. The resulting design is diagrammed in Figure 37. of the A8514 is 700 mV. A constant term, 2 V, is added to give margin to the design due to noise and output voltage ripple. Assumptions: For the purposes of this example, the following are given as the application requirements: = (15.9 (V) - 8.1 (V)) / 0.199 (mA) = 39.196 k * VBAT: 6 to 14 V ( VIN(min): 5 V and VIN(max): 16 V ) * Quantity of LED channels, #CHANNELS : 4 * LED current per channel, ILED : 60 mA = 4 x 3.3 (V) + 0.7 (V) + 2 (V) = 15.9 V Then the OVP resistor is: ROVP = (VOUT(OVP) - VOVP(th) ) / IOVPH (35) where both IOVPH and VOVP(th) are taken from the Electrical Characteristics table. VOUT(OVP) = 39.2 (k) x 0.199 (mA) + 8.1 (V) = 15.9 V * LED Vf at 60 mA: 3.3 V Step 3b: At this point a quick check must be done to determine if * fSW : 2 MHz the conversion ratio is acceptable for the selected frequency. * TA(max): 65C Dmax = 1 - tSWOFFTIME x fSW * PWM dimming frequency: 200 Hz, 1% duty cycle (36) = 1 - 68 (ns) x 2 (MHz) = 86.4% Procedure: The procedure consists of selecting the appropriate configuration and then the individual component values, in an ordered sequence. Step 1: Connecting LEDs to LEDx pins. If only some of the LED channels are needed, the unused LEDx pins should be pulled to ground using a 1.5 k resistor. Step 2: Determining the LED current setting resistor RISET: (33) = (1.003 (V) x 653) / 0.60 (A) = 10.92 k Choose an 11.00 k 1% resistor. Step 3: Determining the OVP resistor. The OVP resistor is connected between the OVP pin and the output voltage of the converter. Step 3a: The first step is determining the maximum voltage (34) In this case a value of 39.2 k was selected. Below is the actual value of the minimum OVP trip level with the selected resistor: * Quantity of series LEDs per channel, #SERIESLEDS : 4 RISET = (VISET x AISET) / ILED VOUT(OVP) = #SERIESLEDS x Vf + VLED + 2 (V) based on the LED requirements. The regulation voltage, VLED , where the minimum off-time (tSWOFFTIME) is found in the Electrical Characteristics table. The Theoretical Maximum VOUT is then calculated as: VOUT(max) = VIN(min) = 5 (V) Dmax 1 - Dmax - Vd (37) 0.86 - 0.4 (V) = 30.3 V 1 - 0.86 where Vd is the diode forward voltage. The Theoretical Maximum VOUT value must be greater than the value VOUT(OVP) . If this is not the case, it may be necessary to reduce the frequency to allow the boost to convert the voltage ratios. Step 4: Selecting the inductor. The inductor must be chosen such that it can handle the necessary input current. In most applica- Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 31 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 tions, due to stringent EMI requirements, the system must operate in continuous conduction mode throughout the whole input voltage range. then: L= Step 4a: Determining the duty cycle, calculated as follows: D(max) = = VOUT(OVP) + Vd VIN(min) + VOUT(OVP) + Vd (38) to the system. The minimum input current will dictate the inductor value. The maximum current rating will dictate the current rating of the inductor. First, the maximum input current, given: = 4 5 (V) 0.254 (A) 2 (MHz) (39) IIN(min) > 1/2 IL A good inductor value to use would be 10 H. Step 4e: Next insert the inductor value used in the design to determine the actual inductor ripple current: 0.060 (A) = 0.240 A = VOUT(OVP) IOUT VIN(min) (40) VIN(min) D(max) Lused fSW (45) 0.765 5 (V) = 0.191 A 10 (H) 2.0 (MHz) Step 4f: Determining the inductor current rating. The inductor current rating must be greater than the IIN(max) value plus half of Next, calculate minimum input current, as follows: VOUT(OVP) IOUT IIN(min) = VIN(max) 15.9 (V) 16 (V) ILused = = 15.9 (V) 0.24 (A) = 0.848 A 5 (V) 0.90 where is efficiency. = (44) 0.265 A > 0.127 A then: IIN(max) = 0.765 = 7.53 H than IIN(min): Step 4b: Determining the maximum and minimum input current ILED (43) D(max) Step 4d: Double-check to make sure the 1/2 current ripple is less 15.9 (V) + 0.4 (V) = 76.5% 5 (V) + 15.9 (V) + 0.4 (V) IOUT = #CHANNELS = VIN(min) IL fSW (41) 0.24 (A) = 0.265 A 0.90 the ripple current IL, calculated as follows: L(min) = IIN(max) + 1/2 ILused (46) = 0.848 (A) + 0.096 (A) = 0.944 A Step 5: Determining the resistor value for a particular switching frequency. Use the RFSET values shown in Figure 7. For example, Step 4c: Determining the inductor value. To ensure that the a 10 k resistor will result in a 2 MHz switching frequency. inductor operates in continuous conduction mode, the value of the inductor must be set such that the 1/2 inductor ripple current is not greater than the average minimum input current. As a first pass assume Iripple to be 30% of the maximum inductor current: diode must be chosen for three characteristics when it is used in IL = IIN(max) x Iripple LED lighting circuitry. The most obvious two are: current rating = 0.848 x 0.30 = 0.254 A (42) Step 6: Choosing the proper switching diode. The switching of the diode and reverse voltage rating. Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 32 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 The reverse breakdown voltage rating for the output diode in a SEPIC circuit should be: VBD > VOUT(OVP)(max) + VIN(max) (47) > 15.9 (V) + 16 (V) = 31.9 V because the maximum output voltage in this case is VOUT(OVP). The peak current through the diode is calculated as: Idp = IIN(max) + 1/2 ILused Step 7: Choosing the output capacitors. The output capacitors must be chosen such that they can provide filtering for both the boost converter and for the PWM dimming function. The biggest factors that contribute to the size of the output capacitor are: PWM dimming frequency and PWM duty cycle. Another major contributor is leakage current, ILK . This current is the combination of the OVP leakage current as well as the reverse current of the switching diode. In this design the PWM dimming frequency is 200 Hz and the minimum duty cycle is 1%. Typically, the voltage variation on the output, VCOUT , during PWM dimming must be less than 250 mV, so that no audible hum can be heard. The capacitance can be calculated as follows: 1 - D(min) fPWM(dimming) V COUT = 200 (A) The rms current through the capacitor is given by: ICOUTrms = IOUT (48) = 0.848 (A) + 0.096 (A) = 0.944 A The third major component in deciding the switching diode is the reverse current, IR , characteristic of the diode. This characteristic is especially important when PWM dimming is implemented. During PWM off-time the boost converter is not switching. This results in a slow bleeding off of the output voltage, due to leakage currents. IR can be a large contributor, especially at high temperatures. On the diode that was selected in this design, the current varies between 1 and 100 A. It is often advantageous to pick a diode with a much higher breakdown voltage, just to reduce the reverse current. Therefore for this example, pick a diode rated for a VBD of 60 V, instead of just 40 V. COUT = ILK A capacitor larger than 3.96 F should be selected due to degradation of capacitance at high voltages on the capacitor. Select a 4.7 F capacitor for this application. (49) D(max) 1 - D(max) = 0.240 (A) (50) 0.765 = 0.433 A 1 - 0.765 The output capacitor must have a ripple current rating of at least 500 mA. The capacitor selected for this design is a 4.7 F 50 V capacitor with a 1.5 A current rating. Step 8: Selecting input capacitor. The input capacitor must be selected such that it provides a good filtering of the input voltage waveform. A estimation rule is to set the input voltage ripple, VIN , to be 1% of the minimum input voltage. The minimum input capacitor requirements are as follows: CIN = = ILused 8 8 fSW VIN 0.191 (A) = 0.24 F 2 (MHz) 0.05 (V) The rms current through the capacitor is given by: ILused CINrms = 12 0.191 (A) = 0.055 A = 12 (51) (52) A good ceramic input capacitor with a rating of 2.2 F 25 V will suffice for this application. 1 - 0.01 = 3.96 F 200 (Hz) 0.250 (V) Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 33 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 Step 9: Selecting coupling capacitor CSW. The minimum capaci- The rms current requirement of the coupling capacitor is given by: tance of CSW is related to the maximum voltage ripple allowed across it: CSW = IOUT DMAX fSW (53) VSW 0.24 (A) 0.765 = = 0.92 F 0.1 (V) 2 (MHz) 1 - D(max) D(max) ICSWrms = IIN(max) = 0.848 (A) (54) 1 - 0.765 = 0.47 A 0.765 The voltage rating of the coupling capacitor must be greater than VIN(max), or 16 V in this case. A ceramic capacitor rated for 2.2 F 25 V will suffice for this application. VIN 9 to 16 V CIN 2.2 F RSC 0.033 RADJ 249 Q1 RC 20 CC 22 nF VC CVDD 0.1 F 100 k RISET 11 k CSW 2.2 F L1 10 H L2 10 H RFSET 10 k GATE VSENSE VIN VDD A8514 OVP PAD LED1 FSET/SYNC AGND VOUT ROVP 39.2 k SW FAULT PWM/EN APWM ISET D1 2 A / 60 V COUT 4.7 F LED2 LED3 LED4 COMP PGND CP 120 pF RZ 150 CZ 0.47 F Figure 37: Typical application showing SEPIC configuration, with accurate input current sense, and VSENSE to ground protection. Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 34 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 Package LP, 20-Pin TSSOP with Exposed Thermal Pad 0.45 6.500.10 8 0 20 0.65 20 0.20 0.09 1.70 C 3.00 4.400.10 6.400.20 3.00 6.10 0.60 0.15 A 1 1.00 REF 2 4.12 0.25 BSC 20X SEATING PLANE 0.10 C 0.30 0.19 1.20 MAX 0.65 BSC 0.15 0.00 C SEATING PLANE GAUGE PLANE 1 2 4.12 B PCB Layout Reference View For Reference Only; not for tooling use (reference MO-153 ACT) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Terminal #1 mark area B Reference land pattern layout (reference IPC7351 SOP65P640X110-21M); All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances; when mounting on a multilayer PCB, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5) C Exposed thermal pad (bottom surface); dimensions may vary with device Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 35 Wide Input Voltage Range, High Efficiency Fault Tolerant LED Driver A8514 Revision History Number Date 5 May 20, 2013 Description 6 October 1, 2015 Added Figure 11, and renumbered subsequent figures 7 March 1, 2017 Corrected SYNC Input Logic Voltage values on page 6 8 March 13, 2019 Updated Sync section (page 15) Update application information, add appendix A Copyright 2019, Allegro MicroSystems, LLC Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro's products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of Allegro's product can reasonably be expected to cause bodily harm. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. Copies of this document are considered uncontrolled documents. For the latest version of this document, visit our website: www.allegromicro.com Allegro MicroSystems, LLC 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com 36