CERAMIC SMD CRYSTAL CLOCK OSCILLATOR WITH VOLTAGE CONTROL ALVD FEATURES: * Based on a proprietary digital multiplier * Tri-State Output * Low Phase Jitter * 3.3V +/- 5% operation * Ceramic SMD, low profile package Pb RoHS Compliant 7.0 x 5.0 x 1.8m m | | | | | | | | | | | | | | APPLICATIONS: * SONET, xDSL * SDH, CPE * STB STANDARD SPECIFICATIONS: P ARAMETERS ABRACON P/N: Frequency range: Operating temperature: Storage temperature: Overall frequency stability: Supply voltage (V dd ): Voltage control (V C ): Symmetry at 1/2 Vdd: Output Level: Pullability: Tristate Function: Aging per year: RMS Phase Jitter: Period Jitter (peak to peak): Phase Noise: ALVD Series 750 KHz to 800 MHz 0C to +70C (see options) -55C to +125C 50 ppm max. (see options) 3.3V 10% 0.3VDC min, 1.65VDC typ, 3.0 VDC max. 40/60% max. See options (PECL, CMOS, or LVDS) 50ppm (see option) "1" (V IH >= 0.7* Vdd) or open: Oscillation "0" (V IL < 0.3* Vdd) : Hi Z 5 ppm max. 3ps typical, 5ps max. (12KHz~20MHz) 35 ps typical -112 dBc/Hz @ 1kHz Offset from 155.52MHz -125 dBc/Hz @ 10kHz Offset from 155.52MHz -123 dBc/Hz @ 100KHz Offset from 155.52MHz -109 dBc/Hz @ 1kHz Offset from 622.08MHz -110 dBc/Hz @ 10kHz Offset from 622.08MHz -109 dBc/Hz @ 100KHz Offset from 622.08MHz PECL: Supply current (I DD):25mA max (for Fo<24MHz),65mA max (for 24MHz