ISD4004 Series Single-Chip Voice Record/Playback Devices 8-, 10-, 12-, and 16-Minute Durations GENERAL DESCRIPTION The ISD4004 ChipCorder(R) Products provide highquality, 3-volt, single-chip record/playback solutions for 8- to 16-minute messaging applications which are ideal for cellular phones and other portable products. The CMOS-based devices include an on-chip oscillator, antialiasing filter, smoothing filter, AutoMuteTM feature, audio amplifier, and high density, multilevel Flash storage array. The ISD4004 series is designed to be used in a microprocessor- or microcontroller-based system. Address and control are accomplished through a Serial Peripheral Interface (SPI) or Microwire Serial Interface to minimize pin count. Recordings are stored in on-chip nonvolatile memory cells, providing zero-power message storage. This unique, single-chip solution is made possible through ISD's patented multilevel storage technology. Voice and audio signals are stored directly into memory in their natural form, providing high-quality, solid-state voice reproduction. Figure: ISD4004 Series Block Diagram August 2000 ISD/Winbond * 2727 North First Street, San Jose, CA 95134 * TEL: 408/943-6666 * FAX: 408/544-1787 * http://www.isd.com ISD4004 Series FEATURES * Single-chip voice record/playback solution * Single +3 volt supply * Low-power consumption * * * - Operating current: ICC Play = 15 mA (typical) ICC Rec = 25 mA (typical) - Standby current: 1 A (typical) * Single-chip durations of 8, 10, 12, and 16 minutes High-quality, natural voice/audio reproduction * AutoMute feature provides background noise attenuation during periods of silence * * Fully addressable to handle multiple messages Nonvolatile message storage Power consumption controlled by SPI or Microwire control register * 100-year message retention (typical) * 100K record cycles (typical) * On-chip clock source * Available in die form, PDIP, SOIC, and TSOP * Extended temperature (-20C to +70C) and industrial temperature (-40C to +85C) versions available No algorithm development required * Microcontroller SPI or MicrowireTM Serial Interface Table: ISD4004 Series Summary Part Number Duration (minutes) Input Sample Rate (KHz) Typical Filter Pass Band (KHz) ISD4004-08M 8.0 8.0 3.4 ISD4004-10M 10.0 6.4 2.7 ISD4004-12M 12.0 5.3 2.3 ISD4004-16M 16.0 4.0 1.7 ii Voice Solutions in SiliconTM Table of Contents DETAILED DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Speech/Sound Quality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Duration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Flash Storage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Microcontroller Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 PIN DESCRIPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Voltage Inputs (VCCA, VCCD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ground Inputs (VSSA, VSSD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Non-Inverting Analog Input (ANA IN+) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Inverting Analog Input (ANA IN-) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Audio Output (AUD OUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Slave Select (SS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Master Out Slave In (MOSI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Master In Slave Out (MISO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Serial Clock (SCLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Interrupt (INT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Row Address Clock (RAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 External Clock Input (XCLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 AutoMuteTM Feature (AM CAP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 SERIAL PERIPHERAL INTERFACE (SPI) DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Message Cueing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Power-Up Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 SPI Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 SPI Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 TIMING DIAGRAMS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 DEVICE PHYSICAL DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 ISD iii ISD4004 Series FIGURES, CHARTS, AND TABLES IN THE ISD4004 SERIES DATA SHEET iv Figure 1: Figure 2: Figure 3: Figure 4: Figure 5: Figure 6: Figure 7: Figure 8: Figure 9: Figure 10: Figure 11: Figure 12: Figure 13: Figure 14: Figure 15: ISD4004 Series TSOP and PDIP/SOIC Pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 ISD4004 Series ANA IN Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 SPI Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 SPI Interface Simplified Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 8-Bit Command Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 24-Bit Command Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Playback/Record and Stop Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Application Example Using SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Application Example Using Microwire . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Application Example Using SPI Port on Microcontroller . . . . . . . . . . . . . . . . . . . . . . . 17 28-Lead 8x13.4 mm Plastic Thin Small Outline Package (TSOP) Type I (E) . . . . . . . . 18 28-Lead 0.600-Inch Plastic Dual Inline Package (PDIP) (P) . . . . . . . . . . . . . . . . . . . . 19 28-Lead 0.300-Inch Plastic Small Outline Integrated Circuit (SOIC) (S) . . . . . . . . . . . 20 ISD4004 Series Bonding Physical Layout (Unpackaged Die) . . . . . . . . . . . . . . . . . . . 21 Table 1: Table 2: Table 3: Table 4: Table 5: Table 6: Table 7: Table 8: Table 9: Table 10: Table 11: Table 12: Table 13: Table 14: Table 15: Table 16: External Clock Input Clocking Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Opcode Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 SPI Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Absolute Maximum Ratings (Packaged Parts) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Operating Conditions (Packaged Parts) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 DC Parameters (Packaged Parts) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 AC Parameters (Packaged Parts) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Absolute Maximum Ratings (Die) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Operating Conditions (Die) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 DC Parameters (Die) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 AC Parameters (Die) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 SPI AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Plastic Thin Small Outline Package (TSOP) Type I (E) Dimensions . . . . . . . . . . . . . . . . 18 Plastic Dual Inline Package (PDIP) (P) Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Plastic Small Outline Integrated Circuit (SOIC) (S) Dimensions . . . . . . . . . . . . . . . . . . 20 ISD4004 Series Device Pin/Pad Designations, with Respect to Die Center (m) . . . . 22 Voice Solutions in SiliconTM ISD4004 Series DETAILED DESCRIPTION PROGRAMMING SPEECH/SOUND QUALITY The ISD4004 series is also ideal for playback-only applications, where single or multiple message Playback is controlled through the SPI port. Once the desired message configuration is created, duplicates can easily be generated via an ISD programmer. The ISD4004 ChipCorder series includes devices offered at 4.0, 5.3, 6.4, and 8.0 KHz sampling frequencies, allowing the user a choice of speech quality options. Increasing the duration within a product series decreases the sampling frequency and bandwidth, which affects sound quality. Please refer to the ISD4004 Series Product Summary table on the second page to compare filter pass band and product durations. The speech samples are stored directly into on-chip nonvolatile memory without the digitization and compression associated with other solutions. Direct analog storage provides a natural sounding reproduction of voice, music, tones, and sound effects not available with most solid-state solutions. DURATION To meet end system requirements, the ISD4004 series products are single-chip solutions at 8, 10, 12, 16 minutes. FLASH STORAGE One of the benefits of ISD's ChipCorder technology is the use of on-chip nonvolatile memory, which provides zero-power message storage. The message is retained for up to 100 years (typically) without power. In addition, the device can be re-recorded (typically) over 100,000 times. MICROCONTROLLER INTERFACE PIN DESCRIPTIONS VOLTAGE INPUTS (VCCA, VCCD) To minimize noise, the analog and digital circuits in the ISD4004 devices use separate power busses. These +3 V busses are brought out to separate pins and should be tied together as close to the supply as possible. In addition, these supplies should be decoupled as close to the package as possible. GROUND INPUTS (VSSA, VSSD) The ISD4004 series utilizes separate analog and digital ground busses. The analog ground (VSSA) pins should be tied together as close to the package as possible and connected through a lowimpedance path to power supply ground. The digital ground (VSSD) pin should be connected through a separate low-impedance path to power supply ground. These ground paths should be large enough to ensure that the impedance between the VSSA pins and the VSSD pin is less than 3 W. The backside of the die is connected to VSS through the substrate resistance. In a chip-onboard design, the die attach area must be connected to VSS or left floating. A four-wire (SCLK, MOSI, MISO, SS) SPI interface is provided for ISD4004 control and addressing functions. The ISD4004 is configured to operate as a peripheral slave device, with a microcontrollerbased SPI bus interface. Read/Write access to all the internal registers occurs through this SPI interface. An interrupt signal (INT) and internal readonly Status Register are provided for handshake purposes. ISD 1 ISD4004 Series Figure 1: ISD4004 Series TSOP and PDIP/SOIC Pinouts ISD4004 ISD4004 28-PIN TSOP PDIP/SOIC Figure 2: ISD4004 Series ANA IN Modes 2 Voice Solutions in SiliconTM ISD4004 Series NON-INVERTING ANALOG INPUT (ANA IN+) SLAVE SELECT (SS) This pin is the non-inverting analog input that transfers the signal to the device for recording. The analog input amplifier can be driven single ended or differentially. In the single-ended input mode, a 32 mVp-p (peak-to-peak) maximum signal should be capacitively connected to this pin for optimal signal quality. This capacitor value, together with the 3 KW input impedance of ANA IN+, is selected to give cutoff at the low frequency end of the voice passband. In the differential-input mode, the maximum input signal at ANA IN+ should be 16 mVp-p for optimal signal quality. The circuit connections for the two modes are shown in Figure 2 on page 2. This input, when LOW, will select the ISD4004 device. INVERTING ANALOG INPUT (ANA IN-) This pin is the inverting analog input that transfers the signal to the device for recording in the differential-input mode. In this differential-input mode, a 16 mVp-p maximum input signal at ANA IN- should be capacitively coupled to this pin for optimal signal quality as shown in the ISD4004 Series ANA IN Modes, Figure 2. This capacitor value should be equal to the coupling capacitor used on the ANA IN+ pin. The input impedance at ANA IN- is nominally 56 KW. In the single-ended mode, ANA IN- should be capacitively coupled to VSSA through a capacitor equal to that used on the ANA IN+ input. AUDIO OUTPUT (AUD OUT) This pin provides the audio output to the user. It is capable of driving a 5 KW impedance. It is recommended that this pin be AC coupled. NOTE ISD The AUDOUT pin is always at 1.2 volts when the device is powered up. When in playback, the output buffer connected to this pin can drive a load as small as 5 KW. When in record, a resistor connects AUDOUT to the internal 1.2 volt analog ground supply. This resistor is approximately 850 KW, but will vary somewhat according to the sample rate of the device. This relatively high impedance allows this pin to be connected to an audio bus without loading it down. MASTER OUT SLAVE IN (MOSI) This is the serial input to the ISD4004 device. The master microcontroller places data on the MOSI line one half-cycle before the rising clock edge to be clocked in by the ISD4004 device. MASTER IN SLAVE OUT (MISO) This is the serial output of the ISD4004 device. This output goes into a high-impedance state if the device is not selected. SERIAL CLOCK (SCLK) This is the clock input to the ISD4004. It is generated by the master device (microcontroller) and is used to synchronize data transfers in and out of the device through the MISO and MOSI lines. Data is latched into the ISD4004 on the rising edge of SCLK and shifted out of the device on the falling edge of SCLK. INTERRUPT (INT) The ISD4004 interrupt pin goes LOW and stays LOW when an Overflow (OVF) or End of Message (EOM) marker is detected. This is an open drain output pin. Each operation that ends in an EOM or Overflow will generate an interrupt including the message cueing cycles. The interrupt will be cleared the next time an SPI cycle is initiated. The interrupt status can be read by an RINT instruction. Overflow Flag (OVF)--The Overflow flag indicates that the end of the ISD4004's analog memory has been reached during a record or playback operation. End of Message (EOM)--The End-of-Message flag is set only during playback operation when an EOM is found. There are eight EOM flag position options per row. 3 ISD4004 Series ROW ADDRESS CLOCK (RAC) This is an open drain output pin that provides a signal with a 200 ms period at the 8 KHz sampling frequency. (This represents a single row of memory and there are 2400 rows of memory in the ISD4004 series devices.) This signal stays HIGH for 175 ms and stays LOW for 25 ms when it reaches the end of a row. The RAC pin stays HIGH for 109.38 msec and stays LOW for 15.63 msec in Message Cueing mode (see page 5 for a more detailed description of Message Cueing). Refer to the AC Parameters table for RAC timing information on other sample rate products. When a record command is first initiated, the RAC pin remains HIGH for an extra TRACLO period. This is due to the need to load sample and hold circuits internal to the device. This pin can be used for message management techniques. EXTERNAL CLOCK INPUT (XCLK) The external clock input for the ISD4004 products has an internal pull-down device. These products are configured at the factory with an internal sampling clock frequency centered to 1 percent of specification. The frequency is then maintained to a variation over the entire commercial temperature and operating voltage ranges as defined by the minimum/maximum limits in the applicable AC Parameters table. The internal clock has a tolerance, over the extended temperature, industrial temperature and voltage ranges as defined by the minimum/maximum limits in the applicable AC Parameters table. A regulated power supply is recommended for industrial temperature range parts. If greater precision is required, the device can be clocked through the XCLK pin in Table 1. 4 Table 1: External Clock Input Clocking Table Part Number Sample Rate Required Clock ISD4004-08M 8.0 KHz 1024 KHz ISD4004-10M 6.4 KHz 819.2 KHz ISD4004-12M 5.3 KHz 682.7 KHz ISD4004-16M 4.0 KHz 512 KHz These recommended clock rates should not be varied because the antialiasing and smoothing filters are fixed. Thus, aliasing problems can occur if the sample rate differs from the one recommended. The duty cycle on the input clock is not critical, as the clock is immediately divided by two internally. If the XCLK is not used, this input should be connected to ground. AUTOMUTETM FEATURE (AM CAP) This pin is used in controlling the AutoMute feature. The AutoMute feature attenuates the signal when it drops below an internally set threshold. This helps to eliminate noise (with 6 dB of attenuation) when there is no signal (i.e., during periods of silence). A 1 mF capacitor to ground should be connected to the AM CAP pin. This capacitor becomes a part of an internal peak detector which senses the signal amplitude (peak). This peak level is compared to an internally set threshold to determine the AutoMute trip point. For large signals the AutoMute attenuation is set to 0 dB while 6 dB of attenuation occurs for silence. The 1 mF capacitor also affects the rate at which the AutoMute feature changes with the signal amplitude (or the attack time). The Automute feature can be disabled by connecting the AM CAP pin to VCCA. Voice Solutions in SiliconTM ISD4004 Series SERIAL PERIPHERAL INTERFACE (SPI) DESCRIPTION The ISD4004 series operates from an SPI serial interface. The SPI interface operates with the following protocol. The data transfer protocol assumes that the microcontroller's SPI shift registers are clocked on the falling edge of the SCLK. With the ISD4004, data is clocked in on the MOSI pin on the rising clock edge. Data is clocked out on the MISO pin on the falling clock edge. 1. All serial data transfers begin with the falling edge of SS pin. 2. SS is held LOW during all serial communications and held HIGH between instructions. 3. Data is clocked in on the rising clock edge and data is clocked out on the falling clock edge. read interrupt data and start a new operation within the same SPI cycle. 8. An operation begins with the RUN bit set and ends with the RUN bit reset. 9. All operations begin with the rising edge of SS. MESSAGE CUEING Message cueing allows the user to skip through messages, without knowing the actual physical location of the message. This operation is used during playback. In this mode, the messages are skipped 1600 times faster than in normal playback mode. It will stop when an EOM marker is reached. Then, the internal address counter will point to the next message. 4. Play and Record operations are initiated by enabling the device by asserting the SS pin LOW, shifting in an opcode and an address field to the ISD4004 device (refer to the Opcode Summary on the page 6). 5. The opcodes and address fields are as follows: <8 control bits> and <16 address bits>. 6. Each operation that ends in an EOM or Overflow will generate an interrupt, including the Message Cueing cycles. The Interrupt will be cleared the next time an SPI cycle is initiated. 7. As Interrupt data is shifted out of the ISD4004 MISO pin, control and address data is simultaneously being shifted into the MOSI pin. Care should be taken such that the data shifted in is compatible with current system operation. It is possible to ISD 5 ISD4004 Series Table 2:Opcode Summary Opcode <8 bits> Address <16 bits> Instruction Operational Summary POWERUP 00100XXX Power-Up: Device will be ready for an operation after TPUD. SETPLAY 11100XXX <A15-A0> Initiates Playback from address <A15-A0>. PLAY 11110XXX Playback from the current address (until EOM or OVF). SETREC 10100XXX <A15-A0> Initiates a Record operation from address <A15-A0>. REC 10110XXX Records from current address until OVF is reached. SETMC 11101XXX <A15-A0> Initiates Message Cueing (MC) from address <A15-A0>. 1 11111XXX Performs a Message Cue. Proceeds to the end of the current message (EOM) or enters OVF condition if no more messages are present. STOP 0X110XXX Stops current operation. STOPPWRDN 0X01XXXX Stops current Operation and enters stand-by (power-down) mode. RINT2 0X110XXX Read Interrupt status bits: Overflow and EOM. MC 1. Message Cueing can be selected only at the beginning of a play operation. 2. As the Interrupt data is shifted out of the ISD4004, control and address data is being shifted in. Care should be taken such that the data shifted in is compatible with current system operation. It is possible to read interrupt data and start a new operation at the same time. See Figure 5 through Figure 8 for Opcode format. POWER-UP SEQUENCE The ISD4004 will be ready for an operation after TPUD (25 ms approximately for 8 KHz sample rate). The user needs to wait TPUD before issuing an operational command. For example, to play from address 00 the following programing cycle should be used. Record Mode 1. Send POWERUP command. 2. Wait TPUD (power-up delay). 3. Send POWERUP command. 4. Send SETREC command with address 00. Playback Mode 1. Send POWERUP command. 2. Wait TPUD (power-up delay). 3. Send SETPLAY command with address 00. 4. Send PLAY command. 5. Send REC command. The device will start recording at address 00 and it will generate an interrupt when an overflow is reached (end of memory array). It will then stop recording. The device will start playback at address 00 and it will generate an interrupt when an EOM is reached. It will then stop playback. 6 Voice Solutions in SiliconTM ISD4004 Series SPI PORT The following diagram describes the SPI port and the control bits associated with it. Figure 3: SPI Port SPI CONTROL REGISTER The SPI control register provides control of individual device functions such as Play, Record, Message Cueing, Power-Up and Power-Down, Start and Stop operations, and Ignore Address pointers. Table 3: SPI Control Register Control Register Bit RUN Enable or Disable an operation = = 1 0 P/R 1 0 MC = = 1 0 Control Register Bit PU Start Stop Selects Play or Record operation = = ISD Device Function Master power control = = 1 0 IAB Play Record Device Function Power-Up Power-Down Ignore address control bit = = 1 0 Ignore input address register (A15-A0) Use the input address register contents for an operation (A15-A0) Enable or Disable Message Cueing P15-P0 Output of the row pointer register Enable Message Cueing Disable Message Cueing Input address register A15-A0 7 ISD4004 Series Figure 4: SPI Interface Simplified Block Diagram Table 4: Absolute Maximum Ratings (Packaged Parts)(1) Condition Table 5: Value Junction temperature 150C Storage temperature range -65C to +150C Voltage applied to any pin (VSS - 0.3 V) to (VCC + 0.3 V) Voltage applied to MOSI, SCLK, (VSS - 1.0 V) to INT, RAC and SS pins (input current 5.5V limited to 20mA Operating Conditions (Packaged Parts) Condition Commercial operating temperature range(1) 0C to +70C Extended operating temperature(1) -20C to +70C Industrial operating temperature(1) -40C to +85C Supply voltage (VCC)(2) )(3) Lead temperature (soldering - 10 seconds) 300C Ground voltage (VSS VCC - VSS -0.3 V to +7.0 V 1. Case temperature. 2. VCC = VCCA = VCCD. 3. VSS = VSSA = VSSD. 1. 8 Stresses above those listed may cause permanent damage to the device. Exposure to the absolute maximum ratings may affect device reliability. Functional operation is not implied at these conditions. Value +2.7 V to +3.3 V 0V Voice Solutions in SiliconTM ISD4004 Series Table 6: DC Parameters (Packaged Parts) Symbol Parameters Min(2) Typ(1) Max(2) Units VCC x 0.2 Conditions VIL Input Low Voltage V VIH Input High Voltage VOL Output Low Voltage 0.4 V IOL = 10 A VOL1 RAC, INT Output Low Voltage 0.4 V IOL = 1 mA VOH Output High Voltage V IOH = -10 A ICC VCC Current (Operating) -- Playback -- Record VCC x 0.8 V VCC - 0.4 15 25 30 40 mA mA 1 10 A 1 A 10 A ISB VCC Current (Standby) IIL Input Leakage Current IHZ MISO Tristate Current REXT Output Load Impedance 5 RANA IN+ ANA IN+ Input Resistance 2.2 3.0 3.8 KW RANA IN- ANA IN- Input Resistance 40 56 71 KW AARP ANA IN+ or ANA IN- to AUD OUT Gain 1 REXT = (3) REXT = (3) (3) (4) KW 25 dB (5) 1. Typical values: TA = 25C and 3.0 V. 2. All min/max limits are guaranteed by ISD via electrical testing or characterization. Not all specifications are 100 percent tested. 3. VCCA and VCCD connected together. 4. SS = VCCA = VCCD, XCLK = MOSI = VSSA= VSSD and all other pins floating. 5. Measured with AutoMute feature disabled. Table 7: AC Parameters (Packaged Parts) Symbol FS Characteristic Sampling Frequency Min(2) Typ(1) Max(2) Units Conditions ISD4004-08M ISD4004-10M ISD4004-12M ISD4004-16M 8.0 6.4 5.3 4.0 KHz KHz KHz KHz (5) (5) (5) (5) FCF Filter Pass Band ISD4004-08M ISD4004-10M ISD4004-12M ISD4004-16M 3.4 2.7 2.3 1.7 KHz KHz KHz KHz 3-dB Roll-Off Point(3) (7) 3-dB Roll-Off Point(3) (7) 3-dB Roll-Off Point(3) (7) 3-dB Roll-Off Point(3) (7) TREC Record Duration ISD4004-08M ISD4004-10M ISD4004-12M ISD4004-16M 8 10 12 16 min min min min (6) ISD (6) (6) (6) 9 ISD4004 Series Table 7: AC Parameters (Packaged Parts) Symbol TPLAY Characteristic Playback Duration Min(2) Typ(1) Max(2) Units ISD4004-08M ISD4004-10M ISD4004-12M ISD4004-16M 8 10 12 16 min min min min TPUD Power-Up Delay ISD4004-08M ISD4004-10M ISD4004-12M ISD4004-16M 25 31.25 37.5 50 msec msec msec msec TSTOP or TPAUSE Stop or Pause in Record or Play ISD4004-08M ISD4004-10M ISD4004-12M ISD4004-16M 50 62.5 75 100 msec msec msec msec TRAC RAC Clock Period ISD4004-08M ISD4004-10M ISD4004-12M ISD4004-16M 200 250 300 400 msec msec msec msec TRACLO RAC Clock Low Time ISD4004-08M ISD4004-10M ISD4004-12M ISD4004-16M 25 31.25 37.5 50 msec msec msec msec TRACM RAC Clock Period in Message Cueing Mode ISD4004-08M ISD4004-10M ISD4004-12M ISD4004-16M 125 156.3 187.5 250 sec sec sec sec TRACML RAC Clock Low Time in Message Cueing Mode ISD4004-08M ISD4004-10M ISD4004-12M ISD4004-16M 15.63 19.53 23.44 31.25 sec sec sec sec THD Total Harmonic Distortion VIN ANA IN Input Voltage 1 2 % 32 mV Conditions (6) (6) (6) (6) (10) (10) (10) (10) @ 1 KHz Peak-to-Peak(4) (8) (9) 1. 2. Typical values: TA = 25C and 3.0 V. All min/max limits are guaranteed by ISD via electrical testing or characterization. Not all specifications are 100 percent tested. 3. Low-frequency cut off depends upon the value of external capacitors (see Pin Descriptions). 4. Single-ended input mode. In the differential input mode, VIN maximum for ANA IN+ and ANA IN- is 16mVp-p. 5. Sampling Frequency can vary as much as 2.25 percent over the commercial temperature, and voltage ranges, and -6/+4 percent over the extended temperature, industrial temperature and voltage ranges. For greater stability, an external clock can be utilized (see Pin Descriptions). 6. Playback and Record Duration can vary as much as 2.25 percent over the commercial temperature and voltage ranges, and -6/+4 percent over the extended temperature, industrial temperature and voltage ranges. For greater stability, an external clock can be utilized (see Pin Descriptions). 7. Filter specification applies to the antialiasing filter and the smoothing filter. Therefore, from input to output, expect a 6dB drop by nature of passing through both filters. 8. The typical output voltage will be approximately 570mVp-p with VIN at 32mVp-p. 9. For optimal signal quality, this maximum limit is recommended. 10. When a record command is sent, TRAC = TRAC + TRACLO on the first row addressed. 10 Voice Solutions in SiliconTM ISD4004 Series Table 8: Absolute Maximum Ratings (Die)(1) Condition Value 150C Storage temperature range -65C to +150C Voltage applied to any pad (VSS - 0.3 V) to (VCC + 0.3 V) Voltage applied to MOSI, SCLK, INT, (VSS - 1.0 V) to RAC and SS pins (input current 5.5 V limited to 20mA VCC - VSS Operating Conditions (Die) Condition Junction temperature 1. Table 9: Value Commercial operating temperature range 0C to +50C Supply voltage (VCC)(1) +2.7 V to +3.3 V Ground voltage (VSS)(2) 0V 1. VCC = VCCA = VCCD 2. VSS = VSSA = VSSD. -0.3 V to +7.0 V Stresses above those listed may cause permanent damage to the device. Exposure to the absolute maximum ratings may affect device reliability. Functional operation is not implied at these conditions. Table 10: DC Parameters (Die) Symbol Parameters Min(2) Typ(1) Max(2) VCC x 0.2 Units Conditions VIL Input Low Voltage VIH Input High Voltage VOL Output Low Voltage 0.4 V IOL = 10 A VOL1 RAC, INT Output Low Voltage 0.4 V IOL = 1 mA VOH Output High Voltage V IOH = -10 A ICC VCC Current (Operating) -- Playback -- Record VCC x 0.8 V V VCC - 0.4 15 25 30 40 mA mA 1 10 A 1 A 10 A ISB VCC Current (Standby) IIL Input Leakage Current IHZ MISO Tristate Current REXT Output Load Impedance 5 RANA IN+ ANA IN+ Input Resistance 2.2 3.0 3.8 KW RANA IN- ANA IN- Input Resistance 40 56 71 KW AARP ANA IN+ or ANA IN- to AUDOUT Gain 1. 2. 1 REXT = (3) REXT = (3) (3) (4) KW 25 dB (5) 3. 4. Typical values: TA = 25C and 3.0 V. All min/max limits are guaranteed by ISD via electrical testing or characterization. Not all specifications are 100 percent tested. VCCA and VCCD connected together. SS = VCCA= VCCD, XCLK = MOSI = VSSA = VSSD and all other pins floating. 5. Measured with AutoMute feature disabled. ISD 11 ISD4004 Series Table 11: AC Parameters (Die) Symbol FS Characteristic Sampling Frequency Min(2) Typ(1) Max(2) Units Conditions ISD4004-08M ISD4004-10M ISD4004-12M ISD4004-16M 8.0 6.4 5.3 4.0 KHz KHz KHz KHz (5) (5) (5) (5) FCF Filter Pass Band ISD4004-08M ISD4004-10M ISD4004-12M ISD4004-16M 3.4 2.7 2.3 1.7 KHz KHz KHz KHz 3dB Roll-Off Point (3) (6) 3dB Roll-Off Point (3) (6) 3dB Roll-Off Point (3) (6) 3dB Roll-Off Point (3) (6) TREC Record Duration ISD4004-08M ISD4004-10M ISD4004-12M ISD4004-16M 8 10 12 16 min min min min (5) ISD4004-08M ISD4004-10M ISD4004-12M ISD4004-16M 8 10 12 16 min min min min (5) TPLAY Playback Duration TPUD Power-Up Delay ISD4004-08M ISD4004-10M ISD4004-12M ISD4004-16M 25 31.25 37.5 50 msec msec msec msec TSTOP or TPAUSE Stop or Pause in Record or Play ISD4004-08M ISD4004-10M ISD4004-12M ISD4004-16M 50 62.5 75 100 msec msec msec msec TRAC RAC Clock Period ISD4004-08M ISD4004-10M ISD4004-12M ISD4004-16M 200 250 300 400 msec msec msec msec TRACLO RAC Clock Low Time ISD4004-08M ISD4004-10M ISD4004-12M ISD4004-16M 25 31.25 37.5 50 msec msec msec msec TRACM RAC Clock Period in Message Cueing Mode ISD4004-08M ISD4004-10M ISD4004-12M ISD4004-16M 125 156.3 187.5 250 msec msec msec msec TRACML RAC Clock Low Time in Message Cueing Mode ISD4004-08M ISD4004-10M ISD4004-12M ISD4004-16M 15.63 19.53 23.44 31.25 msec msec msec msec 12 (5) (5) (5)) (5) (5) (5) (9) (9) (9) (9) Voice Solutions in SiliconTM ISD4004 Series Table 11: AC Parameters (Die) Symbol Min(2) Characteristic THD Total Harmonic Distortion VIN ANA IN Input Voltage Typ(1) 1 Max(2) Units 2 % 32 mV Conditions @ 1 KHz Peak-to-Peak(4) (7) (8) 1. Typical values: TA = 25C and 3.0 V. 2. All min/max limits are guaranteed by ISD via electrical testing or characterization. Not all specifications are 100 percent tested. 3. Low-frequency cut off depends upon the value of external capacitors (see Pin Descriptions). 4. Single-ended input mode. In the differential input mode, VIN maximum for ANA IN+ and ANA IN- is 16 mV peakto-peak. 5. Sampling Frequency and Duration can vary as much as 2.25 percent over the commercial temperature and voltage ranges. For greater stability, an external clock can be utilized (see Pin Descriptions). 6. Filter specification applies to the antialiasing filter and to the smoothing filter. 7. The typical output voltage will be approximately 570 mV peak-to-peak with VIN at 32 mV peak-to-peak. 8. For optimal signal quality, this maximum limit is recommended. 9. When a record command is sent, TRAC = TRAC + TRACLO on the first row addressed. Table 12: SPI AC Parameters1 Symbol Characteristics Min Max Units TSSS SS Setup Time 500 nsec TSSH SS Hold Time 500 nsec TDIS Data in Setup Time 200 nsec TDIH Data in Hold Time 200 nsec TPD Output Delay 500 nsec TDF(2) Output Delay to hiZ 500 nsec TSSmin SS HIGH TSCKhi 1 msec SCLK High Time 400 nsec TSCKlow SCLK Low Time 400 nsec F0 CLK Frequency 1,000 1. Typical values: TA= 25C and 3.0 V. Timing measured at 50 percent of the VCC level. 2. Tristate test condition. ISD Conditions KHz 13 ISD4004 Series TIMING DIAGRAMS Figure 5: Timing Diagram Figure 6: 8-Bit Command Format 14 Voice Solutions in SiliconTM ISD4004 Series Figure 7: 24-Bit Command Format SS BYTE 1 BYTE 2 BYTE 3 SCLK MOSI MISO A0 OVF A1 EOM A2 P0 A3 P1 A4 A5 P2 P3 A6 P4 A7 P5 A8 P6 A9 P7 A10 P8 A11 P9 A12 P10 A13 P11 A14 P12 A15 P13 X X X P14 P15 P16 C0 C1 C2 C3 C4 X X X X X Figure 8: Playback/Record and Stop Cycle ISD 15 ISD4004 Series Figure 9: Application Example Using SPI(1) 1. This application example is for illustration purposes only. ISD makes no representation or warranty that such application will be suitable for production. 2. Please make sure the bypass capacitor, C2 is as close as possible to the package. 16 Voice Solutions in SiliconTM ISD4004 Series Figure 10: Application Example Using Microwire(1) 1. This application example is for illustration purposes only. ISD makes no representation or warranty that such application will be suitable for production. 2. Please make sure the bypass capacitor, C2 is as close as possible to the package. Figure 11: Application Example Using SPI Port on Microcontroller(1) 1. This application example is for illustration purposes only. ISD makes no representation or warranty that such application will be suitable for production. 2. Please make sure the bypass capacitor, C2 is as close as possible to the package. ISD 17 ISD4004 Series DEVICE PHYSICAL DIMENSIONS Figure 12: 28-Lead 8x13.4 mm Plastic Thin Small Outline Package (TSOP) Type I (E) Table 13: Plastic Thin Small Outline Package (TSOP) Type I (E) Dimensions INCHES Min Nom Max Min Nom Max A 0.520 0.528 0.535 13.20 13.40 13.60 B 0.461 0.465 0.469 11.70 11.80 11.90 C 0.311 0.315 0.319 7.90 8.00 8.10 D 0.002 0.006 0.05 E 0.007 0.011 0.17 F 0.009 0.0217 0.15 0.22 0.27 0.55 G 0.037 0.039 0.041 0.95 1.00 1.05 H 0 3 6 0 3 6 I 0.020 0.022 0.028 0.50 0.55 0.70 J 0.004 0.008 0.10 NOTE: 18 MILLIMETERS 0.21 Lead coplanarity to be within 0.004 inches. Voice Solutions in SiliconTM ISD4004 Series Figure 13: 28-Lead 0.600-Inch Plastic Dual Inline Package (PDIP) (P) Table 14: Plastic Dual Inline Package (PDIP) (P) Dimensions INCHES A Min Nom Max Min Nom Max 1.445 1.450 1.455 36.70 36.83 36.96 B1 0.150 B2 0.065 C1 0.600 C2 0.530 0.070 0.540 D 3.81 0.075 1.65 0.625 15.24 0.550 13.46 1.78 D1 0.015 E 0.125 F 0.015 G 0.055 1.91 15.88 13.72 0.19 H ISD MILLIMETERS 13.97 4.83 0.38 0.135 3.18 0.018 0.022 0.38 0.46 0.56 0.060 0.065 1.40 1.52 1.65 0.100 3.43 2.54 J 0.008 0.010 0.012 0.20 0.25 0.30 S 0.070 0.075 0.080 1.78 1.91 2.03 q 0 15 0 15 19 ISD4004 Series Figure 14: 28-Lead 0.300-Inch Plastic Small Outline Integrated Circuit (SOIC) (S) Table 15: Plastic Small Outline Integrated Circuit (SOIC) (S) Dimensions INCHES Min Nom Max Min Nom Max A 0.701 0.706 0.711 17.81 17.93 18.06 B 0.097 0.101 0.104 2.46 2.56 2.64 C 0.292 0.296 0.299 7.42 7.52 7.59 D 0.005 0.009 0.0115 0.127 0.22 0.29 E 0.014 0.016 0.019 0.35 0.41 0.48 F 0.050 1.27 G 0.400 0.406 0.410 10.16 10.31 10.41 H 0.024 0.032 0.040 0.61 0.81 1.02 NOTE: 20 MILLIMETERS Lead coplanarity to be within 0.004 inches. Voice Solutions in SiliconTM ISD4004 Series Figure 15: ISD4004 Series Bonding Physical Layout1 (Unpackaged Die) MOSI SCLK VCCD2 INT ISD4004 Series VSSD2 I. II. Die Dimensions X: 4230 microns Y: 9780 microns MISO SS VCCD1 XCLK RAC VSSA VSSD1 Die Thickness(3) 11.5 0.5 mils III. Pad Opening (min) 90 x 90 microns 3.5 x 3.5 mils ISD4004 VSSA(2) VSSA AUD OUT AM CAP ANA IN- VCCA(2) ANA IN+ 1. The backside of die is internally connected to VSS. It MUST NOT be connected to any other potential or damage may occur. 2. Double bond recommended. 3. This figure reflects the current die thickness. Please contact ISD as this thickness may change in the future. ISD 21 ISD4004 Series Table 16: ISD4004 Series Device Pin/Pad Designations, with Respect to Die Center (m) Pin Pin Name X Axis Y Axis VSSA VSS Analog Power Supply -1898.1 -4622.4 VSSA VSS Analog Power Supply -1599.9 -4622.4 AUD OUT Audio Output 281.9 -4622.4 AM CAP AutoMute 577.3 -4622.4 ANA IN - Inverting Analog Input 1449.4 -4622.4 ANA IN + Noninverting Analog Input 1603.5 -4622.4 VCCA(1) VCC Analog Power Supply 1898.7 -4622.4 VSSA VSS Analog Power Supply 1885.2 -4622.4 RAC Row Address Clock 1483.8 4623.7 INT Interrupt 794.8 4623.7 XCLK External Clock Input 564.8 4623.7 VCCD2 VCC Digital Power Supply 387.9 4623.7 VCCD1 VCC Digital Power Supply 169.5 4623.7 SCLK Slave Clock -14.7 4623.7 SS Slave Select -198.1 4623.7 MOSI Master Out Slave In -1063.7 4623.7 MISO Master In Slave Out -1325.6 4623.7 VSSD1 VSS Digital Power Supply -1655.3 4623.7 VSSD2 VSS Digital Power Supply -1836.9 4623.7 1. 22 Double bond recommended. Voice Solutions in SiliconTM ISD4004 Series ORDERING INFORMATION Product Number Descriptor Key ISD4004- _ _ _ _ _ Special Temperature Field: Blank= Commercial Packaged (0C to +70C) or Commercial Die (0C to +50C) D = Extended (-20C to +70C) I = Industrial (-40C to +85C) Product Family ISD4000 Family Product Series 04 = Fourth Series (8-16 min) Package Type: E = 28-Lead 8x13.4mm Plastic Thin Small Outline Package (TSOP) Type 1 P = 28-Lead 0.600-Inch Plastic Dual Inline Package (PDIP) Duration: 08M=8 minutes 10M=10 minutes 12M=12 minutes 16M=16 minutes S = X = 28-Lead 0.300-Inch Plastic Small Outline Package (SOIC) Die When ordering ISD4004 series devices, please refer to the following valid part numbers. Part Number Part Number Part Number Part Number ISD4004-08ME ISD4004-10ME ISD4004-12ME ISD4004-16ME ISD4004-08MED ISD4004-10MED ISD4004-12MED ISD4004-16MED ISD4004-08MEI ISD4004-10MEI ISD4004-12MEI ISD4004-16MEI ISD4004-08MP ISD4004-10MP ISD4004-12MP ISD4004-16MP ISD4004-08MS ISD4004-10MS ISD4004-12MS ISD4004-16MS ISD4004-08MSI ISD4004-10MSI ISD4004-12MSI ISD4004-16MSI ISD4004-08MX ISD4004-10MX ISD4004-12MX ISD4004-16MX For the latest product information, access ISD's worldwide website at http://www.isd.com. ISD 23 IMPORTANT NOTICES The warranty for each product of ISD (Information Storage Devices, Inc.), is contained in a written warranty which governs sale and use of such product. Such warranty is contained in the printed terms and conditions under which such product is sold, or in a separate written warranty supplied with the product. Please refer to such written warranty with respect to its applicability to certain applications of such product. These products may be subject to restrictions on use. Please contact ISD, for a list of the current additional restrictions on these products. By purchasing these products, the purchaser of these products agrees to comply with such use restrictions. Please contact ISD for clarification of any restrictions described herein. ISD, reserves the right, without further notice, to change the ISD ChipCorder product specifications and/or information in this document and to improve reliability, functions and design. ISD assumes no responsibility or liability for any use of the ISD ChipCorder products. ISD conveys no license or title, either expressed or implied, under any patent, copyright, or mask work right to the ISD ChipCorder products, and ISD makes no warranties or representations that the ISD ChipCorder products are free from patent, copyright, or mask work right infringement, unless otherwise specified. The 100-year retention and 100K record cycle projections are based upon accelerated reliability tests, as published in the ISD Reliability Report, and are neither warranted nor guaranteed by ISD. Information contained in this ISD ChipCorder data sheet supersedes all data for the ISD ChipCorder products published by ISD prior to September, 1998. This data sheet and any future addendum to this data sheet is (are) the complete and controlling ISD ChipCorder product specifications. In the event any inconsistencies exist between the information in this and other product documentation, or in the event that other product documentation contains information in addition to the information in this, the information contained herein supersedes and governs such other information in its entirety. Copyright(c) 1998, ISD (Information Storage Devices, Inc.) All rights reserved. ISD is a registered trademark of ISD. ChipCorder is a trademark of ISD. All other trademarks are properties of their respective owners. Application examples and alternative uses of any integrated circuit contained in this publication are for illustration purposes only and ISD makes no representation or warranty that such applications shall be suitable for the use specified. 2727 North First Street San Jose, California 95134 Tel: 408/943-6666 Fax: 408/544-1787 Part No. 2200998D4004