ISD4004-08MP - Nuvoton Technology

ISD/Winbond · 2727 North First Street, San Jose, CA 95134 · TEL: 408/943-6666 · FA X: 408/544-1787 · http://www.isd.com

August 2000

Figure: ISD4004 Series Block Diagram

GENERAL DESCRIPTION

The ISD4004 ChipCorder® Products provide high-

quality, 3-volt, single-chip record/playback solu-

tions for 8- to 16-minute messaging applications

which are ideal fo r cellul ar phone s an d other por -

table products. The CMOS-based devices include

an on-chip oscillator, antialiasing filter, smoothing

filter, AutoMute™ feature, audio amplifier, and

high density, multilevel Flash storage array. The

ISD4004 series is designed to be used in a micro-

processor- or microcontroller-based system. Ad-

dress and control are accomplished through a

Serial Peripheral Interface (SPI) or Microwire Serial

Interface to minimize pin count.

Recordings are stored in on-chip nonvolatile

memory cells, providing zero-power message

storage. This unique, single-chip solution is made

possible through ISD’s patented multilevel storage

technology. Voice and audio signals are stored

directly into memory in their natural form, providing

high -q u a l it y, so l id-state voic e re produc ti on.

ISD4004 Series

Single-Chip Voice Record/Playback Devices

8-, 10-, 12-, and 16-Minute Durations

ISD4004 Series

ii Voice Solutions in Silicon™

Table: ISD4004 Series Summary

Part

Number

Duration

(minutes)

Input Sample

Rate (KHz)

Typical Filter Pass

Band (KHz)

ISD4004-08M 8.0 8.0 3.4

ISD4004-10M 10.0 6.4 2.7

ISD4004-12M 12.0 5.3 2.3

ISD4004-16M 16.0 4.0 1.7

FEATURES

•Single-chip voice record/playbac k solution

•Single +3 volt supply

•Low-power consump tion

–Operating current:

ICC Play = 15 mA (typical)

ICC Rec = 25 mA (typical)

–Standby curre n t: 1 µA (ty pi cal)

•Single -ch i p dur ati o ns o f 8, 10, 12, and

16 minutes

•High-quality , natural voice/audio reproduction

•AutoMute feature pr o vid es background noise

attenua tion during p eriods of silence

•No algorithm development required

•Microcontroller SPI or Microwire™ Serial

Interface

•Fully ad d ressable to handle mult ip le

messages

•Nonvolatile message storage

•Power consumption co ntrolled by SPI

or Microwire control register

•100-year message retention (typical)

•100K record cycles (typical)

•On-chip clock source

•Available in die form, PDIP, SOIC, and TSOP

•Extend ed te mperat ure (–20 °C to +7 0°C) an d

industrial temperature (–40°C to +85°C)

versions availa ble

Table of Contents

ISD iii

DETAILED DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Speech/Sound Quality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Duration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Flash Stor age . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Microcontrol ler Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

PIN DESCRIPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Voltage Inputs (VCCA, VCCD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Ground Inputs (VSSA, VSSD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Non-Inverting Analog Input (ANA IN+) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Inverting Analo g Input ( A NA IN–) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Audio Output (AUD OUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Slav e Select (SS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Master Out Slave In (MOSI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Master In Slave Out (MISO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Serial Clock (SCLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Interrupt (IN T) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Row Address Clock (R AC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

External Cl ock Input (XCLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

AutoMute™ Fe ature (AM CAP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

SERIAL PERIPHERAL INTERFACE (SPI) DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Message Cueing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Power-U p Seque nce . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

SPI Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

SPI Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

TIMING DIAGRAMS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

DEVICE PHYSICAL DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

ISD4004 Series

iv Voice Solutions in Silicon™

FIGURES, CHARTS, AND TABLES IN THE ISD4004 SERIES DATA SHEET

Figure 1: ISD4004 Series TSOP and PDIP/SOIC Pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Figure 2: ISD4004 Series ANA IN Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Figure 3: SPI Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Figure 4: SPI Interface Simplified Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 5: Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 6: 8-Bit Command Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 7: 24-Bit Command Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 8: Playback/Recor d and Stop Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 9: Appl ication Example Using SPI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 10: Application Example Using Mic rowire . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 11: Application Example Using SPI Por t on Microcontroller . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 12: 28-Lead 8x13.4 mm Plastic Thin Small Outline Package (TSOP ) Type I (E) . . . . . . . . 18

Figure 13: 28-Lead 0.600- Inch Plastic Dual Inline Pa ckage (PDIP) (P) . . . . . . . . . . . . . . . . . . . . 19

Figure 14: 28-Lead 0.300- Inch Plastic Small Outl ine Integrated Cir cuit (SOIC) (S) . . . . . . . . . . . 20

Figure 15: ISD4004 Series Bonding Physical Layout (Unpackaged Die) . . . . . . . . . . . . . . . . . . . 21

Table 1: External Cl ock Input Clocking Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Table 2: Opcode Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 3: SPI Contro l Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 4: Absolute Maximum Ratin gs (Packaged Parts) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 5: Operating Conditions (Package d Parts) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 6: DC Parameters (Package d Parts) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 7: AC Parameters (Packaged Parts) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 8: Absolute Maximum Ratings (Die) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 9: Operating Conditi ons (Die) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 10: DC Parameters ( Die) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Table 11: AC Parameters (Di e) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Table 12: SPI AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 13: Plastic Thin Small Outli ne Package (TSOP) Type I (E) Dimensions . . . . . . . . . . . . . . . . 18

Table 14: Plastic Dual Inline Package (P DIP) (P ) Dime nsions . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Table 15: Plastic Small Outline Integrated Circuit (SOIC) (S) Dimensions . . . . . . . . . . . . . . . . . . 20

Table 16: ISD4004 Seri e s Devic e Pin/Pad Designatio ns , wit h Respec t to Die Ce nt e r (µm) . . . . 22

ISD4004 Series

ISD

DETAILED DESCRIPTION

SPEECH/SOUND QUALITY

The ISD4004 ChipCorder series includes devices

offered at 4.0, 5.3, 6.4, and 8.0 KHz sampling fre-

quencies, allowing the user a choice of speech

quality options. Increasing the duration within a

product series decreases the sampling frequency

and bandwidth, which affects sound quality.

Please re fer to the ISD4004 Ser ies Pro duc t Summary

table on the second page to compare filter pass

band and product durations.

The spee ch samples are stored directly i nto on-ch ip

nonvolatile memory without the digitization and

compression associated with other solutions. Di-

rect analog storage provides a natural sounding

reproduction of voice, music, tones, and sound

effects not available with most solid-state solu-

tions.

DURATION

To meet end system requirements, the ISD4004 se-

r i es products are single-chip solutions at 8, 10, 12,

16 minutes.

FLASH STORAGE

One of the benefits of ISD’s ChipCorder technology

is the use of on-chip nonvolatile memory, which pro-

vides zer o- power message storage. Th e message

is retained for up to 100 years (typically) without

power. In addition, the device can be re-record-

ed (typically) over 100,000 times.

MICROCONTROLLER INTERFACE

A four-wire (SCLK, MOSI, MISO, SS) SPI interface is

provided for ISD4004 control and addressing

functions. The ISD4004 is configured to operate as

a peripheral slave device, with a microcontroller-

based SPI bus interface. Read/Write access to all

the internal registers occurs through this SPI inter-

face. An interrupt signal (INT) and internal read-

only Status Register are provided for handshake

purposes.

PROGRAMMING

The ISD4004 series is also ideal for playback-only

applications, where single or multiple message

Playback is controlled through the SPI port. Once

the desired message configuration is created, du-

plicates can easily be generated via an ISD pro-

grammer.

PIN DESCRIPTIONS

VOLTAGE INPUTS (VCCA, VCCD)

To minimize noise, the analog and digital circuits

in the ISD4004 devices use separate power busses.

These +3 V busses are brought out to separate

pins and should be tied together as close to the

supply as possible. In addition, these supplies

should be decoupled as close to the package as

possible.

GROUND INPUTS (VSSA, VSSD)

The ISD4004 series utilizes separate analog and

digital ground busses. The analog ground (VSSA)

pins should be tied together as close to the pack-

age as possible and connected through a low-

impedance path to power supply ground. The

digital ground (VSSD) pin should be connected

throug h a sep ara te low -imp edanc e path t o p ow-

er supply ground. These ground paths should be

large e nough to ens ure that th e impedance b e-

tween the VSSA pins and the VSSD pin is less than

3W. The backside of the die is connected to VSS

through the substrate resistance. In a chip-on-

board design, the die attach area must be con-

nected to VSS or left floating.

ISD4004 Series

2Voice Solutions in Silicon™

Figure 2: ISD4004 Series ANA IN Modes

Figure 1: ISD4004 Series TSOP and PDIP/SOIC Pinouts

28-PIN TSOP

ISD4004

PDIP/SOIC

ISD4004

ISD4004 Series

ISD

NON-INVERTING ANALOG INPUT (ANA IN+)

This pin is the non-invert ing analog input that trans-

fers the signal to the device for recording. The an-

alog input amplifier can be driven single ended or

differentially. In the single-ended input mode, a

32 mVp-p (peak-to-peak) maximum signal shou ld

be capa citi vely c onn ected to th is p in f or opt imal

signal quality. This capacitor value, together with

the 3 KW i nput impedance of A NA IN+, is selected

to give cutoff at the low frequency end of the

voice passband. In the differential-input mode,

the maximum input signal at ANA IN+ should be

16 mVp-p for optimal signal quality. The circuit

connect ions for the two modes a re shown in Fig-

ure 2 on pa g e 2.

INVERTING ANALOG INPUT (ANA IN–)

This pin is the inverting analog input that transfers

the signal to the device for recording in the differ-

ential-input mode. In this differential-input mode,

a 16 mVp-p maximum input signal at ANA IN–

should be capacitively coupled to this pin for op-

timal signal quality as shown in the ISD4004 Series

ANA IN Modes, Figure 2. This capacitor value

should be equal to the coupling capacitor used

on the ANA IN+ pin. The input impedance at ANA IN–

is nominally 56 KW. In the single-ended mode, ANA

IN– should be capacitively coupled to VSSA

through a capacitor equal to that used on the

ANA IN+ input.

AUDIO OUTPUT (AUD OUT)

This pin provides the audio output to the user.

It is capable of driving a 5 KW impedance. It is

recommended th a t this pin be AC cou p l ed .

NOTE The AUDOUT pin is always at 1.2 volts when

the device is powered up. When in play-

back, the output buffer connected to this

pin can drive a load as small as 5 KW.

When in record, a resistor connects AUD-

OUT to the internal 1.2 volt analog ground

supply. This resistor is approximately

850 KW, but will vary somewhat according

to the sample rate of the device. This rel-

atively high impedance allows this pin to

be connected to an audio bus without

loading it down.

SLAVE SELECT (SS)

This input, when LOW, will select the ISD4004

device.

MASTER OUT SLAVE IN (MOSI)

This is the serial input to the ISD4004 device. The

master microcontroller places data on the MOSI

line one half-cycle before the rising clock edge to

be clocked in by th e ISD40 04 de vic e.

MASTER IN SLAVE OUT (MISO)

This i s the seri al ou tput of th e IS D4004 d evi ce. T his

output goes into a high-impedance state if the

devi ce is not selected.

SERIAL CLOCK (SCLK)

This is the clock input to the ISD4004. It is generat-

ed by the master device (microcontroller) and is

used to synchronize data transfers in and out of

the devi ce through the MISO an d MOSI lines. Dat a

is latched into the ISD4004 on the rising edge of

SCLK and shifted out of the device on the falling

edge of SCLK.

INTERRUPT (INT)

The ISD4004 interrupt pin goes LOW and stays LOW

when an Overflow (OVF) or End of Message (EOM)

marker is detected. This is an open drain output

pin. Ea ch operati on th at en ds in a n E OM or Over-

flow will generate an interrupt including the mes-

sage cueing cycles. The interrupt will be cleared

the next time an SPI cycle is initiated. The interrupt

status can be read by an RINT instruction.

Overflow Flag (OVF)—The Overflow flag indi-

cates t hat the end of the IS D4004 ’s ana log mem-

ory has been reached during a record or

playbac k op er ati on.

End of Message (EOM)—The End-of-Message

flag is set only during playback operation when an

EOM is found. There are eight EOM flag position

options per row.

ISD4004 Series

4Voice Solutions in Silicon™

ROW ADDRESS CLOCK (RAC)

This is an open drain out put pin t hat pro vides a sig-

nal with a 200 ms period at the 8 KHz sampling fr e-

quency. (This represents a single row of memory

and there are 2400 rows of memory in the ISD4004

series devices.) This signal stays HIGH for 175 ms

and stays LOW for 25 ms when it reaches the end

of a row.

The RAC pin stays HIGH for 109.38 msec and stays

LOW for 15.63 msec in Message Cueing mode

(see page 5 for a more detailed description of

Message Cueing). Refer to the AC Parameters ta-

ble for RAC timing information on other sample

rate products.

When a record command is first initiated, the RAC

pin remai ns HIGH for an extr a TRACLO peri od. This is

due to the nee d to load sample and ho ld circu its

internal to the device. This pin can be used for

message man agement tech niques .

EXTERNAL CLOCK INPUT (XCLK)

The exte rnal clock input for the ISD4004 prod ucts

has an internal pull-down device. These products

are configured at the factory with an internal sam-

pling cloc k freque ncy cent ered to ±1 percent of

specification. The frequency is then maintained to

a vari ation over the entire com mercial tem pera-

ture and operating voltage ranges as defined by

the minimum/maximum limits in the applicable

AC Parameters table. The internal clock has a tol-

erance, over the extended temperature, industrial

t em pe ra t ur e and volta ge ranges as defined by the

minimum/maximum limits in the applicable AC

Parameters table. A regulated power supply is

recommended for industrial temperature range

parts. If greater precision is required, the device

can be clocke d through the XCLK pin in Table 1.

These recommended clock rates should not be

varied because the antialiasing and smoothing filters

are fixed. Thus, aliasing problems can occur if the

sampl e rat e di ff ers fr om t he on e re comm e nded .

The duty cycle on th e i nput clo ck i s not critical , as

the clock is immediatel y divided by two inte rn al l y.

If the XCLK is not used, this input should be

connected to ground.

AUTOMUTE™ FEATURE (AM CAP)

This pin is used in controlling the AutoMute feature.

The AutoMute feature attenuates the signal when

it drops below an internal ly set threshold. This helps

to eliminate noise ( with 6 dB of attenuation) when

there is no signal (i.e., during periods of silence). A

1 mF capacitor to ground should be connected to

the AM C AP pin. Thi s capacitor b ecomes a pa rt of

an internal peak detector which senses the signal

amplitude (peak). This peak level is compared to

an internally set threshold to determine the Auto-

Mute tr ip p oin t. F or la rge si gna ls the Aut oMu te a t-

tenuation is set to 0 dB while 6 dB of attenuation

occurs for silence. The 1 mF capacitor als o affe cts

the rate at which the AutoMute feature changes

with the signal amplitude (or the attack time). The

Automute feature can be disabled by connecting

the AM CAP pin to VCCA.

Table 1: External Clock Input Clocking

Table

Part Number Sample Rate Required Clock

ISD4004-08M 8.0 KHz 1024 KHz

ISD4004-10M 6.4 KHz 819.2 KHz

ISD4004-12M 5.3 KHz 682.7 KHz

ISD4004-16M 4.0 KHz 512 KHz

ISD4004 Series

ISD

SERIAL PERIPHERAL INTERFACE (SPI) DESCRIPTION

The ISD4004 series operates from an SPI serial inte r-

face. The SPI interface operates with the following

protocol.

The data transfer protocol assumes that the mi-

crocontroller’s SPI shift registers are clocked on the

falling edge of the SCLK. With the ISD4004, data is

clocked in on the MOSI pin on the rising clock

edge. Data is clocked out on the MISO pin on the

fall i ng cl ock edg e.

1. All seria l data transfers begin with th e falling

edge of SS pin.

2. SS is held LOW during all serial communica-

tions and held HIGH between instructions.

3. Data is clocked in on the risi ng clock edg e

and data is clocked out on the falling clock

edge.

4. Play and Re cord operati ons are initiated by

enablin g the device by as ser ting th e SS pin

LOW, shifting in an opco de and an address

field to the ISD4004 device (refer to the Op-

code Summary on the page 6).

5. The opcodes and address fields are as fol-

lows: <8 control bits> and <16 address

bits>.

6. Each operation that ends in an EOM or

Overfl ow will ge nerate an interrupt, includ-

ing the Message Cueing cycles. The Inter-

rupt will be cleared the next time an SPI

cycle is initiated.

7. As Interrupt data is shifted out of the

ISD4004 MISO pin, control and address

data is simultaneously being shifted into

the MOSI pin. Care should be taken such

that the data shifted in is compatible with

current system operation. It is possible to

read interrupt data and start a new opera-

tion within the same SPI cycle.

8. An operation begins with the RUN bit set

and ends with the RUN bit reset.

9. All operations begin with the rising edge

of SS.

MESSAGE CUEING

Message cueing allows the user to skip through

messages, without knowing the ac tual physical lo-

cation of the message. This operation is used dur-

ing playback. In this mode, the messages are

skipped 1600 times faster than in normal play-

back mode. It will stop when an EOM marker is

reached. Then, the internal address counter will

point to the next message.

ISD4004 Series

6Voice Solutions in Silicon™

1. Message Cueing can be selected only at the

beginning of a play operation. 2. As the Interrupt data is shifted out of the ISD4004,

control and address data is being shifted in. Care

should be taken such that the data shifted in is

compatible with current system operation. It is

possible to read interrupt data and start a new

operation at the same time. See Figure 5 through

Figure 8 for Opcode format.

POWER-UP SEQUENCE

The ISD4004 will be ready for an operation after

TPUD (25 ms approximately for 8 KHz sample rate).

The user needs to wait TPUD before issuing an opera-

tional command. For example, to play from ad-

dress 00 the following programing cycle should be

used.

Playback Mode

1. Send POWERUP comman d.

2. Wait TPUD (power-up delay).

3. Send SETPLAY co mma nd with address 00.

4. Send PLAY command.

The devi ce w ill star t playback at address 00 a nd it

will generate an interrupt when an EOM is

reached. It will then stop playback.

Record Mode

1. Send POWERUP command.

2. Wait TPUD (power-up delay).

3. Send POWERUP command.

4. Send SETREC command wi th address 00.

5. Send REC command.

The device will start recor ding at address 00 and it

will generate an interrupt when an overflow is

reached (end of memory array). It will then stop re-

cording.

Table 2:Opcode Summary

Instruction Opcode <8 bits>

Address <16 bits> Operational Summary

POWERUP 00100XXX Power-Up: De vice will be ready for an operatio n after TPUD.

SETPLAY 11100XXX <A15–A0> Initiates Playback from address <A15–A0>.

PLAY 11110XXX Playback from the cu rrent ad dress (until EOM or OVF).

SETREC 10100XXX <A15–A0> Initiates a Record operation from address <A15–A0>.

REC 10110XXX Records from current address until OVF is reached.

SETMC 11101XXX <A15–A0> Initiates Message Cueing (MC) from address <A15–A0>.

MC111111XXX Performs a Message Cue. Proceeds to the end of the current

message (EOM) or enters OVF condition if no more messages are

present.

STOP 0X110XXX Stops current operation.

STOPPWRDN 0X01XXXX Stops current Operation and enters stand-by (power-down) mode.

RINT20X110XXX Read Interrupt status bits: Overflow and EOM.

ISD4004 Series

ISD

SPI PORT

The following diagram describes the SPI port and the control bits associated with it.

Figure 3: SPI Port

SPI CONTROL REGISTER

The SPI control register provides control of individual device functions such as Play, Record, Message

Cueing, Power-Up and Power-Down, Start and Stop operations, and Ignore Address pointers.

Table 3: SPI Control Register

Control

RUN Enable or Disabl e an operation PU Master power control

0Start

Stop =

0Power-Up

Power-Down

P/R Selects Play or Reco rd operation IAB Ignore address control bit

0Play

Record =

0Ignore input address register (A15–A0)

Use the input address register contents

for an operation (A15–A0)

MC Enable or Disable Message Cueing P15–P0 Output of the row pointer register

0Enable Message Cueing

Disable Message Cueing A15–A0 In put ad dr e ss regi s ter

ISD4004 Series

8Voice Solutions in Silicon™

1. Stresses above those listed may cause permanent

damage to the device. Exposure to the absolute

maximum ratings may affect device reliability.

Functional operation is not implied at these

conditions.

1. Case temperature.

2. VCC = VCCA = VCCD.

3. VSS = VSSA = VSSD.

Table 4: Absolute Maximum Ratings

(Packaged Parts)(1)

Condition Value

Junction temperature 150°C

Storage temperature range –65°C to +150°C

Voltag e app lie d to any pi n (VSS – 0.3 V) to

(VCC + 0.3 V)

Volt age app lie d to MOS I, SCLK,

INT, RAC and SS pins (input cu rrent

limited to ± 20mA

(VSS – 1.0 V) to

5.5V

Lead temperature

(soldering – 10 seconds) 300°C

VCC – VSS –0.3 V to +7.0 V

Table 5: Operating Conditions

(Packaged Parts)

Condition Value

Commercial opera ting

temperature range(1) 0°C to +70°C

Extended operating

temperature(1) –20°C to +70°C

Industri al oper atin g

temperature(1) –40°C to +85°C

Supply vo ltage (VCC)(2) +2.7 V to +3.3 V

Ground voltage (VSS)(3) 0 V

Figure 4: SPI Interface Simplified Block Diagram

ISD4004 Series

ISD

1. Typical values: TA = 25°C and 3.0 V.

2. All min/max limits are guaranteed by ISD via electrical testing or characterization. Not all specifications are

100 percent tested.

3. VCCA and VCCD connected together.

4. SS = VCCA = VCCD, XCLK = MOSI = VSSA= VSSD and all other pins floating.

5. Measured with AutoMute feature disabled.

Table 6: DC Parameters (Packaged Parts)

Symbol Parameters Min(2) Typ(1) Max(2) Units Conditions

VIL Input Low Voltage VCC x0.2 V

VIH Input High Voltage VCC x0.8 V

VOL Output Low Voltage 0.4 V IOL = 10 µA

VOL1 RAC, I NT Output Low Voltage 0.4 V IOL = 1 mA

VOH Output High Voltage VCC –0.4 V I

OH = –10 µA

ICC VCC Current (Operating)

— Playback

— Record 15

25 30

40 mA

mA REXT = ¥(3)

REXT = ¥ (3)

ISB VCC Current (Standby) 1 10 µA (3) (4)

IIL Input Leakage C urrent ±1 µ A

IHZ MISO Tristate Current 1 10 µA

REXT Output Load Impedance 5 KW

RANA IN+ ANA IN+ Input Resistance 2.2 3.0 3.8 KW

RANA IN– ANA IN– Input Resistance 40 56 71 KW

AARP ANA IN+ or ANA IN– to AUD OUT Gain 25 dB (5)

Table 7: AC Parameters (Packaged Parts)

Symbol Characteristic Min(2) Typ(1) Max(2) Units Conditions

FSSampling

Frequency ISD4004-08M

ISD4004-10M

ISD4004-12M

ISD4004-16M

8.0

6.4

5.3

4.0

KHz

(5)

FCF Filter Pass Band ISD4004-08M

ISD4004-10M

ISD4004-12M

ISD4004-16M

3.4

2.7

2.3

1.7

KHz

3-dB Roll-Off Point(3) (7)

TREC Record Duration ISD4004-08M

ISD4004-10M

ISD4004-12M

ISD4004-16M

min

(6)

ISD4004 Series

10 Voice Solutions in Silicon™

1. Typical values: TA = 25°C and 3.0 V.

2. All min/max limits are guaranteed by ISD via electrical testing or characterization. Not all specifications are 100 percent

tested.

3. Low-frequency cut off depends upon the value of external capacitors (see Pin Descriptions).

4. Single-ended input mode. In the differential input mode, VIN maximum for ANA IN+ and ANA IN– is 16mVp-p.

5. Sampling Frequency can vary as much as ±2.25 percent over the commercial temperature, and voltage ranges,

and –6/+4 percent over the extended temperature, industrial temperature and voltage ranges. For greater

stability, an external clock can be utilized (see Pin Descriptions).

6. Playback and Record Duration can vary as much as ±2.25 percent over the commercial temperature and voltage

ranges, and –6/+4 percent over the extended temperature, industrial temperature and voltage ranges. For

greater stability, an external clock can be utilized (see Pin Descriptions).

7. Filter specification applies to the antialiasing filter and the smoothing filter. Therefore, from input to output, expect a

6dB drop by nature of passing through both filters.

8. The typical output voltage will be approximately 570mVp-p with VIN at 32mVp-p.

9. For optimal signal quality, this maximum limit is recommended.

10. When a record command is sent, TRAC =T

RAC +T

RACLO on the first row addressed.

TPLAY Playback Duration ISD4004-08M

ISD4004-10M

ISD4004-12M

ISD4004-16M

min

(6)

TPUD Power-Up Delay ISD4004-08M

ISD4004-10M

ISD4004-12M

ISD4004-16M

31.25

37.5

msec

TSTOP or

TPAUSE

Stop or Pau s e in

Record or Play ISD4004-08M

ISD4004-10M

ISD4004-12M

ISD4004-16M

62.5

100

msec

TRAC RAC Clock Period ISD4004-08M

ISD4004-10M

ISD4004-12M

ISD4004-16M

200

250

300

400

msec

(10)

TRACLO RAC Clock Low

Time ISD4004-08M

ISD4004-10M

ISD4004-12M

ISD4004-16M

31.25

37.5

msec

TRACM RAC Clock Period

in Message

Cueing Mode

ISD4004-08M

ISD4004-10M

ISD4004-12M

ISD4004-16M

125

156.3

187.5

250

µsec

TRACML RAC Clock Low

Time in Message

Cueing Mode

ISD4004-08M

ISD4004-10M

ISD4004-12M

ISD4004-16M

15.63

19.53

23.44

31.25

µsec

THD Tota l H ar mo n i c Distor t i o n 1 2 % @ 1 KHz

VIN ANA IN Input Voltage 32 mV Peak-to-Peak(4) (8) (9)

Table 7: AC Parameters (Packaged Parts)

Symbol Characteristic Min(2) Typ(1) Max(2) Units Conditions

ISD4004 Series

ISD

1. Stresses above those listed may cause permanent

damage to the device. Exposure to the absolute

maximum ratings may affect device reliability.

Functional operation is not implied at these conditions.

1. VCC = VCCA = VCCD

2. VSS = VSSA = VSSD.

Table 8: Absolute Maximum Ratings (Die)(1)

Condition Value

Junction temperature 150°C

Storage temperatu re range –65°C to +150°C

Voltag e appl ie d to any pa d (VSS – 0.3 V) to

(VCC + 0.3 V)

Vol tage appl ied t o MOS I, SCLK , I NT,

RAC and SS pins (input current

limited to ± 20mA

(VSS – 1.0 V) to

5.5 V

VCC – VSS –0.3 V to +7.0 V

Table 9: Operating Conditions (Die)

Condition Value

Commercial opera ting

temperature range 0°C to +50°C

Supply voltage (VCC)(1) +2.7 V to +3.3 V

Ground voltage (VSS)(2) 0 V

1. Typical values: TA = 25°C and 3.0 V.

2. All min/max limits are guaranteed by ISD via electrical testing or characterization. Not all specifications are

100 percent tested.

3. VCCA and VCCD connected together.

4. SS = VCCA= VCCD, XCLK = MOSI = VSSA = VSSD and all other pins floating.

5. Measured with AutoMute feature disabled.

Table 10: DC Parameters (Die)

Symbol Parameters Min(2) Typ(1) Max(2) Units Conditions

VIL Input Low Voltage VCC x0.2 V

VIH Input High Voltage VCC x0.8 V

VOL Output Low Voltage 0.4 V IOL = 10 µA

VOL1 RAC, INT Output Low Voltage 0.4 V IOL = 1 mA

VOH Output High Voltage VCC –0.4 V I

OH = –10 µA

ICC VCC Current (Operating)

— Playback

— Record 15

25 30

40 mA

mA REXT = ¥ (3)

REXT = ¥ (3)

ISB VCC Current (Standby) 1 10 µ A (3) (4)

IIL Input Leakage Current ±1 µA

IHZ MISO Tristate Current 1 10 µA

REXT Output Load Impedance 5 KW

RANA IN + ANA IN+ Input Resistance 2.2 3.0 3.8 KW

RANA IN – ANA IN– Input Resistance 40 56 71 KW

AARP ANA IN+ or ANA IN– to AUDOUT Gain 25 dB (5)

ISD4004 Series

12 Voice Solutions in Silicon™

Table 11: AC Parameters (Die)

Symbol Characteristic Min(2) Typ(1) Max(2) Units Conditions

FSSampling

Frequency ISD4004-08M

ISD4004-10M

ISD4004-12M

ISD4004-16M

8.0

6.4

5.3

4.0

KHz

(5)

FCF Filter Pass Band ISD4004-08M

ISD4004-10M

ISD4004-12M

ISD4004-16M

3.4

2.7

2.3

1.7

KHz

3dB Roll-Off Point (3) (6)

TREC Record Duration ISD4004-08M

ISD4004-10M

ISD4004-12M

ISD4004-16M

min

(5)

(5))

TPLAY Playback Duration ISD4004-08M

ISD4004-10M

ISD4004-12M

ISD4004-16M

min

(5)

TPUD Power-Up Delay ISD4004-08M

ISD4004-10M

ISD4004-12M

ISD4004-16M

31.25

37.5

msec

TSTOP or

TPAUSE

Stop or Pause in

Record or Play ISD4004-08M

ISD4004-10M

ISD4004-12M

ISD4004-16M

62.5

100

msec

TRAC RAC Clock Period ISD4004-08M

ISD4004-10M

ISD4004-12M

ISD4004-16M

200

250

300

400

msec

(9)

TRACLO R AC Clock Low

Time ISD4004-08M

ISD4004-10M

ISD4004-12M

ISD4004-16M

31.25

37.5

msec

TRACM R A C Cl oc k P eriod

in Message

Cueing Mode

ISD4004-08M

ISD4004-10M

ISD4004-12M

ISD4004-16M

125

156.3

187.5

250

msec

TRACML R A C Cl ock Low

Time in Message

Cueing Mode

ISD4004-08M

ISD4004-10M

ISD4004-12M

ISD4004-16M

15.63

19.53

23.44

31.25

msec

ISD4004 Series

ISD

1. Typical values: TA = 25°C and 3.0 V.

2. All min/max limits are guaranteed by ISD via electrical testing or characterization. Not all specifications are 100

percent tested.

3. Low-frequency cut off depends upon the value of external capacitors (see Pin Descriptions).

4. Single-ended input mode. In the differential input mode, VIN maximum for ANA IN+ and ANA IN– is 16 mV peak-

to-peak.

5. Sampling Frequency and Duration can vary as much as ±2.25 percent over the commercial temperature and

voltage ranges. For greater stability, an external clock can be utilized (see Pin Descriptions).

6. Filter specification applies to the antialiasing filter and to the smoothing filter.

7. The typical output voltage will be approximately 570 mV peak-to-peak with VIN at 32 mV peak-to-peak.

8. For optimal signal quality, this maximum limit is recommended.

9. When a record command is sent, TRAC =T

RAC +T

RACLO on the first row addressed.

1. Typical values: TA= 25°C and 3.0 V. Timing measured at 50 percent of the VCC level.

2. Tristate test condition.

THD Total Ha rmonic Distort ion 1 2 % @ 1 KHz

VIN ANA IN Input Voltage 32 mV Peak-to-Peak(4) (7) (8)

Table 12: SPI AC Parameters1

Symbol Characteristics Min Max Units Conditions

TSSS SS Setup Time 500 nsec

TSSH SS Hold Time 500 nsec

TDIS Data in Setup Time 200 nsec

TDIH Data in Hold Time 200 nsec

TPD Output Delay 500 nsec

TDF(2) Output Delay to hiZ 500 nsec

TSSmin SS HIGH 1 msec

TSCKhi SCLK High Time 400 nsec

TSCKlow SCLK Low Time 400 nsec

F0CLK Frequency 1,000 KHz

Table 11: AC Parameters (Die)

Symbol Characteristic Min(2) Typ(1) Max(2) Units Conditions

ISD4004 Series

14 Voice Solutions in Silicon™

TIMING DIAGRAMS

Figure 5: Timing Diagram

Figure 6: 8-Bit Command Format

ISD4004 Series

ISD

Figure 7: 24-Bit Command Format

Figure 8: Playback/Record and Stop Cycle

MOSI

MISO

A6 A7 A8 A9 A10 A11 A12 A13 A14 A15

A0 A1 A2 A3 A4 A5

P4 P5 P6 P7 P8 P9OVF EOM P0 P1 P2 P3 P10

SCLK

BYTE 1 BYTE 2 BYTE 3

P11 P12 P13 P14 P15 P16 X X X X X

C3 C4

C1C0

XXX

ISD4004 Series

16 Voice Solutions in Silicon™

Figure 9: Application Example Using SPI(1)

1. This application example is for illustration purposes only. ISD makes no representation or warranty that such

application will be suitable for production.

2. Please make sure the bypass capacitor, C2 is as close as possible to the package.

ISD4004 Series

ISD

Figure 10: Application Example Using Microwire(1)

1. This application example is for illustration purposes only. ISD makes no representation or warranty that such

application will be suitable for production.

2. Please make sure the bypass capacitor, C2 is as close as possible to the package.

Figure 11: Application Example Using SPI Port on Microcontroller(1)

1. This application example is for illustration purposes only. ISD makes no representation or warranty that such

application will be suitable for production.

2. Please make sure the bypass capacitor, C2 is as close as possible to the package.

ISD4004 Series

18 Voice Solutions in Silicon™

DEVICE PHYSICAL DIMENSIONS

Figure 12: 28-Lead 8x13.4 mm Plastic Thin Small Outline Package (TSOP) Type I (E)

NOTE: Lead coplanarity to be within 0.004 inches.

Table 13: Plastic Thin Small Outline Package (TSOP) Type I (E) Dimensions

INCHES MILLIMETERS

Min Nom Max Min Nom Max

A 0.520 0.528 0.535 13.20 13.40 13.60

B 0.461 0.465 0.469 11.70 11.80 11.90

C 0.311 0.315 0.319 7.90 8.00 8.10

D 0.002 0.006 0.05 0.15

E 0.007 0.009 0.011 0.17 0.22 0.27

F 0.0217 0.55

G 0.037 0.039 0.041 0.95 1.00 1.05

H0°3°6°0°3°6°

I 0.020 0.022 0.028 0.50 0.55 0.70

J 0.004 0.008 0.10 0.21

ISD4004 Series

ISD

Figure 13: 28-Lead 0.600-Inch Plastic Dual Inline Package (PDIP) (P)

Table 14: Plastic Dual Inline Package (PDIP) (P) Dimensions

INCHES MILLIMETERS

Min Nom Max Min Nom Max

A 1.445 1.450 1.455 36.70 36.83 36.96

B1 0.150 3.81

B2 0.065 0.070 0.075 1.65 1.78 1.91

C1 0.600 0.625 15.24 15.88

C2 0.530 0.540 0.550 13.46 13.72 13.97

D0.19 4.83

D1 0.015 0.38

E 0.125 0.135 3.18 3.43

F 0.015 0.018 0.022 0.38 0.46 0.56

G 0.055 0.060 0.065 1.40 1.52 1.65

H 0.100 2.54

J 0.008 0.010 0.012 0.20 0.25 0.30

S 0.070 0.075 0.080 1.78 1.91 2.03

q 0° 15° 0° 15°

ISD4004 Series

20 Voice Solutions in Silicon™

Figure 14: 28-Lead 0.300-Inch Plastic Small Outline Integrated Circuit (SOIC) (S)

NOTE: Lead coplanarity to be within 0.004 inches.

Table 15: Plastic Small Outline Integrated Circuit (SOIC) (S) Dimensions

INCHES MILLIMETERS

Min Nom Max Min Nom Max

A 0.701 0.706 0.711 17.81 17.93 18.06

B 0.097 0.101 0.104 2.46 2.56 2.64

C 0.292 0.296 0.299 7.42 7.52 7.59

D 0.005 0.009 0.0115 0.127 0.22 0.29

E 0.014 0.016 0.019 0.35 0.41 0.48

F 0.050 1.27

G 0.400 0.406 0.410 10.16 10.31 10.41

H 0.024 0.032 0.040 0.61 0.81 1.02

ISD4004 Series

ISD

Figure 15: ISD4004 Series Bonding Physical Layout1 (Unpackaged Die)

1. The backside of die is internally connected to VSS. It MUST NOT be connected to any other potential or damage

may occur.

2. Double bond recommended.

3. This figure reflects the current die thickness. Please contact ISD as this thickness may change in the future.

ISD4004 Series

I. Die Dimensions

X: 4230 micr on s

Y: 9780 micr on s

II. Die Thickness(3)

11.5 ±0.5 mils

III. Pad Opening (min)

90 x 90 micr on s

3.5 x 3.5 mils

VCCD1

VSSA

AUD OUT

AM CAP

ANA IN–

INT

VSSA

XCLK

VCCD2

MOSI

MISOVSSD2

VSSD1

ISD4004

RAC

SCLK

VSSA(2)

ANA IN+

VCCA(2)

ISD4004 Series

22 Voice Solutions in Silicon™

1. Double bond recommended.

Table 16: ISD4004 Series Device Pin/Pad Designations,

with Respect to Die Center (µm)

Pin Pin Name X Axis Y Axis

VSSA VSS Analog Power Supply –1898.1 –4622.4

VSSA VSS Analog Power Supply –1599.9 –4622.4

AUD OUT Audio Output 281.9 –4622.4

AM CAP AutoMute 577.3 –4622.4

ANA IN – Inverting Analog Input 1449.4 –4622.4

ANA IN + Noninverting Analog Input 1603.5 –4622.4

VCCA(1) VCC Analog Power Supp ly 1898.7 –4622.4

VSSA VSS Analog Power Supply 1885.2 –4622.4

RAC Row Address Clock 1483.8 4623.7

INT Interrupt 794.8 4623.7

XCLK External Clock Inp ut 564.8 4623.7

VCCD2 VCC Digital Power Supply 387.9 4623.7

VCCD1 VCC Digital Power Supply 169.5 4623.7

SCLK Slave Cl ock –14.7 4623.7

SS Slave Select –198.1 4623.7

MOSI Master Out Slave In –1063.7 4623.7

MISO Master In Slave Out –1325.6 4623.7

VSSD1 VSS Digital Power Suppl y –1655.3 4623.7

VSSD2 VSS Digital Power Suppl y –1836.9 4623.7

ISD4004 Series

ISD

ORDERING INFORMATION

When ordering ISD4004 series devices, please refer to the following valid part numbers.

For the latest product information, access ISD’s worldwide website at http://www.isd.com.

Part Number Part Number Part Number Part Number

ISD4004-08ME ISD4004-10ME ISD4004-12ME ISD4004-16ME

ISD4004-08MED ISD4004-10MED ISD4004-12MED ISD4004-16MED

ISD4004-08MEI ISD4004-10MEI ISD4004-12MEI ISD4004-16MEI

ISD4004-08MP ISD4004-10MP ISD4004-12MP ISD4004-16MP

ISD4004-08MS ISD4004-10MS ISD4004-12MS ISD4004-16MS

ISD4004-08MSI ISD4004-10MSI ISD4004-12MSI ISD4004-16MSI

ISD4004-08MX ISD4004-10MX ISD4004-12MX ISD4004-16MX

Product Family

ISD4000 Famil y

Product Series

04 = Fourth Series (8–16 min)

Duration:

08M=8 minutes

10M=10 minutes

12M=12 minutes

16M=16 minutes

Special Temperature Field:

Blank= Commercial Packaged (0°C to +70°C)

or Commercial Die (0°C to +50°C)

D= Extended (–20°C to +70°C)

I= Industrial (–40°C to +85°C)

Package Type:

E= 28-Lead 8x13.4mm Plastic Thin Small Outline

Package (TSOP) Typ e 1

P= 28-Lead 0.600-Inch Plastic Dual Inline Package

(PDIP)

S= 28-Lead 0.300-Inch Plastic Small Outline Package

(SOIC)

X=Die

ISD4004– _ _ _ _ _

Product Number Descriptor Key

Part No. 2200998D4004

2727 North First Street

San Jose, California 95134

Tel: 408/943-6666

Fax: 408/544-1787

IMPORTANT NOTICES

The warranty for each product of ISD (Information Storage

Devices, Inc.), is contained in a written warranty which governs

sale and use of such product. Such warranty is contained in the

printed terms and conditions under which such product is sold, or

in a separate written warranty supplied with the product. Please

refer to such written warranty with respect to its applicability to

certain applications of such product.

These products may be subject to restrictions on use. Please

contact ISD, for a list of the current additional restrictions on

these products. By purchasing these products, the purchaser of

these products agrees to comply with such use restrictions. Please

contact ISD for clarification of any restrictions described herein.

ISD, reserves the right, without further notice, to change the ISD

ChipCorder product specifications and/or information in this

document and to improve reliability, functions and design.

ISD assumes no responsibility or liability for any use of the ISD

ChipCorder products. ISD conveys no license or title, either

expressed or implied, under any patent, copyright, or mask work

right to the ISD ChipCorder products, and ISD makes no

warranties or representations that the ISD ChipCorder products are

free from patent, copyright, or mask work right infringement,

unless otherwise specified.

Application examples and alternative uses of any integrated

circuit contained in this publication are for illustration purposes

only and ISD makes no representation or warranty that such

applications shall be suitable for the use specified.

The 100-year retention and 100K record cycle projections are

based upon accelerated reliability tests, as published in the ISD

Reliability Report, and are neither warranted nor guaranteed by

ISD.

Information contained in this ISD ChipCorder data sheet

supersedes all data for the ISD ChipCorder products published

by ISD prior to September, 1998.

This data sheet and any future addendum to this data sheet is

(are) the complete and controlling ISD ChipCorder product

specifications. In the event any inconsistencies exist between the

information in this and other product documentation, or in the

event that other product documentation contains information in

addition to the information in this, the information contained

herein supersedes and governs such other information in its entirety.

reserved. ISD is a registered trademark of ISD. ChipCorder is a

trademark of ISD. All other trademarks are properties of their

respective owners.