5-177
FAST AND LS TTL DATA
DUAL JK NEGATIVE
EDGE-TRIGGERED FLIP-FLOP
The SN54 /74LS107A is a Dual JK Flip-Flop with individual J, K, Direct
Clear and Clock Pulse inputs. Output changes are initiated by the
HIGH-to-LOW transition of the clock. A LOW signal on CD input overrides the
other inputs and makes the Q output LOW.
The SN54/74LS107A is the same as the SN54/74LS73A but has corner
power pins.
NOTE:
The Flatpak version has the
same pinouts (Connection
Diagram) as the Dual In-Line
Package.
CONNECTION DIAGRAM DIP (TOP VIEW)
LOGIC SYMBOL
GUARANTEED OPERATING RANGES
Symbol Parameter Min Typ Max Unit
VCC Supply Voltage 54
74 4.5
4.75 5.0
5.0 5.5
5.25 V
TAOperating Ambient Temperature Range 54
74 –55
025
25 125
70 °C
IOH Output Current — High 54, 74 –0.4 mA
IOL Output Current — Low 54
74 4.0
8.0 mA
SN54/74LS107A
DUAL JK NEGATIVE
EDGE-TRIGGERED FLIP-FLOP
LOW POWER SCHOTTKY
J SUFFIX
CERAMIC
CASE 632-08
N SUFFIX
PLASTIC
CASE 646-06
14 1
14
1
ORDERING INFORMATION
SN54LSXXXJ Ceramic
SN74LSXXXN Plastic
SN74LSXXXD SOIC
14 1
D SUFFIX
SOIC
CASE 751A-02
5-178
FAST AND LS TTL DATA
SN54/74LS107A
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Symbol
Parameter
Limits
Unit
Test Conditions
Symbol
Parameter
Min Typ Max
Unit
Test Conditions
VIH Input HIGH Voltage 2.0 V Guaranteed Input HIGH Voltage for
All Inputs
VIL
Input LOW Voltage
54 0.7
V
Guaranteed Input LOW Voltage for
All Inputs
VIL
Input LOW Voltage
74 0.8
V
Guaranteed Input LOW Voltage for
All Inputs
VIK Input Clamp Diode Voltage –0.65 –1.5 V VCC = MIN, IIN = –18 mA
VOH
Output HIGH Voltage
54 2.5 3.5 V
V
CC = MIN, IOH = MAX, VIN = VIH
or VIL per Truth Table
VOH
Output HIGH Voltage
74 2.7 3.5 V
VCC = MIN, IOH = MAX, VIN = VIH
or VIL per Truth Table
VOL
Output LOW Voltage
54, 74 0.25 0.4 V IOL = 4.0 mA
VCC = VCC MIN,
VIN = VIL or VIH
per Truth Table
VOL
Output LOW Voltage
74 0.35 0.5 V IOL = 8.0 mA
VIN = VIL or VIH
per Truth Table
IIH
Input HIGH Current
J, K
Clear
Clock
20
60
80 µA VCC = MAX, VIN = 2.7 V
IIH
Input HIGH Current
J, K
Clear
Clock
0.1
0.3
0.4 mA VCC = MAX, VIN = 7.0 V
IIL Input LOW Current J, K
Clear and Clock –0.4
–0.8 mA VCC = MAX, VIN = 0.4 V
IOS Short Circuit Current (Note 1) –20 –100 mA VCC = MAX
ICC Power Supply Current 6.0 mA VCC = MAX
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V)
Symbol
Parameter
Limits
Unit
Test Conditions
Symbol
Parameter
Min Typ Max
Unit
Test Conditions
fMAX Maximum Clock Frequency 30 45 MHz
VCC = 5.0 V
CL = 15 pF
t
PLH
tPHL
Propagation Delay,
Clock to Output
15 20 ns
VCC = 5.0 V
CL = 15 pF
tPLH
tPHL
Propagation Delay,
Clock to Output
15 20 ns
CL = 15 pF
AC SETUP REQUIREMENTS (TA = 25°C, VCC = 5.0 V)
Symbol
Parameter
Limits
Unit
Test Conditions
Symbol
Parameter
Min Typ Max
Unit
Test Conditions
tWClock Pulse Width 20 ns
VCC = 5.0 V
tWClear Pulse Width 25 ns
VCC = 5.0 V
tsSetup Time 20 ns
VCC = 5.0 V
thHold Time 0 ns
5-179
FAST AND LS TTL DATA
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5-180
FAST AND LS TTL DATA
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability , including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different
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