9352 040 00112 - Philips Semiconductors / NXP Semiconductors

DATA SH EET

Product speciﬁcation

Supersedes data of 1998 Sep 04 2004 Jan 15

INTEGRATED CIRCUITS

SAA1305T

On/off logic IC

2004 Jan 15 2

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

FEATURES

•8 accurate Schmitt trigger inputs with clamp circuits

•Very low quiescent current

•Reset generator circuit

•Changed information output

•On/offoutputtocontrolaregulator ICwhichsuppliesthe

microcontroller

•32.768 kHz RC oscillator and/or a 32.768 kHz crystal

oscillator

•No delayed reset needed (start-up behaviour oscillator

fixed by internal logic)

•Watchdog timer function

•Blinking LED oscillator with drive circuit for LED

•Watch function.

GENERAL DESCRIPTION

TheSAA1305Tis an on/off logic IC,intendedfor use in car

radios to interface between a microcontroller and various

input signals such as ignition, low supply detection, on/off

key and external control signals.

TheSAA1305Tcanreplaceanexistingon/off logicbuilt-up

with discrete components.

The SAA1305T contains 8 inputs with accurate Schmitt

triggers and clamp circuits. The main function of this IC is

an intelligent I/O expander with 2 modes of operation:

1. Normal I/O expander: the microcontroller (master) is

running and the SAA1305T acts like a slave.

2. Sleepmodeofthetotalapplication:themicrocontroller

is stopped and the SAA1305T acts like a master.

During an event, the microcontroller is awakened.

The communication with the IC is performed via the

I2C-bus (400 kHz). Extra functions of the SAA1305T are:

•LED blinker circuit

•One-day watch

•Watchdog timer.

QUICK REFERENCE DATA

ORDERING INFORMATION

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

VDD supply voltage operating 4.5 5.0 5.5 V

Iqquiescent supply current VDD = 5 V; standby mode −130 200 µA

fSCL(max) maximum SCL clock frequency −−400 kHz

Tvj virtual junction temperature −−150 °C

TYPE NUMBER PACKAGE

NAME DESCRIPTION VERSION

SAA1305T SO24 plastic small outline package; 24 leads; body width 7.5 mm SOT137-1

2004 Jan 15 3

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

BLOCK DIAGRAM

Fig.1 Block diagram.

handbook, full pagewidth

MGR200

D0 24 CHI

9ON/OFF

23 RP

12 TS

11 WD

D1 3

D2 4

D3 5

D4 6

D5 7

D6 8

RES

SDA 20

SCL

SUPPLY

I2C-BUS

INTERFACE

NEW

LATCH

VDD

STATUS

COMPARATOR MASK

VSS

TST

LED

LED DRIVER

OLD

LATCH

XTAL1

OSCILLATOR

WATCH TIMER

ALARM TIMER

ERROR

COUNTER

WATCHDOG

TIMER

XTAL2

OSC1

OSC2

VL TIMER

RESET

GENERATOR

SAA1305T

2004 Jan 15 4

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

PINNING

Note

1. The following results in a LOW-level voltage on pin CHI:

a) A change on any of the (non-masked) inputs D0 to D7.

b) A device reset.

c) An alarm or VL timer event.

d) An oscillator fault or a failed I2C-bus read sequence after a change information signal.

e) A failed Watchdog timer trigger sequence.

SYMBOL PIN DESCRIPTION

D0 1 input D0; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI

D1 2 input D1; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI

D2 3 input D2; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI

D3 4 input D3; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI

D4 5 input D4; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI

D5 6 input D5; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI

D6 7 input D6; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI

D7 8 input D7; generates a reset pulse on pin RP and a LOW-level voltage on pin CHI

ON/OFF 9 on/off output (off is active LOW); for controlling the enable of a separate power supply IC from the

microcontroller

RES 10 reset input (active LOW); for power-on or system reset for the IC

WD 11 Watchdog timer trigger input signal from the microcontroller

TS 12 timer start input (active LOW); to trigger the VL (is an undervoltage) timer (250 ms)

TST 13 test purpose input; must be connected to VSS

OSC1 14 RC oscillator output (32.768 kHz)

OSC2 15 RC oscillator input (32.768 kHz)

XTAL1 16 crystal oscillator output (32.768 kHz)

XTAL2 17 crystal oscillator input (32.768 kHz)

SDA 18 I2C-bus serial data input/output; interface to the microcontroller

VSS 19 ground supply (0 V)

SCL 20 I2C-bus serial clock line input; interface to the microcontroller

VDD 21 supply voltage; 5 V ±10% with a current consumption of maximum 200 µA (without LED current)

LED 22 light emitting diode output; to drive a LED up to 20 mA (high side switch to VDD)

RP 23 reset pulse output

CHI 24 change information output (active LOW); note 1

2004 Jan 15 5

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

FUNCTIONAL DESCRIPTION

Figure 1 shows the block diagram for the SAA1305T.

Details are explained in the subsequent sections.

Watch and alarm functions

An internal RAM (watch register) counts automatically the

seconds for one-day (one-day reset also automatically).

The watch register can be set and read from the I2C-bus.

An alarm function is possible via a second RAM (alarm

timer triggers pin CHI and if enabled the reset pulse on

pin RP. After a device reset the content of the alarm

content of watch register is 0000H.

LED control

The I2C-bus interface control (see Table 10) for the LED

contains:

•Two function control bits

•Two control bits for the blink LED frequency

•Two control bits for the blink LED duration time.

All bits are combined within the LED register.

Reset time

The pulse time on pin RP is selectable via an I2C-bus

command; see Table 8. The default value after Power-on

reset is the longest time (20 ms). Selectable pulse times

via the control register are: 1, 5, 10 and 20 ms.

Withtherisingedgeofthereset pulse all inputs, except the

Watchdog timer and VL timer, are disabled until the

I2C-bus command ENABLE-RESET. Each pulse on

pin RP resets the internal I2C-bus interface.

On/off

The output signal on pin ON/OFF remains HIGH after a

trigger event. Trigger sources are:

•Alterations on any of the inputs D0 to D7

•An impedance detection

•A device reset

•A VL (is an undervoltage) timer or alarm timer event

•An oscillator fault.

In the event of a five time failed Watchdog timer trigger or

missedI2C-busreadsequence(aftera changeinformation

indication), an internal logic circuit will reset pin ON/OFF

and set the IC in the standby mode. It is also possible to

control pin ON/OFF during the run mode via an I2C-bus

command (see Table 8, bit 1). In principal two stable IC

modes are possible; see Fig.3:

1. Standby mode: an oscillator fault and the following IC

function groups can trigger a reset pulse to enter the

run mode;

a) Watch (alarm timer).

b) Supply (device reset).

c) Inputs D0 to D7 (a change on any of these inputs

or an impedance detection).

The Watchdog timer and the VL timer are disabled in

the standby mode.

2. Run mode: only the Watchdog timer (WD), an

oscillator fault, a missed I2C-bus communication and

the reset input (RES) can trigger a reset pulse. It is

possible to enter the standby mode via control register

bit 0; see Table 8.

The dynamic mode or wait mode is possible but can only

be started from the run mode (see Section “VL timer”).

Fig.2 Pin configuration.

handbook, halfpage

ON/OFF

RES

CHI

LED

VDD

VSS

SDA

SCL

XTAL2

XTAL1

OSC2

OSC1

TST

SAA1305T

MGR201

2004 Jan 15 6

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

Fig.3 State diagram for IC modes.

(1) See Section “Run mode entries”.

(2) See Section “Run mode events”.

(3) Possible events are: alterations on any of the inputs D0 to D7, an impedance detection, an alarm timer event and an oscillator fault.

(4) See Section “Standby mode entries”.

(5) Not available.

(6) See Section “Wait mode entries”.

andbook, full pagewidth

MGR202

I2C-bus error counter = 5

Watchdog timer error counter = 5

event(3); CHI

control register bit 0

VL timer start

VL timer end

input D0 = logic 1

oscillator fault

entry(4)

event(5)

STANDBY

OPERABLE

SAA1305T

WAIT

RUN

RESET

entry(6)

event(5)

entry(1)

event(2)

RES = HIGH

RES = LOW

RUN MODE ENTRIES

•Reset Watchdog timer error counter

•Enable Watchdog timer

•Enable VL timer function

•Generate reset pulse

•Disable reset generation via inputs D0 to D7 changes

(inclusive impedance detection) and watch compare

•Reset I2C-bus interface

•Set pin CHI to LOW (LOW = active)

•Set pin ON/OFF to HIGH (ON is active).

RUN MODE EVENTS

•I2C-bus read and write commands

•Watchdog timer reset

•Missed I2C-bus communication after a (CHI) change

information signal

•Oscillator fault.

WAIT MODE ENTRIES

•Disable Watchdog timer

•Reset I2C-bus error counter

•Reset Watchdog timer error counter

•Start VL timer

•Set pin CHI in 3-state

•Set pin ON/OFF to LOW (OFF is active).

STANDBY MODE ENTRIES

•Disable Watchdog timer

•Reset Watchdog timer error counter

•Reset I2C-bus error counter

•Disable VL timer function

•Enable reset generation via inputs D0 to D7 changes

(inclusive impedance detection) and watch compare

•Set pin ON/OFF to LOW (OFF is active)

•Set pin CHI in 3-state.

2004 Jan 15 7

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

Serial I/O

The hardware of the I2C-bus interface (slave) operates

with a maximum clock frequency of 400 kHz.

Inputs

Pins D0 to D7 are connected to latches (new register).

Each latch contains and stores the input change until the

read out via the I2C-bus (read out of new register).

A second register (old register, latches) contains the input

situation before a ‘reset pulse’ signal or HIGH-to-LOW

transition of pin CHI. After a level change on any of the

inputs D0 to D7 (content of new register into ‘old’ register),

pin CHI will indicate this event. Reading the ‘old’ register

has no influence on any latch content. Reading the new

the I2C-bus read sequence of the new register the latch

content will be shifted into the corresponding old latch and

afterwards the new latches are enabled until the next

change on this input. The functions of the inputs D0 to D7

are shown in Table 1.

Due to the fact, that a ‘reset pulse’ signal or a ‘change

information’ signal are also possible via the Watchdog

timer, VLtimer, alarm timer, impedance detection,

oscillatorfaultoraftera device reset, the information about

these different events is also available via corresponding

bits within the status register; see Table 5.

A status I2C-bus read sequence resets the status register

and pin CHI. Only after a change on any of the inputs

D0 to D7, an I2C-bus read sequence of the status register,

old register and new register is it necessary to reset

pin CHI. The inputs D4 to D7 are maskable via the

I2C-bus; see Table 8. All masked inputs (defined via the

control register) are blocked to trigger pins CHI and RP.

During the disable phase of the masked inputs the

corresponding bits within the old and new registers will be

continuously refreshed with the actual input level.

Table 1 Input logic levels and functions

INPUT SCHMITT

TRIGGER INPUT SPECIAL INPUT MASKABLE VL TIMER

INTERRUPT IMPEDANCE

DETECTION

D7 X −X−−

D6 X −X−−

D5 X −X−−

D4 −XX−−

D3 −X−−−

D2 −X−−−

D1 X −−−X

D0 X −−X−

2004 Jan 15 8

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

IMPEDANCE DETECTION

Input D1 is a normal input with comparable behaviour like

the other seven inputs. The only difference is an additional

internal exclusive-NOR (EXNOR) connected between the

two comparator outputs for high and low detection;

see Fig.4. The EXNOR signal indicates, in combination

with a special external circuit on input D1, a voltage of

1⁄2VDD on this input.

The simple input description for impedance detection is

probably not the real solution, but helps to explain the

function. Input D1 can be used as a normal input and for

impedance detection as described in Table 2. For normal

use the output Q acts like every other input, but for

impedance detection the EXNOR output S is also

important.Output Sislinkedtothe status register bit 6 and

indicates the 1⁄2VDD; see Table 5.

Between detection and indication via the status register

bit 6, a delay time is integrated (programmable via the

impedance register bits 1 and 0; see Table 15). When the

1⁄2VDD value is detected the EXNOR output will be set to

logic 1 (active) and after the programmed delay time the

statusregisterbit 6willbesettologic 1(active).Thisevent

will also be indicated via pin CHI and (if enabled) pin RP.

The impedance information (bit 6 is active) within the

status register is present until the I2C-bus status is read.

With the disappearance of the impedance information no

further actions will be generated. Every impedance signal

change during the delay time will restart the delay time.

However an impedance detection is only possible in the

event of a stable signal, at least for the programmed delay

time. Setting the status register bit 6 with a repetition time

which equals the ‘impedance delay time’ as long as

input D1 stays in high-impedance state is implemented.

Fig.4 Simple input description for impedance detection.

handbook, full pagewidth

MGR203

1.5 V

3.5 V

5 V12 V

10 kΩ100 kΩ

100 kΩ

input D1

ignition

key

O2 S

Table 2 Logic levels for impedance detection

IGNITION KEY O1 O2 Q S

12V 1010

Open-circuit (VI= 2.5 V) 0 0 0 or 1 1

Ground (VI<1.5V) 0100

2004 Jan 15 9

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

Watchdog timer

An internal Watchdog timer is active after each reset pulse

output and can be triggered via pin WD. In the event of a

not specified pulse, a delayed or missing trigger pulse, a

reset on pin RP will be the immediate reaction.

AftertheHIGH-to-LOWtransitionoftheresetpulseoutput,

the first transition change within 500 ms on pin WD will be

detected as the first trigger from the microcontroller. The

timing diagram for the Watchdog timer trigger signal is

shown in Fig.5.

Fig.5 Watchdog timer trigger timing.

(1) In the event of a not specified, a delayed or missing trigger signal, a reset on pin RP will be the immediate reaction.

(2) The maximum time until signal change for first Watchdog timer is 500 ms.

(3) The time until next signal change is minimum 200 ms and maximum 300 ms.

handbook, halfpage

MGR220

(3)

(1)

(2)

Oscillators

Two oscillator types are built-in, a RC oscillator (designed

for 32.768 kHz) and a crystal oscillator (32.768 kHz), both

with separate pins. For a proper device function an

oscillator control circuit is integrated. This circuit

supervises the oscillator function and creates a reset and

oscillator restart in the event of an oscillator failure.

Intheevent of anoscillatorfault, the eventwillbe indicated

after a restart via the status register bit 5. During the

oscillator failure phase some outputs remain at a defined

level as shown in Table 3.

The RC oscillator accuracy is 5%.

When operating with the RC oscillator, pin XTAL2 must be

connected to VDD or VSS to minimize the quiescent

current. When operating with the crystal oscillator

pin OSC2 must be connected to VSS or VDD.

VL timer

A built-in timer, which can be started with a HIGH-to-LOW

transition on pin TS, triggers, after 250 ms, pins RP

and CHI and sets pin ON/OFF. The VL timer starts only

once after a valid start condition. Default state after a

Power-on reset is not active. A VL timer start resets the

Watchdog timer. During run time of the VL timer is

ON/OFF = LOW, CHI = 3-state and the Watchdog timer is

disabled.

Pin TS is only active during the run mode. During run time

of the VL timer the IC remains in the wait mode. Only a

HIGH-level signal on input D0 can stop the VLtimer in the

same way as after 250 ms. In the event of an oscillator

fault the IC also enters the run mode but without an

influence on the status register bit 2. During the wait mode

an influence of the status register via other sources (e.g.

timer and inputs) is possible, but a transition from wait

mode to run mode is only possible as described above.

2004 Jan 15 10

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

Power-on or system reset

Theresetinput (pin RES) is oftheCMOSinput levels type.

During a LOW level on pin RES the outputs are as shown

in Table 3 for RES = LOW.

After the system reset (rising edge on pin RES) all internal

registers are in a defined condition (see Table 4) and the

outputs are as shown in Table 3 for RES = HIGH.

Table 3 Logic levels for the reset input and oscillator failure

Table 4 Deﬁned condition after reset for the registers; RES = HIGH

PIN RES=LOW RES = HIGH OSCILLATOR FAILURE

RP HIGH HIGH (voltage on VDD)

3-state [after a defined time (maximum reset time)] 3-state

ON/OFF LOW HIGH LOW

LED LOW LOW LOW

SDA 3-state 3-state (receiving mode if RP = LOW) 3-state

CHI 3-state LOW (information for microcontroller) LOW

Status register 02 (HEX)

New register all input latches are enabled

Old register same levels as corresponding inputs during falling edge on pin RES

Control register 03 (HEX)

LED register 04 (HEX)

Alarm register FFFF (HEX); see Table 7

Watch register 0000 (HEX)

Impedance register 03 (HEX)

2004 Jan 15 11

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

I2C-BUS INTERFACE COMMANDS

I2C-bus communication is only possible in the run mode.

Read mode operations

Only the sequential read mode is possible. The IC starts

after every device select (code 48) to output data 1.

However, in this event the master does acknowledge the

data output and the IC continues to output the next data in

sequence; see Figs 6 and 7.

To terminate the stream of bytes, the master must not

acknowledge the last byte output, but must generate a

STOP condition. The output data is from consecutive byte

addresses, with the internal byte address counter

automatically incremented after each byte output. In the

event of higher read sequences than available data bytes,

the 7th and 8th bit content are 0 and the address counter

will generate a wrap around (output at address 0).

The definitions of the bits are given in Tables 5, 6 and 7.

Fig.6 I2C-bus read mode sequence.

andbook, full pagewidth

S PDEVICE SELECT DATA 1

acknowledge

DATA N

R/W

START

condition STOP

condition

acknowledge acknowledge no acknowledge

MGR221

Fig.7 I2C-bus read data sequence.

handbook, full pagewidth

MGR222

START DEVICE SELECT STATUS OLD NEW WATCH

byte 0 1 2 3, 4, 5, 6, 7

STOP

2004 Jan 15 12

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

Table 5 Deﬁnition of the status register bits

Table 6 Deﬁnition of the old and new register bits

Table 7 Deﬁnition of the watch and alarm register bits (read mode); note 1

Note

1. The alarm is disabled by writing a time larger than 24:00:00. With the default values the alarm function is disabled.

BIT DESCRIPTION

7 a logic 1 indicates a change on any of the inputs D7 to D0

6 a logic 1 indicates a 1⁄2VDD on input D1 (impedance detection)

5 a logic 1 indicates a reset after an oscillator fault

4 a logic 1 indicates a reset caused by a missed I2C-bus communication after a change information signal

(no communication between two Watchdog timer trigger pulses)

3 a logic 1 indicates a timer alarm

2 a logic 1 indicates a VL timer reset

1 a logic 1 indicates a device reset (via pin RES)

0 a logic 1 indicates a Watchdog timer reset

BIT DESCRIPTION

7 data of input D7

6 data of input D6

5 data of input D5

4 data of input D4

3 data of input D3

2 data of input D2

1 data of input D1

0 data of input D0

ADDRESS

(HEX) DATA BITS DESCRIPTION VALUES DEFAULT

2 4 to 0 hours of alarm 0 to 31 31

3 5 to 0 minutes of alarm 0 to 63 63

4 5 to 0 seconds of alarm 0 to 63 63

5 4 to 0 hours of watch 0 to 23 0

6 5 to 0 minutes of watch 0 to 59 0

7 5 to 0 seconds of watch 0 to 59 0

2004 Jan 15 13

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

Write mode operations

After a START condition the master sends a device select

code with the R/W bit reset to logic 0; see Fig.8. The IC

acknowledge this and waits for the address byte. After the

address the master sends the corresponding data, which

is acknowledged by the IC. It is possible to continue with

the data transfer, each byte is acknowledged by the IC.

The internal byte address counter is incremented after

each data transmission.

The transfer is terminated when the master generates a

STOPcondition. Inthe event of a wrong address decoding

the IC sends a no acknowledge signal and ignores all

following data.

Figure 9 shows the sequence for write data mode. Both

alarm and watch registers consist of 3 bytes. The first byte

(2 and 5) is the most significant byte. The definitions of the

bits are given in Tables 8, 10, 14 and 15.

Fig.8 I2C-bus write mode sequence.

handbook, full pagewidth

S PDEVICE SELECT ADDRESS

acknowledge

DATA 1 DATA N

R/W

START

condition STOP

condition

acknowledge acknowledge acknowledge acknowledge

MGR223

Fig.9 I2C-bus write data sequence.

handbook, full pagewidth

MGR224

START DEVICE SELECT ADDRESS CONTROL LED ALARM WATCH IMPEDANCE

byte 0 1 2, 3, 4 5, 6, 7 8

STOP

2004 Jan 15 14

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

Table 8 Deﬁnition of the control register bits

BIT DESCRIPTION

7 part of the mask register; corresponds to input D7; a logic 1 disables input D7 (no inﬂuence on pin CHI)

6 part of the mask register; corresponds to input D6; a logic 1 disables input D6 (no inﬂuence on pin CHI)

5 part of the mask register; corresponds to input D5; a logic 1 disables input D5 (no inﬂuence on pin CHI)

4 part of the mask register; corresponds to input D4; a logic 1 disables input D4 (no inﬂuence on pin CHI)

3 content of bits 3 and 2 corresponds with the pulse width of the reset pulse output; see Table 9

1 control bit for pin ON/OFF; a logic 0 sets pin ON/OFF to VSS; a logic 1 sets pin ON/OFF to VDD

0 control bit (ENABLE-RESET) for the IC modes; only setting a logic 0 is possible; standby mode with disabled

Watchdog timer, enabled reset generation, ON/OFF = LOW and CHI = 3-state; with the rising edge of the

reset pulse output the IC enters the run mode with enabled Watchdog timer, disabled reset generation,

ON/OFF = HIGH (but controllable via control register bit 1) and CHI = HIGH (is active, not in 3-state)

Table 9 Pulse width of the reset pulse output

Table 10 Deﬁnition of the LED register bits

Table 11 Function control bits

BIT 3 BIT 2 PULSE WIDTH (ms)

00 20

01 10

10 5

11 1

BIT DESCRIPTION

7 bits 7 and 6 are function control bits;

see Table 11

5 no function

4 reset I2C-bus error counter

3 bits 3 and 2 are control bits for the blink LED

frequency (output LOW time); see Table 12

1 bits 1 and 0 are control bits for the blink LED

duration time; see Table 13

BIT 7 BIT 6 FUNCTION

0 0 LED output switched to ground

0 1 blink function according the LED

1 0 LED output switched to VDD

1 1 blink function according the LED

Table 12 Control bits for the blink LED frequency

Table 13 Control bits for the blink LED duration time

BIT 3 BIT 2 FREQUENCY

0 0 2 Hz (0.5 s)

0 1 1 Hz (1 s)

1 0 0.67 Hz (1.5 s)

1 1 0.5 Hz (2 s)

BIT 1 BIT 0 DURATION TIME (ms)

00 20

01 30

10 40

11 50

2004 Jan 15 15

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

Table 14 Deﬁnition of the watch and alarm register bits (write mode); notes 1, 2 and 3

Notes

1. The alarm is disabled by writing a time larger than 24:00:00. With the default values the alarm function is disabled.

The alarm is also disabled if hours >23 or minutes >59 or seconds >59.

2. There are several attention points if a senseless time is written to the alarm register, for example:

a) Write 25 to address 2; data bits 4 to 0 = 25 ⇒ hours = 25 (alarm disabled).

b) Write 70 to address 3; data bits 5 to 0 = 6 ⇒ minutes = 6.

c) Write 81 to address 4; data bits 5 to 0 = 17 ⇒ seconds = 17.

3. There are several attention points if a senseless time is written to the watch register, for example:

a) Write 25 to address 5; data bits 4 to 0 = 25 ⇒ hours = 23 (limited).

b) Write 70 to address 6; data bits 5 to 0 = 6 ⇒ minutes = 6.

c) Write 81 to address 7; data bits 5 to 0 = 17 ⇒ seconds = 17.

Table 15 Deﬁnition of the impedance register bits

Table 16 Control bits for the impedance detection delay time

ADDRESS (HEX) DATA BITS DESCRIPTION VALUES DEFAULT

2 4 to 0 hours of alarm 0 to 31 31

3 5 to 0 minutes of alarm 0 to 63 63

4 5 to 0 seconds of alarm 0 to 63 63

5 4 to 0 hours of watch 0 to 23 0

6 5 to 0 minutes of watch 0 to 59 0

7 5 to 0 seconds of watch 0 to 59 0

BIT DESCRIPTION

7 no function

6 no function

5 no function

4 no function

3 no function

2 enable or disable bit for the impedance detection

0 = inactive (1⁄2VDD detection without influence on the status register)

1 = active (1⁄2VDD detection with influence on the status register)

1 bits 1 and 0 are control bits for the impedance detection delay time; see Table 16

BIT 1 BIT 0 DELAY TIME

0 0 100 ms

0 1 250 ms

1 0 500 ms

11 1s

2004 Jan 15 16

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134).

THERMAL CHARACTERISTICS

CHARACTERISTICS

VDD =5V; T

amb =25°C; unless otherwise speciﬁed.

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

VDD supply voltage operating −0.5 +6.5 V

Iqquiescent supply current VDD = 5 V; standby mode −200 µA

VI(n) input voltage on pins fosc =32kHz

SDA, SCL, RES, WD and TS −0.5 +6.5 V

D0 to D7 with 5 kΩ series resistor −0.5 +17 V

VO(n) output voltage on pins CHI, RP,

ON/OFF and LED fosc =32kHz −0.5 +6.5 V

fSCL(max) maximum SCL clock frequency −400 kHz

Tvj virtual junction temperature −150 °C

Tstg storage temperature −65 +150 °C

Tamb ambient temperature −40 +85 °C

SYMBOL PARAMETER CONDITIONS VALUE UNIT

Rth(j-a) thermal resistance from junction to

ambient in free air 78 K/W

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply

VDD supply voltage operating 4.5 5.0 5.5 V

Iqquiescent supply current note 1 −130 200 µA

Inputs

PINS D0 TO D7

Vi(clamp) input clamping voltage Iclamp = 2 mA 5.5 6.5 8.3 V

Iclamp(h) high clamping current VD0 to VD7 >VDD −−2mA

ILI input leakage current VDx =5V −−1µA

SCHMITT TRIGGER INPUTS FOR PINS D0, D1 AND D5 TO D7

Vth(r) rising threshold voltage 3.4 3.5 3.6 V

Vth(f) falling threshold voltage 1.4 1.5 1.6 V

Vhys hysteresis voltage 1.8 2 2.2 V

SPECIAL INPUTS FOR PINS D2, D3 AND D4

Vth(r) rising threshold voltage 2.4 2.5 2.6 V

Vth(f) falling threshold voltage 1.7 1.8 1.9 V

Vhys hysteresis voltage 0.5 0.7 0.9 V

2004 Jan 15 17

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

PIN SCL

VIL LOW-level input voltage 0 −1.5 V

VIH HIGH-level input voltage 3 −VDD V

ILI input leakage current Vi= 5 V; with output off −−1µA

fSCL(max) maximum SCL clock frequency −−400 kHz

ti(r) input rise time −tbf −µs

ti(f) input fall time −tbf −µs

Ciinput capacitance −−7pF

PINS RES, WD AND TS

VIL LOW-level input voltage 0 −0.2VDD V

VIH HIGH-level input voltage 0.8VDD −VDD V

ILI input leakage current Vi= 5 V; with output off −−1µA

Ciinput capacitance −−7pF

Inputs/outputs

PIN SDA

VIL LOW-level input voltage 0 −1.5 V

VIH HIGH-level input voltage 3 −VDD V

VOL LOW-level output voltage IOL = 3 mA 0 −1V

Ioff 3-state off current Vi=5or0V −−10 µA

ti(r) input rise time −−2µs

ti(f) input fall time −−2µs

to(f) output fall time 1 V ≤Vi≤3V −−200 ns

Ciinput capacitance −−7pF

CLload capacitance −−400 pF

CRYSTAL OSCILLATOR; notes 2 and 3; see Fig.10

Pdr drive level power −10 −µW

CLload capacitance −7to12 −pF

Rsseries resistance −40 −kΩ

fosc oscillator frequency −32.768 −kHz

Q Q factor −40000 100000

RC OSCILLATOR; note 4; see Fig.11

Cosc oscillator capacitance 100 300 −pF

Rosc oscillator resistance 5 90 −kΩ

fosc oscillator frequency Cosc = 300 pF;

Rosc =90kΩ; note 5 −32.768 −kHz

fclk(min) minimum clock frequency note 6 −−10 kHz

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

2004 Jan 15 18

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

Notes

1. The IC is programmed to standby mode via the I2C-bus command, no LED is connected, no I2C-bus communication,

one oscillator is running and the Watchdog timer is disabled.

2. When running on crystal oscillator, the input of the RC oscillator must be connected to VDD or VSS.

3. Preferable crystal types: MU206S and DMX38.

4. When running on RC oscillator, the input of the crystal oscillator must be connected to VDD or VSS.

5. The RC oscillator frequency

The RC oscillator frequency tolerance

6. Below this maximum value the IC will detect an oscillator fault.

Outputs

PIN LED

VOL LOW-level output voltage IOL =16mA 0 −0.5 V

VOH HIGH-level output voltage IOL =16mA 4 −VDD V

IOH HIGH-level output current VOH >1V −20 −−mA

PIN ON/OFF

VOL LOW-level output voltage IOL = 4 mA 0 −0.5 V

VOH HIGH-level output voltage IOH =−600 µA 4.8 −VDD V

IOH =−4mA 4 −VDD V

PIN CHI

VOL LOW-level output voltage IOL = 200 µA0−0.5 V

ILO output leakage current VOH =V

DD −−5µA

PIN RP

VOH HIGH-level output voltage IOH =−4mA 4 −VDD V

Ioff 3-state off current Vo=V

DD or VSS −−5µA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

fosc 0.87

Rosc Cosc

------------------------------

fosc

∆Rosc

∆2Cosc

∆20.05 fosc

×()

++=

2004 Jan 15 19

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

APPLICATION CIRCUITS

Fig.10 Application circuit for crystal oscillator.

(1) Crystal oscillator type MU206S (32.768 kHz).

andbook, full pagewidth

MGR204

1 kΩ

20 kΩ

33 kΩ

25 kΩ

15 pF

20 10 21

15 pF

(1)

17 14 15 131922

input D4 R4

1 kΩ

VDD

input D7

SAA1305T

Fig.11 Application circuit for RC oscillator.

handbook, full pagewidth

MGR205

1 kΩ

20 kΩ

33 kΩ

25 kΩ

20 10 21

Cosc

300 pF

16 17 14 15 131922

input D4 R4

4.7 kΩ

VDD

input D7

Rosc

90 kΩ

SAA1305T

2004 Jan 15 20

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

ON/OFF LOGIC WITH MICROCONTROLLER IN POWER-DOWN STATE

Fig.12 Block diagram with continuous microcontroller supply.

handbook, full pagewidth

MGR206

5 V

CONTINUOUS

REGULATOR

SAA1305T

ON/OFF

RES

5 V

14 V

MICRO-

CONTROLLER

SDA

SCL

D0 to D7 1 to 8

CHI

Fig.13 Timing diagrams with continuous microcontroller supply.

(1) Level not defined.

a. First power-on. b. Normal switch-on.

handbook, full pagewidth

MGR207

ON/OFF

RES

CHI

14 V

ON/OFF

CHI

(1) (1)

2004 Jan 15 21

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

Scenarios for ON/OFF logic with microcontroller in power-down state

Fig.14 Proper first connection on power supply.

handbook, full pagewidth

MGR208

RES = LOW RP = HIGH

RES = HIGH

5 V continuous

regulator SAA1305T microcontroller

RP = LOW

CHI = LOW

ON/OFF = HIGH (A/D supply)

I2C-bus write reset time/blink/LED status

I2C-bus read status/old/new register

I2C-bus write ENABLE-RESET

CHI = HIGH

220 ms (hardware specific)

20 ms

Fig.15 Switch-on after a valid input change.

handbook, full pagewidth

MGR209

Dx RP = HIGH

RP = LOW

SAA1305T main supplymicrocontroller

POWER-ON

WD = LOW

WD = HIGH

CHI = LOW

ON/OFF = HIGH

I2C-bus read status/old/new register

CHI = HIGH

1 ms

250 ms

2004 Jan 15 22

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

Fig.16 VL timer behaviour (voltage drops >250 ms).

handbook, full pagewidth

MGR210

input D0 = LOW

RP = HIGH

RP = LOW

POWER-OFF

SAA1305T main supplymicrocontroller

CHI = LOW

ON/OFF = HIGH

I2C-bus read status register

CHI = HIGH

250 ms

1 ms

250 ms

1 ms

TS = LOW

ON/OFF = LOW

RP = HIGH

RP = LOW

CHI = LOW

ON/OFF = HIGH

TS = LOW

ON/OFF = LOW

sequence runs untill signal input D0 = HIGH

Fig.17 VL timer behaviour (voltage drops <250 ms).

handbook, full pagewidth

MGR211

input D0 = LOW

input D0 = HIGH RP = HIGH

RP = LOW

POWER-OFF

POWER-ON

SAA1305T main supplymicrocontroller

CHI = LOW

ON/OFF = HIGH

I2C-bus read status/old/new register

CHI = HIGH

t < 250 ms

1 ms

250 ms

TS = LOW

ON/OFF = LOW

WD = HIGH

WD = LOW

2004 Jan 15 23

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

Fig.18 Wake-up via alarm.

(1) See Fig.5.

handbook, full pagewidth

MGR212

RP = HIGH

RP = LOW

POWER-OFF

POWER-ON

SAA1305T main supplymicrocontroller

CHI = LOW

ON/OFF = HIGH (A/D supply is on)

I2C-bus read status/old/new register

I2C-bus write alarm timer

I2C-bus write ENABLE-RESET

CHI = HIGH

programmable

time

1 ms

ON/OFF = LOW (A/D supply is off)

Watchdog timer trigger sequence(1)

Fig.19 Behaviour after missed I2C-bus read sequence.

handbook, full pagewidth

MGR213

input Dx

RP = HIGH

RP = LOW

SAA1305T main supplymicrocontroller

POWER-OFF

WD = LOW (HIGH)

WD = HIGH (LOW)

CHI = LOW

0 to 300 ms

1 to 20 ms

2004 Jan 15 24

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

ON/OFF LOGIC WITH SWITCHED MICROCONTROLLER SUPPLY

Fig.20 Block diagram with switched microcontroller supply.

handbook, full pagewidth

MGR214

5 V

REGULATOR

5 V

CONTINUOUS

REGULATOR

SAA1305T

ON/OFF

RES

RESET

5 V 5 V

14 V

RP MICRO-

CONTROLLER

SDA

SCL

D0 to D7 1 to 8

CHI

handbook, full pagewidth

MGR215

ON/OFF

RES

14 V

CHI

ON/OFF

CHI

(1) (1)

Fig.21 On/off description with switched microcontroller supply.

(1) Level not defined.

a. First power-on. b. Normal switch-on.

2004 Jan 15 25

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

Scenarios for ON/OFF logic with switched microcontroller supply

Fig.22 Proper first connection on power supply.

handbook, full pagewidth

MGR216

RES = LOW RP = HIGH

RP = LOW

RES = HIGH RESET = HIGH

5 V continuous

regulator SAA1305T 5 V regulator microcontroller

RESET = LOW

CHI = LOW

ON/OFF = HIGH

I2C-bus write reset time/blink/LED status

I2C-bus read status/old/new register

I2C-bus write ENABLE-RESET

RESET = HIGHON/OFF = LOW

CHI = HIGH

200 ms

20 ms

6 ms

Fig.23 Switch-on after a valid input change.

handbook, full pagewidth

MGR217

Dx RP = HIGH

RP = LOW

RESET = HIGH

SAA1305T 5 V regulator microcontroller

RESET = LOW

WD = LOW

WD = HIGH

CHI = LOW

ON/OFF = HIGH

I2C-bus read status/old/new register

CHI = HIGH

10 ms

250 ms

6 ms

2004 Jan 15 26

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

Fig.24 VL timer behaviour.

(1) If input D0 = LOW, the microcontroller will restart the VLtimer.

handbook, full pagewidth

MGR218

input D0 = LOW

input D0 = HIGH(1)

RP = HIGH

RP = LOW

RESET = HIGH

SAA1305T 5 V regulator microcontroller

WD = LOW

WD = HIGH

CHI = LOW

ON/OFF = LOW

TS = LOW

I2C-bus read status/old/new register

ON/OFF = HIGH

CHI = HIGH

10 ms

250 ms

25 ms

Fig.25 Wrong or missed Watchdog timer trigger.

andbook, full pagewidth

MGR219

RP = HIGH

RP = LOW

wrong or missed Watchdog timer trigger signal

SAA1305T 5 V regulator microcontroller

CHI = LOW

ON/OFF = LOW

wrong or missed Watchdog timer trigger signal

RP = HIGH

300 ms

1 to 20 ms

300 ms

4 times

2004 Jan 15 27

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

PACKAGE OUTLINE

UNIT A

max. A

(1)

(1) (1)

ywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

inches

2.65 0.3

0.1 2.45

2.25 0.49

0.36 0.32

0.23 15.6

15.2 7.6

7.4 1.27 10.65

10.00 1.1

1.0 0.9

0.4 8

0.25 0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

1.1

0.4

SOT137-1

detail X

(A )

0.25

075E05 MS-013

pin 1 index

0.1 0.012

0.004 0.096

0.089 0.019

0.014 0.013

0.009 0.61

0.60 0.30

0.29 0.05

1.4

0.055

0.419

0.394 0.043

0.039 0.035

0.016

0.01

0.25

0.01 0.004

0.043

0.016

0.01

0 5 10 mm

scale

SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1

99-12-27

03-02-19

2004 Jan 15 28

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

SOLDERING

Introduction to soldering surface mount packages

Thistextgivesaverybriefinsighttoacomplextechnology.

A more in-depth account of soldering ICs can be found in

our

“Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).

There is no soldering method that is ideal for all surface

mount IC packages. Wave soldering can still be used for

certainsurface mount ICs, but itisnotsuitableforfinepitch

SMDs. In these situations reflow soldering is

recommended.

Reﬂow soldering

Reflow soldering requires solder paste (a suspension of

fine solder particles, flux and binding agent) to be applied

totheprinted-circuit board byscreenprinting, stencilling or

pressure-syringe dispensing before package placement.

Driven by legislation and environmental forces the

worldwide use of lead-free solder pastes is increasing.

Several methods exist for reflowing; for example,

convection or convection/infrared heating in a conveyor

type oven. Throughput times (preheating, soldering and

cooling) vary between 100 and 200 seconds depending

on heating method.

Typical reflow peak temperatures range from

215 to 270 °C depending on solder paste material. The

top-surface temperature of the packages should

preferably be kept:

•below 225 °C (SnPb process) or below 245 °C (Pb-free

process)

– for all BGA, HTSSON-T and SSOP-T packages

– for packages with a thickness ≥2.5 mm

– for packages with a thickness < 2.5 mm and a

volume ≥350 mm3 so called thick/large packages.

•below 240 °C (SnPb process) or below 260 °C (Pb-free

process) for packages with a thickness < 2.5 mm and a

volume < 350 mm3 so called small/thin packages.

Moisture sensitivity precautions, as indicated on packing,

must be respected at all times.

Wave soldering

Conventional single wave soldering is not recommended

forsurface mount devices (SMDs) orprinted-circuitboards

with a high component density, as solder bridging and

non-wetting can present major problems.

To overcome these problems the double-wave soldering

method was specifically developed.

If wave soldering is used the following conditions must be

observed for optimal results:

•Use a double-wave soldering method comprising a

turbulent wave with high upward pressure followed by a

smooth laminar wave.

•For packages with leads on two sides and a pitch (e):

– larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the

transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the

printed-circuit board.

The footprint must incorporate solder thieves at the

downstream end.

•Forpackages with leads on foursides,thefootprintmust

be placed at a 45°angle to the transport direction of the

printed-circuit board. The footprint must incorporate

solder thieves downstream and at the side corners.

During placement and before soldering, the package must

be fixed with a droplet of adhesive. The adhesive can be

applied by screen printing, pin transfer or syringe

dispensing. The package can be soldered after the

adhesive is cured.

Typical dwell time of the leads in the wave ranges from

3 to 4 seconds at 250 °C or 265 °C, depending on solder

material applied, SnPb or Pb-free respectively.

A mildly-activated flux will eliminate the need for removal

of corrosive residues in most applications.

Manual soldering

Fix the component by first soldering two

diagonally-opposite end leads. Use a low voltage (24 V or

less) soldering iron applied to the flat part of the lead.

Contact time must be limited to 10 seconds at up to

300 °C.

When using a dedicated tool, all other leads can be

soldered in one operation within 2 to 5 seconds between

270 and 320 °C.

2004 Jan 15 29

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

Suitability of surface mount IC packages for wave and reﬂow soldering methods

Notes

1. Formoredetailed information on theBGApackages refer to the

“(LF)BGAApplicationNote

”(AN01026);ordera copy

from your Philips Semiconductors sales office.

2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum

temperature (with respect to time) and body size of the package, there is a risk that internal or external package

cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the

Drypack information in the

“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”

3. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account

be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature

exceeding 217 °C±10 °C measured in the atmosphere of the reflow oven. The package body peak temperature

must be kept as low as possible.

4. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder

cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,

the solder might be deposited on the heatsink surface.

5. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.

The package footprint must incorporate solder thieves downstream and at the side corners.

6. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not

suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

7. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than

0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

8. Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered pre-mounted

on flex foil. However, the image sensor package can be mounted by the client on a flex foil by using a hot bar

soldering process. The appropriate soldering profile can be provided on request.

9. Hot bar or manual soldering is suitable for PMFP packages.

PACKAGE(1) SOLDERING METHOD

WAVE REFLOW(2)

BGA, HTSSON..T(3), LBGA, LFBGA, SQFP, SSOP..T(3), TFBGA,

USON, VFBGA not suitable suitable

DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP, HSQFP, HSSON,

HTQFP, HTSSOP, HVQFN, HVSON, SMS not suitable(4) suitable

PLCC(5), SO, SOJ suitable suitable

LQFP, QFP, TQFP not recommended(5)(6) suitable

SSOP, TSSOP, VSO, VSSOP not recommended(7) suitable

CWQCCN..L(8), PMFP(9), WQCCN..L(8) not suitable not suitable

2004 Jan 15 30

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

DATA SHEET STATUS

Notes

1. Please consult the most recently issued data sheet before initiating or completing a design.

2. The product status of the device(s) described in this data sheet may have changed since this data sheet was

published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.

3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

LEVEL DATA SHEET

STATUS(1) PRODUCT

STATUS(2)(3) DEFINITION

I Objective data Development This data sheet contains data from the objective speciﬁcation for product

development. Philips Semiconductors reserves the right to change the

speciﬁcation in any manner without notice.

II Preliminary data Qualiﬁcation This data sheet contains data from the preliminary speciﬁcation.

Supplementary data will be published at a later date. Philips

Semiconductors reserves the right to change the speciﬁcation without

notice, in order to improve the design and supply the best possible

product.

III Product data Production This data sheet contains data from the product speciﬁcation. Philips

Semiconductors reserves the right to make changes at any time in order

to improve the design, manufacturing and supply. Relevant changes will

be communicated via a Customer Product/Process Change Notiﬁcation

(CPCN).

DEFINITIONS

Short-form specification  The data in a short-form

specification is extracted from a full data sheet with the

same type number and title. For detailed information see

the relevant data sheet or data handbook.

Limiting values definition Limiting values given are in

accordance with the Absolute Maximum Rating System

(IEC 60134). Stress above one or more of the limiting

values may cause permanent damage to the device.

These are stress ratings only and operation of the device

attheseoratanyotherconditionsabove those given in the

Characteristics sections of the specification is not implied.

Exposure to limiting values for extended periods may

affect device reliability.

Application information  Applications that are

described herein for any of these products are for

illustrative purposes only. Philips Semiconductors make

norepresentation orwarrantythatsuchapplications willbe

suitable for the specified use without further testing or

modification.

DISCLAIMERS

Life support applications  These products are not

designed for use in life support appliances, devices, or

systems where malfunction of these products can

reasonably be expected to result in personal injury. Philips

Semiconductorscustomersusingorsellingtheseproducts

for use in such applications do so at their own risk and

agree to fully indemnify Philips Semiconductors for any

damages resulting from such application.

Right to make changes  Philips Semiconductors

reserves the right to make changes in the products -

including circuits, standard cells, and/or software -

described or contained herein in order to improve design

and/or performance. When the product is in full production

(status ‘Production’), relevant changes will be

communicated via a Customer Product/Process Change

Notification (CPCN). Philips Semiconductors assumes no

responsibility or liability for the use of any of these

products, conveys no licence or title under any patent,

makes no representations or warranties that these

products are free from patent, copyright, or mask work

right infringement, unless otherwise specified.

2004 Jan 15 31

Philips Semiconductors Product speciﬁcation

On/off logic IC SAA1305T

PURCHASE OF PHILIPS I2C COMPONENTS

Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the

components in the I2C system provided the system conforms to the I2C specification defined by

Philips. This specification can be ordered using the code 9398 393 40011.

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed

without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license

under patent- or other industrial or intellectual property rights.

Philips Semiconductors – a world wide company

Contact information

For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825

For sales ofﬁces addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.

Printed in The Netherlands R32/02/pp32 Date of release: 2004 Jan 15 Document order number: 9397 750 12586