INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: * The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC * The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF40174B MSI Hex D-type flip-flop Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconductors Product specification HEF40174B MSI Hex D-type flip-flop buffered outputs (O0 to O5). Information on D0 to D5 is transferred to O0 to O5 on the LOW to HIGH transition of CP if MR is HIGH. When LOW, MR resets all flip-flops (O0 to O5 = LOW) independent of CP and D0 to D5. DESCRIPTION The HEF40174B is a hex edge-triggered D-type flip-flop with six data inputs (D0 to D5), a clock input (CP), an overriding asynchronous master reset input (MR), and six Fig.1 Functional diagram. PINNING D0 to D5 data inputs CP clock input (LOW to HIGH; edge-triggered) MR master reset input (active LOW) O0 to O5 buffered outputs FUNCTION TABLE Fig.2 Pinning diagram. INPUTS CP HEF40174BP(N): 16-lead DIL; plastic (SOT38-1) HEF40174BD(F): 16-lead DIL; ceramic (cerdip) (SOT74) X OUTPUT D MR O H H H L H L X H no change X L L HEF40174BT(D): 16-lead SO; plastic Notes (SOT109-1) 1. H = HIGH state (the more positive voltage) L = LOW state (the less positive voltage) X = state is immaterial ( ): Package Designator North America FAMILY DATA, IDD LIMITS category MSI = positive-going transition See Family Specifications January 1995 = negative-going transition 2 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... Philips Semiconductors Hex D-type flip-flop January 1995 3 Product specification HEF40174B MSI Fig.3 Logic diagram. Philips Semiconductors Product specification HEF40174B MSI Hex D-type flip-flop AC CHARACTERISTICS VSS = 0 V; Tamb = 25 C; CL = 50 pF; input transition times 20 ns VDD V SYMBOL TYPICAL EXTRAPOLATION FORMULA MIN. TYP. MAX. Propagation delays CP On HIGH to LOW 5 10 tPHL 15 5 LOW to HIGH 10 tPLH 15 MR On HIGH to LOW 5 10 tPHL 15 Output transition times HIGH to LOW 5 10 Dn CP Hold time Dn CP Minimum clock pulse width; LOW Minimum MR pulse width; LOW Recovery time for MR Maximum clock pulse frequency 10 12 ns + (0,16 ns/pF) CL 75 155 ns 48 ns + (0,55 ns/pF) CL 30 65 ns 19 ns + (0,23 ns/pF) CL 20 45 ns 12 ns + (0,16 ns/pF) CL 85 175 ns 58 ns + (0,55 ns/pF) CL 35 70 ns 24 ns + (0,23 ns/pF) CL 25 50 ns 17 ns + (0,16 ns/pF) CL 20 40 ns 6 ns + (0,28 ns/pF) CL 60 120 ns 30 60 ns 9 ns + (0,42 ns/pF) CL 20 40 ns 6 ns + (0,28 ns/pF) CL 20 10 ns 5 ns 10 5 ns 5 10 0 ns 5 0 ns 15 5 0 ns 5 70 35 ns 30 15 ns 15 20 10 ns 5 70 35 ns 10 10 thold tWCPL tWMRL 35 15 ns 15 25 10 ns 5 45 25 ns 10 20 10 ns 15 15 5 ns 5 5 11 MHz 15 30 MHz 20 45 MHz 10 tRMR fmax 10 ns + 9 ns + (0,42 ns/pF) CL 10 15 January 1995 45 ns 15 10 tsu 20 60 ns tTLH 5 19 ns + (0,23 ns/pF) CL 120 ns 15 Set-up time 48 ns + (0,55 ns/pF) CL 65 ns 60 5 10 155 ns 30 30 tTHL 15 LOW to HIGH 75 4 10 ns + (1,0 ns/pF) CL (1,0 ns/pF) CL see also waveforms Fig.4 Philips Semiconductors Product specification HEF40174B MSI Hex D-type flip-flop VDD V Dynamic power dissipation per package (P) 5 TYPICAL FORMULA FOR P(W) 3500 fi + (foCL) x VDD2 10 16 000 fi + (foCL) x VDD 2 15 42 000 fi + (foCL) x VDD 2 where fi = input freq. (MHz) fo = output freq. (MHz) CL = load capacitance (pF) (foCL) = sum of outputs VDD = supply voltage (V) Fig.4 Waveforms showing minimum pulse widths for CP and MR, MR to CP recovery time, and set-up time and hold time for Dn to CP. Set-up and hold times are shown as positive values but may be specified as negative values. APPLICATION INFORMATION Some examples of applications for the HEF40174B are: * Shift registers * Buffer/storage register * Pattern generator January 1995 5