1
DATASHEET
Radiation Hardened Dual 36V Precision Single-Supply,
Rail-to-Rail Output, Low-Power Operational Amplifier
ISL70218SRH
The ISL70218SRH is a dual, low-power precision amplifier
optimized for single-supply applications. This op amp features
a common mode input voltage range extending to 0.5V below
the V- rail, a rail-rail differential input voltage range, and
rail-to-rail output voltage swing, which makes it ideal for
single-supply applications where input operation at ground is
important.
This op amp features low power, low offset voltage, and low
temperature drift, making it ideal for applications requiring
both high DC accuracy and AC performance. This amplifier is
designed to operate over a single supply range of 3V to 36V or a
split supply voltage range of +1.8V/-1.2V to ±18V. The
combination of precision and small footprint provides the user
with outstanding value and flexibility relative to similar
competitive parts.
Applications for this amplifier include precision
instrumentation, data acquisition, precision power supply
controls, and industrial controls.
The ISL70218SRH is available in a 10 Ld hermetic ceramic
flatpack and operates over the extended temperature range of
-55°C to +125°C.
Related Literature
•AN1653, “ISL70218SRH Evaluation Board User’s Guide”
Features
• Wide Single and Dual Supply Range . . . . . . . .3V to 36V Max.
• Low Current Consumption . . . . . . . . . . . . . . . . . . 850µA, Typ.
• Low Input Offset Voltage. . . . . . . . . . . . . . . . . . . . . . 40µV, Typ.
• Rail-to-Rail Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <10mV
• Rail-to-Rail Input Differential Voltage Range for Comparator
Applications
• Operating Temperature Range. . . . . . . . . . .-55°C to +125°C
• Below-ground (V-) Input Capability to -0.5V.
• Low Noise Voltage . . . . . . . . . . . . . . . . . . . . . . 5.6nV/Hz, Typ.
• Low Noise Current . . . . . . . . . . . . . . . . . . . . . . 355fA/Hz, Typ.
• Offset Voltage Temperature Drift. . . . . . . . . . . 0.3µV/°C, Typ.
• No Phase Reversal
• Radiation Tolerance
- High Dose Rate. . . . . . . . . . . . . . . . . . . . . . . . . . 100krad(Si))
- SEL/SEB LETTH (VS = ±18V) . . . . . . . . . . 86.4 MeV/mg/cm2
Applications
• Precision Instruments
• Active Filter Blocks
• Data Acquisition
• Power Supply Control
• Industrial Process Control
FIGURE 1. TYPICAL APPLICATION: SINGLE-SUPPLY, LOW-SIDE
CURRENT SENSE AMPLIFIER
FIGURE 2. INPUT OFFSET VOLTAGE vs INPUT COMMON MODE
VOLTAGE, VS = ±15V
IN-
IN+
RF
RREF+
ISL70218SRH
+3V
V-
V+
RIN-
10kΩ
RIN+
10kΩ
-
+
100kΩ
VREF
100kΩ
VOUT
LOAD
RSENSE
GAIN = 10
to 40V
|VOS (µV)|
INPUT COMMON MODE VOLTAGE (V)
-400
-300
-200
-100
0
100
200
300
400
-16 -15 -14 -13 13 14 15 16
+125°C
-40°C
+25°C
-55°C
May 28, 2015
FN7871.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas LLC 2011, 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL70218SRH
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Pin Configuration
ISL70218SRH
(10 LD FLATPACK)
TOP VIEW
10
9
8
7
6
2
3
4
5
1OUT_A
-IN_A
+IN_A
NC
V-
V+
OUT_B
-IN_B
+IN_B
NC
+-
+-
Pin Descriptions
PIN NUMBER PIN NAME EQUIVALENT CIRCUIT DESCRIPTION
1 OUT_A Circuit 2 Amplifier A output
2 -IN_A Circuit 1 Amplifier A inverting input
3 +IN_A Circuit 1 Amplifier A non-inverting input
4NC No connect
5 V- Circuit 1, 2, 3 Negative power supply
6NC No connect
7 +IN_B Circuit 1 Amplifier B non-inverting input
8 -IN_B Circuit 1 Amplifier B inverting input
9 OUT_B Circuit 2 Amplifier B output
10 V+ Circuit 1, 2, 3 Positive power supply
V+
V-
OUT
CIRCUIT 2CIRCUIT 1
V+
V-
CIRCUIT 3
IN-
V+
V-
IN+
CAPACITIVELY
TRIGGERED ESD
CLAMP
Ordering Information
ORDERING NUMBER
PART NUMBER
(Note 1)
TEMP RANGE
(°C)
PACKAGE
(RoHS Compliant)
PKG.
DWG. #
ISL70218SRHMF ISL70218SRHMF -55 to +125 10 Ld Flatpack K10.A
ISL70218SRHF/PROTO ISL70218SRHF/PROTO -55 to +125 10 Ld Flatpack K10.A
ISL70218SRHMX -55 to +125 DIE
ISL70218SRHX/SAMPLE -55 to +125 DIE
ISL70218SRHMEVAL1Z Evaluation Board
NOTE:
1. These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with both
SnPb and Pb-free soldering operations.
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Absolute Maximum Ratings Thermal Information
Maximum Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V
Maximum Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
Maximum Differential Input Voltage . . . . . . . . 36V or V- - 0.5V to V+ + 0.5V
Min/Max Input Voltage . . . . . . . . . . . . . . . . . . . . 36V or V- - 0.5V to V+ + 0.5V
Max/Min Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20mA
Output Short-circuit Duration (1 output at a time) . . . . . . . . . . . . . . Indefinite
ESD Tolerance
Human Body Model (Tested per MIL-PRF-883 3015.7). . . . . . . . . . . 3kV
Machine Model (Tested per JESD22-A115-A) . . . . . . . . . . . . . . . . . . 300V
Charged Device Model (Tested per CDM-22CI0ID). . . . . . . . . . . . . . . 2kV
Thermal Resistance (Typical) JA (°C/W) JC (°C/W)
10 Ld Flatpack Package (Notes 2, 3). . . . . 130 20
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Recommended Operating Conditions
Ambient Operating Temperature Range . . . . . . . . . . . . . .-55°C to +125°C
Maximum Operating Junction Temperature . . . . . . . . . . . . . . . . . .+150°C
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . 3V (+1.8V/-1.2V) to 30V (±15V)
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
2. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
3. For JC, the “case temp” location is the center of the package underside.
Electrical Specifications VS ±15V, VCM = 0, VO = 0V, RL = Open, TA= +25°C, unless otherwise noted. Boldface limits apply over the
operating temperature range, -55°C to +125°C and over a total iodizing dose of 100krad(Si) with exposure at a high dose rate of
50 - 300krad(Si)/s.
PARAMETER DESCRIPTION TEST CONDITIONS
MIN
(Note 4)TYP
MAX
(Note 4)UNIT
VOS Offset Voltage 40 230 µV
290 µV
TCVOS Offset Voltage Drift 0.3 1.4 µV/°C
VOS Input Offset Voltage Match 44 280 µV
365 µV
IOS Input Offset Current -50 4 50 nA
-75 75 nA
IB Input Bias Current -575 -230 nA
-800 nA
VCMIR Common Mode Input Voltage Range Guaranteed by CMRR Test (V-) - 0.5 (V+) + 1.8 V
V- (V+) - 1.8 V
CMRR Common-Mode Rejection Ratio VCM = V- to V+ -1.8V 100 118 dB
VCM = V- to V+ -1.8V 97 dB
PSRR Power Supply Rejection Ratio VS = 3V to 40V,
VCMIR = Valid Input Voltage
105 124 dB
100 -dB
AVOL Open-Loop Gain RL = 10kΩ to ground
VO = -13V to +13V
120 130 dB
115 dB
VOH Output Voltage High,
V+ to VOUT
RL = 10kΩ 110 mV
120 mV
VOL Output Voltage Low,
VOUT to V-
RL = 10kΩ 70 mV
80 mV
ISSupply Current/Amplifier 0.85 1.1 mA
1.4 mA
IS+ Source Current Capability 10 mA
IS- Sink Current Capability 10 mA
VSUPPLY Supply Voltage Range Guaranteed by PSRR 3 40 V
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AC SPECIFICATIONS
GBW Gain Bandwidth Product ACL = 101, VOUT = 100mVP-P;
RL = 2k
4MHz
enp-p Voltage Noise 0.1Hz to 10Hz, VS = ±18V 300 nVP-P
enVoltage Noise Density f = 10Hz, VS = ±18V 8.5 nV/Hz
enVoltage Noise Density f = 100Hz, VS = ±18V 5.8 nV/Hz
enVoltage Noise Density f = 1kHz, VS = ±18V 5.6 nV/Hz
enVoltage Noise Density f = 10kHz, VS = ±18V 5.6 nV/Hz
in Current Noise Density f = 1kHz, VS = ±18V 355 fA/Hz
THD + N Total Harmonic Distortion + Noise 1kHz, G = 1, VO = 3.5VRMS,
RL = 10kΩ
0.0003 %
TRANSIENT RESPONSE
SR Slew Rate AV = 1, RL = 2kΩVO = 10VP-P ±1.2 V/µs
tr, tf, Small
Signal
Rise Time
10% to 90% of VOUT
AV
= 1,
VOUT = 100mVP-P, Rf = 0Ω
R
L
=2k
Ωto VCM
100 ns
Fall Time
90% to 10% of VOUT
AV
= 1,
VOUT = 100mVP-P, Rf = 0Ω
R
L
= 2k
Ωto VCM
100 ns
tsSettling Time to 0.01%
10V Step; 10% to VOUT
AV
= 1,
VOUT = 10VP-P, Rf = 0Ω
R
L
=2k
Ωto VCM
8.5 µs
Electrical Specifications VS ±15V, VCM = 0, VO = 0V, RL = Open, TA= +25°C, unless otherwise noted. Boldface limits apply over the
operating temperature range, -55°C to +125°C and over a total iodizing dose of 100krad(Si) with exposure at a high dose rate of
50 - 300krad(Si)/s. (Continued)
PARAMETER DESCRIPTION TEST CONDITIONS
MIN
(Note 4)TYP
MAX
(Note 4)UNIT
Electrical Specifications VS ±5V, VCM = 0, VO = 0V, TA = +25°C, unless otherwise noted. Boldface limits apply across the operating
temperature range, -55°C to +125°C.
PARAMETER DESCRIPTION TEST CONDITIONS
MIN
(Note 4) TYP
MAX
(Note 4) UNIT
VOS Offset Voltage 40 µV
VOS Input Offset Voltage Match 44 µV
IOS Input Offset Current 4 nA
IB Input Bias Current -230 nA
VCMIR Common Mode Input Voltage Range Guaranteed by CMRR Test (V-) - 0.5 (V+) + 1.8 V
V- (V+) - 1.8 V
CMRR Common-Mode Rejection Ratio VCM = V- - 0.5V to V+ - 1.8
VCM = V- to V+ -1.8V
117 dB
PSRR Power Supply Rejection Ratio VS = 3V to 40V,
VCMIR = Valid Input Voltage
124 dB
AVOL Open-Loop Gain RL = 10kΩ to ground
VO = -3V to +3V
130 dB
VOH Output Voltage High,
V+ to VOUT
RL = 10kΩ 65 mV
70 mV
VOL Output Voltage Low,
VOUT to V-
RL = 10kΩ 38 mV
45 mV
ISSupply Current/Amplifier 0.85 mA
IS+ Source Current Capability 8 mA
IS- Sink Current Capability 8 mA
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AC SPECIFICATIONS
GBW Gain Bandwidth Product 3.2 MHz
enp-p Voltage Noise 0.1Hz to 10Hz 320 nVP-P
enVoltage Noise Density f = 10Hz 9 nV/Hz
enVoltage Noise Density f = 100Hz 5.7 nV/Hz
enVoltage Noise Density f = 1kHz 5.5 nV/Hz
enVoltage Noise Density f = 10kHz 5.5 nV/Hz
in Current Noise Density f = 1kHz 380 fA/Hz
THD + N Total Harmonic Distortion + Noise 1kHz, G = 1, VO = 1.25VRMS,
RL=10kΩ
0.0003 %
TRANSIENT RESPONSE
SR Slew Rate AV = 1, RL = 2kΩVO = 4VP-P ±1 V/µs
tr, tf, Small
Signal
Rise Time
10% to 90% of VOUT
AV
= 1,
VOUT = 100mVP-P, Rf = 0Ω
R
L
=2k
Ωto VCM
100 ns
Fall Time
90% to 10% of VOUT
AV
= 1,
VOUT = 100mVP-P, Rf = 0Ω
R
L
= 2k
Ωto VCM
100 ns
tsSettling Time to 0.01%
4V Step; 10% to VOUT
AV
= 1,
VOUT = 4VP-P, Rf = 0Ω
R
L
=2k
Ωto VCM
4µs
NOTE:
4. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
Electrical Specifications VS ±5V, VCM = 0, VO = 0V, TA = +25°C, unless otherwise noted. Boldface limits apply across the operating
temperature range, -55°C to +125°C.
PARAMETER DESCRIPTION TEST CONDITIONS
MIN
(Note 4) TYP
MAX
(Note 4) UNIT
Post Radiation Characteristics VS ±15V, VCM = 0V, VO = 0V, RL = Open, TA= +25°C, unless otherwise noted. This data is typical
test data post radiation exposure at a rate of 50 to 300rad(Si)/s. This data is intended to show typical parameter shifts due to high dose radiation. These
are not limits nor are they guaranteed.
PARAMETER DESCRIPTION TEST CONDITIONS 50k RAD 75k RAD 100k RAD UNIT
VOS Offset Voltage 35 35 35 µV
IOS Input Offset Current 2 3 5 nA
IBInput Bias Current 200 400 575 nA
CMRR Common-Mode Rejection Ration VCM = -13V to +13V 129 128 127 dB
PSRR Power Supply Rejection Ratio VS = ±2.25V to ±15V 130 130 130 dB
AVOL Open-Loop Gain VO = -13V to +13V
RL = 10kΩ to ground
131.6 131.1 131.1 dB
VOH Output Voltage High
V+ to VOUT
RL = 10kΩ to ground 71 74 76 mV
VOL Output Voltage Low
VOUT to V-
RL = 10kΩ to ground 54 57 59 mV
ISSupply Current/Amplifier 830 830 830 µA
TRANSIENT RESPONSE
SR Slew Rate AV = 10, RL = 2kΩVO = 4VP-P 1.24 1.23 1.22 V/µs
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Low Dose Post Radiation Characteristics VS ±15V, VCM = 0V, VO = 0V, RL = Open, TA= +25°C, unless otherwise noted.
This data is typical test data post radiation exposure at a rate of 10mrad(Si)/s. This data is intended to show typical parameter shifts due to low dose
radiation. These are not limits nor are they guaranteed.
PARAMETER DESCRIPTION TEST CONDITIONS 10k RAD 20k RAD 50k RAD UNIT
VOS Offset Voltage 20 21 15 µV
IOS Input Offset Current 6 8 10 nA
IBInput Bias Current 135 500 1200 nA
ISSupply Current/Amplifier 650 625 615 µA
Typical Performance Curves VS = ±15V, VCM = 0V, RL = Open, unless otherwise specified.
FIGURE 3. VOS vs TEMPERATURE FIGURE 4. INPUT OFFSET VOLTAGE vs INPUT COMMON MODE
VOLTAGE, VS = ±15V
FIGURE 5. IBIAS vs VSFIGURE 6. IBIAS vs TEMPERATURE vs SUPPLY
0
10
20
30
40
50
60
70
80
90
100
-60 -40 -20 0 20 40 60 80 100 120 140 160
VOS (µV)
TEMPERATURE (°C)
VS = ±5V
VS = ±15V
|VOS (µV)|
INPUT COMMON MODE VOLTAGE (V)
-400
-300
-200
-100
0
100
200
300
400
-16 -15 -14 -13 13 14 15 16
+125°C
-40°C
+25°C
-55°C
IBIAS (nA)
-500
-450
-400
-350
-300
-250
-200
-150
-100
-50
0
2 4 6 8 10121416182022242628303234363840
VS (V)
IBIAS (nA)
-400
-350
-300
-250
-200
-150
TEMPERATURE (°C)
-60 -20 0 20 40 60 80 100 120
VS = +40V
-40 140
VS = +3.0V
VS = +4.5V
VS = +10V
V
S
= +30V
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FIGURE 7. CMRR vs TEMPERATURE, VS = ±15V FIGURE 8. CMRR vs TEMPERATURE, VS = ±5V
FIGURE 9. CMRR vs FREQUENCY, VS = ±15V FIGURE 10. PSRR vs TEMPERATURE, VS = ±15V
FIGURE 11. PSRR vs FREQUENCY, VS = ±15V FIGURE 12. PSRR vs FREQUENCY, VS = ±5V
Typical Performance Curves VS = ±15V, VCM = 0V, RL = Open, unless otherwise specified. (Continued)
TEMPERATURE (°C)
CMRR (dB)
110
112
114
116
118
120
122
124
126
128
130
132
-60 -40 -20 0 20 40 60 80 100 120 140 160
CHANNEL-A
CHANNEL-B
TEMPERATURE (°C)
CMRR (dB)
110
112
114
116
118
120
122
124
126
128
130
132
-60 -40 -20 0 20 40 60 80 100 120 140 160
CHANNEL-A
CHANNEL-B
CMRR (dB)
FREQUENCY (Hz)
0
10
20
30
40
50
60
70
80
90
100
110
120
130
140
1m 1 10 100 1k 10k 100k 1M 10M 100M 1G0.1
0.01
VS = ±15V
SIMULATION
-60 -40 -20 0 20 40 60 80 100 120 140 160
TEMPERATURE (°C)
100
105
110
115
120
125
130
135
140
PSRR (dB)
10 100 1k 10k 100k 1M 10M
PSRR (dB)
FREQUENCY (Hz)
-10
0
10
20
30
40
50
60
70
80
90
100
110
120
130
140
VS = ±15V
CL = 4pF
VCM = 1VP-P
RL = 10k
AV = 1
PSRR-
PSRR+
10 100 1k 10k 100k 1M 10M
PSRR (dB)
FREQUENCY (Hz)
-10
0
10
20
30
40
50
60
70
80
90
100
110
120
130
140
VS = ±5V
CL = 4pF
VCM = 1VP-P
RL = 10k
AV = 1
PSRR-
PSRR+
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FIGURE 13. OPEN-LOOP GAIN, PHASE vs FREQUENCY, VS = ±15V FIGURE 14. FREQUENCY RESPONSE vs CLOSED LOOP GAIN
FIGURE 15. GAIN vs FREQUENCY vs RL, VS = ±15V FIGURE 16. GAIN vs FREQUENCY vs RL, VS = ±5V
FIGURE 17. GAIN vs FREQUENCY vs OUTPUT VOLTAGE FIGURE 18. GAIN vs FREQUENCY vs SUPPLY VOLTAGE
Typical Performance Curves VS = ±15V, VCM = 0V, RL = Open, unless otherwise specified. (Continued)
-100
-80
-60
-40
-20
0
20
40
60
80
100
120
140
160
180
200
1m 1 10 100 1k 10k 100k 1M 10M100M 1G
GAIN (dB)
FREQUENCY (Hz)
0.1
VS = ±15V
RL = 1MΩ
0.01
GAIN
PHASE
-10
0
10
20
30
40
50
60
70
1k 10k 100k 1M 10M
GAIN (dB)
FREQUENCY (Hz)
ACL = 1
ACL = 10
ACL = 100
ACL = 1000
100
VS = ±5V & ±15V
CL = 4pF
VOUT = 100mVP-P
RL = 2k
RF = 10kΩ, RG = 100Ω
RF = 10kΩ, RG = 1kΩ
RF = 0, RG = ∞
RF = 10kΩ, RG = 10Ω
FREQUENCY (Hz)
NORMALIZED GAIN (dB)
100k 1M 10M10k1k
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
1
100
VS = ±15V
AV = +1
VOUT = 100mVp-p
CL = 4pF
RL = 1k
RL = 499
RL = 100
RL = 49.9
RL = OPEN, 100k, 10k
FREQUENCY (Hz)
NORMALIZED GAIN (dB)
100k 1M 10M10k1k
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
1
100
VS = ±5V
AV = +1
VOUT = 100mVp-p
CL = 4pF
RL = OPEN, 100k, 10k
RL = 1k
RL = 499
RL = 100
RL = 49.9
FREQUENCY (Hz)
NORMALIZED GAIN (dB)
100k 1M 10M10k1k
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
1
100
VOUT = 1VP-P
VOUT = 500mVP-P
VOUT = 10mVP-P
VOUT = 50mVP-P
VOUT = 100mVP-P
VS = ±5V
AV = +1
RL = INF
CL = 4pF
NORMALIZED GAIN (dB)
FREQUENCY (Hz)
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
1
100 1k 10k 100k 1M 10M
CL = 4pF
RL = 10k
AV = +1
VOUT = 100mVP-P
VS = ±15V
VS = ±1.5V
VS = ±5V
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FIGURE 19. OUTPUT OVERHEAD VOLTAGE vs TEMPERATURE,
VS = ±15V, RL=10k
FIGURE 20. OUTPUT OVERHEAD VOLTAGE vs TEMPERATURE,
VS = ±5V, RL=10k
FIGURE 21. OUTPUT OVERHEAD VOLTAGE HIGH vs LOAD CURRENT,
VS = ±5V and ±15V
FIGURE 22. OUTPUT OVERHEAD VOLTAGE LOW vs LOAD CURRENT, VS
= ±5V and ±15V
FIGURE 23. OUTPUT VOLTAGE SWING vs LOAD CURRENT, VS = ±15V FIGURE 24. OUTPUT VOLTAGE SWING vs LOAD CURRENT, VS = ±5V
Typical Performance Curves VS = ±15V, VCM = 0V, RL = Open, unless otherwise specified. (Continued)
40
50
60
70
80
90
100
-60 -40 -20 0 20 40 60 80 100 120 140 160
V
OH
AND V
OL
(mV)
TEMPERATURE (°C)
VOH
VS = ±15V
RL = 10k
VOL
-60 -40 -20 0 20 40 60 80 100 120 140 160
V
OH
AND V
OL
(mV)
TEMPERATURE (°C)
VOH
VS = ±5V
RL = 10k
VOL
20
22
24
26
28
30
32
34
36
38
40
42
V
+
- VOH (V)
LOAD CURRENT (mA)
0.001
0.01
0.1
1.0
0.001 0.01 0.1 1.0 10
VS = ±5V and ±15V
+125°C
+25°C
-55°C
LOAD CURRENT (mA)
0.001
0.01
0.1
1.0
0.001 0.01 0.1 1.0 10
VS = ±5V and ±15V
VOL - V
-
(V)
+125°C
+25°C
-55°C
V
OH
0
VOL
I-FORCE (mA)
11
12
13
14
15
-15
-14
-13
-12
-11
2218161412108642
10
-10 0°C
-40°C
+25°C
+75°C
+125°C
20 24
-55°C
VS = ±15V
AV = 2
VIN = ±7.5V-DC
RF = RG = 100k
V
OH
VOL
I-FORCE (mA)
1
2
3
4
5
-5
-4
-3
-2
-1
VS = ±5V
AV = 2
VIN = ±2.5V-DC
RF = RG = 100k
0°C
-40°C
+25°C
+75°C
+125°C
-55°C
022181614121086422024
ISL70218SRH
10 FN7871.2
May 28, 2015
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FIGURE 25. SUPPLY CURRENT vs TEMPERATURE vs SUPPLY
VOLTAGE
FIGURE 26. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 27. INPUT NOISE VOLTAGE (en) AND CURRENT (in) vs
FREQUENCY, VS = ±18V
FIGURE 28. INPUT NOISE VOLTAGE (en) AND CURRENT (in) vs
FREQUENCY, VS = ±5V
FIGURE 29. INPUT NOISE VOLTAGE 0.1Hz TO 10Hz, VS= ±18V FIGURE 30. INPUT NOISE VOLTAGE 0.1Hz TO 10Hz, VS= ±5V
Typical Performance Curves VS = ±15V, VCM = 0V, RL = Open, unless otherwise specified. (Continued)
TEMPERATURE (°C)
CURRENT (µA)
400
600
800
1000
1200
1400
1600
-60 -40 -20 0 20 40 60 80 100 120 140 160
VS = ±2.25V
VS = ±15V
VS = ±21V
VSUPPLY (V)
0 2 4 6 8 1012141618202224262830323436384042
0
100
200
300
400
500
600
700
800
900
1000
1100
I
SUPPLY
PER AMPLIFIER (µA)
0.1
1
10
100
0.1
1
10
100
0.1 1 10 100 1k 10k 100k
INPUT NOISE VOLTAGE (nV/√Hz)
FREQUENCY (Hz)
INPUT NOISE CURRENT (fA/√Hz)
VS = ±18V
INPUT NOISE VOLTAGE
INPUT NOISE CURRENT
0.1
1
10
100
0.1
1
10
100
0.1 1 10 100 1k 10k 100k
INPUT NOISE VOLTAGE (nV/√Hz)
FREQUENCY (Hz)
INPUT NOISE CURRENT (fA/√Hz)
INPUT NOISE CURRENT
VS = ±5V
INPUT NOISE VOLTAGE
INPUT NOISE VOLTAGE (nV)
012345678910
TIME (s)
-500
-400
-300
-200
-100
0
100
200
300
400
500
VS = ±18V
AV = 10k
INPUT NOISE VOLTAGE (nV)
012345678910
TIME (s)
-500
-400
-300
-200
-100
0
100
200
300
400
500
VS = ±5V
AV = 10k
ISL70218SRH
11 FN7871.2
May 28, 2015
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FIGURE 31. THD+N vs FREQUENCY vs TEMPERATURE, AV = 1, 10, RL
= 2k
FIGURE 32. THD+N vs FREQUENCY vs TEMPERATURE, AV=1, 10, R
L
= 10k
FIGURE 33. THD+N vs OUTPUT VOLTAGE (VOUT) vs TEMPERATURE, AV
= 1, 10, RL = 2k
FIGURE 34. THD+N vs OUTPUT VOLTAGE (VOUT) vs TEMPERATURE, AV
= 1, 10, RL = 10k
FIGURE 35. LARGE SIGNAL 10V STEP RESPONSE, VS= ±15V FIGURE 36. LARGE SIGNAL 4V STEP RESPONSE, VS= ±5V
Typical Performance Curves VS = ±15V, VCM = 0V, RL = Open, unless otherwise specified. (Continued)
0.0001
0.001
0.01
0.1
10 100 1k 10k 100k
THD + N (%)
FREQUENCY (Hz)
AV = 1
AV = 10
VS = ±15V
CL = 4pF
VOUT = 10VP-P
RL = 2k
C-WEIGHTED
22Hz TO 500kHz
+25°C
-55°C
+25°C
+125°C
-55°C
+125°C
0.0001
0.001
0.01
0.1
10 100 1k 10k 100k
THD + N (%)
FREQUENCY (Hz)
AV = 10
VS = ±15V
CL = 4pF
VOUT = 10VP-P
RL = 10k
C-WEIGHTED
22Hz TO 500kHz +125°C
+25°C
-55°C
AV = 1
-55°C
+25°C
+125°C
0.0001
0.001
0.01
0.1
1.0
0 5 10 15 20 25 30
VOUT (VP-P)
THD + N (%)
AV = 1
C-WEIGHTED
22Hz TO 22kHz
AV = 10
-55°C
VS = ±15V
CL = 4pF
f = 1kHz
RL = 2k
-55°C
+125°C
+25°C
+125°C
+25°C
0.0001
0.001
0.01
0.1
1.0
0 5 10 15 20 25 30
VOUT (VP-P)
THD + N (%)
AV = 1
AV = 10
C-WEIGHTED
22Hz TO 22kHz
VS = ±15V
CL = 4pF
f = 1kHz
RL = 10k
+125°C
+25°C -55°C
+25°C
-55°C +125°C
-6
-4
-2
0
2
4
6
0 102030405060708090100
V
OUT
(V)
TIME (µs)
VS = ±15V
AV = 1
RL = 2k
CL = 4pF
0 102030405060708090100
V
OUT
(V)
TIME (µs)
-2.4
-2.0
-1.6
-1.2
-0.8
-0.4
0
0.4
0.8
1.2
1.6
2.0
2.4
VS = ±5V
AV = 1
RL = 2k
CL = 4pF
ISL70218SRH
12 FN7871.2
May 28, 2015
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FIGURE 37. SMALL SIGNAL TRANSIENT RESPONSE,
VS = ±5V, ±15V
FIGURE 38. NO PHASE REVERSAL
FIGURE 39. POSITIVE OUTPUT OVERLOAD RESPONSE TIME,
VS = ±15V
FIGURE 40. NEGATIVE OUTPUT OVERLOAD RESPONSE TIME,
VS = ±15V
FIGURE 41. POSITIVE OUTPUT OVERLOAD RESPONSE TIME,
VS = ±5V
FIGURE 42. NEGATIVE OUTPUT OVERLOAD RESPONSE TIME,
VS = ±5V
Typical Performance Curves VS = ±15V, VCM = 0V, RL = Open, unless otherwise specified. (Continued)
V
OUT
(V)
TIME (µs)
-100
-80
-60
-40
-20
0
20
40
60
80
100
0 0.20.40.60.81.01.21.41.61.8 2
VS = ±15V
AV = 1
RL = 2k
CL = 4pF
VS = ±5V
AND
-6
-5
-4
-3
-2
-1
0
1
2
3
4
5
6
01234
INPUT AND OUTPUT (V)
TIME (ms)
VS = ±5V
VIN = ±5.9V
INPUT
OUTPUT
OUTPUT (V)
INPUT (mV)
TIME (µs)
0
4
8
12
16
20
0
40
80
120
160
200
0 4 8 1216202428323640
VS = ±15V
AV = 100
VIN = 100mVP-P
OVERDRIVE = 1V
RL = 10k
OUTPUT
INPUT
OUTPUT (V)
INPUT (mV)
TIME (µs)
-20
-16
-12
-8
-4
0
-200
-160
-120
-80
-40
0
0 4 8 12 16 20 24 28 32 36 40
VS = ±15V
AV = 100
VIN = 100mVP-P
OVERDRIVE = 1V
RL = 10k
OUTPUT
INPUT
OUTPUT (V)
INPUT (mV)
TIME (µs)
0
1
2
3
4
5
6
0
10
20
30
40
50
60
0 4 8 1216202428323640
VS = ±5V
AV = 100
VIN = 50mVP-P
OVERDRIVE = 1V
RL = 10k
INPUT
OUTPUT
OUTPUT (V)
INPUT (mV)
TIME (µs)
0 4 8 12 16 20 24 28 32 36 40
-6
-5
-4
-3
-2
-1
0
-60
-50
-40
-30
-20
-10
0
VS = ±5V
AV = 100
VIN = 50mVP-P
OVERDRIVE = 1V
RL = 10k
OUTPUT
INPUT
ISL70218SRH
13 FN7871.2
May 28, 2015
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FIGURE 43. OUTPUT IMPEDANCE vs FREQUENCY, VS = ±15V FIGURE 44. OUTPUT IMPEDANCE vs FREQUENCY, VS = ±5V
FIGURE 45. OVERSHOOT vs CAPACITIVE LOAD, VS= ±15V FIGURE 46. OVERSHOOT vs CAPACITIVE LOAD, VS= ±5V
FIGURE 47. IMAX OUTPUT VOLTAGE vs FREQUENCY FIGURE 48. SHORT CIRCUIT CURRENT vs TEMPERATURE, VS = ±15V
Typical Performance Curves VS = ±15V, VCM = 0V, RL = Open, unless otherwise specified. (Continued)
0.01
0.10
1
10
100
10 100 1k 10k 100k 1M 10M
Z
OUT
(Ω)
FREQUENCY (Hz)
1
VS = ±15V
AV = 1
AV = 10
AV = 100
0.01
0.10
1
10
100
10 100 1k 10k 100k 1M 10M
Z
OUT
(Ω)
FREQUENCY (Hz)
1
VS = ±5V
AV = 1
AV = 10
AV = 100
OVERSHOOT (%)
LOAD CAPACITANCE (nF)
0
10
20
30
40
50
60
0.001 0.010 0.100 1 10 100
VS = ±15V
VOUT = 100mVP-P
AV = 10
AV = 1
AV = -1
OVERSHOOT (%)
LOAD CAPACITANCE (nF)
0
10
20
30
40
50
60
0.001 0.01 0.1 1 10 100
VS = ±5V
VOUT = 100mVP-P
AV = 10
AV = 1
AV = -1
0
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
1k 10k 100k 1M
V
OUT
(V
P-P
)
FREQUENCY (Hz)
VS = ±15V
AV = 1
-60 -40 -20 0 20 40 60 80 100 120 140 160
TEMPERATURE (°C)
10
12
14
16
18
20
22
24
26
28
30
I
SC
(mA)
ISC-SOURCE
VS = ±15V
RL = 10k
ISC-SINK
ISL70218SRH
14 FN7871.2
May 28, 2015
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Applications Information
Functional Description
The ISL70218SRH is a dual, 3.2MHz, single-supply, rail-to-rail
output amplifier with a common mode input voltage range
extending to a range of 0.5V below the V- rail. The input stage is
optimized for precision sensing of ground-referenced signals in
single-supply applications. The input stage is able to handle large
input differential voltages without phase inversion, making this
amplifier suitable for high-voltage comparator applications. The
bipolar design features high open loop gain and excellent DC
input and output temperature stability. This op amp features very
low quiescent current of 850µA, and low temperature drift. The
device is fabricated in a new precision 40V complementary
bipolar DI process and is immune from latch-up for up to a 36V
supply range.
Operating Voltage Range
The op amp is designed to operate over a single supply range of 3V
to 36V or a split supply voltage range of +1.8V/-1.2V to ±18V. The
device is fully characterized at 30V (±15V). Both DC and AC
performance remain virtually unchanged over the complete
operating voltage range. Parameter variation with operating
voltage is shown in the “Typical Performance Curves” beginning on
page 6.
The input common mode voltage to the V+ rail (V+ - 1.8V over the
full temperature range) may limit amplifier operation when
operating from split V+ and V- supplies. Figure 4 shows the
common mode input voltage range variation over temperature.
Input Stage Performance
The ISL70218SRH PNP input stage has a common mode input
range extending up to 0.5V below ground at +25°C. Full amplifier
performance is guaranteed for input voltage down to ground (V-)
over the -55°C to +125°C temperature range. For common mode
voltages down to -0.5V below ground (V-), the amplifiers are fully
functional, but performance degrades slightly over the full
temperature range. This feature provides excellent CMRR, AC
performance, and DC accuracy when amplifying low-level,
ground-referenced signals.
The input stage has a maximum input differential voltage equal
to a diode drop greater than the supply voltage and does not
contain the back-to-back input protection diodes found on many
similar amplifiers. This feature enables the device to function as
a precision comparator by maintaining very high input
impedance for high-voltage differential input comparator
voltages. The high differential input impedance also enables the
device to operate reliably in large signal pulse applications,
without the need for anti-parallel clamp diodes required on
MOSFET and most bipolar input stage op amps. Thus, input
signal distortion caused by nonlinear clamps under high slew
rate conditions is avoided.
In applications in which one or both amplifier input terminals is
at risk of exposure to voltages beyond the supply rails,
current-limiting resistors may be needed at each input terminal
(see Figure 49, RIN+, RIN-) to limit current through the
power-supply ESD diodes to 20mA.
Output Drive Capability
The bipolar rail-to-rail output stage features low saturation levels
that enable an output voltage swing to less than 15mV when the
total output load (including feedback resistance) is held below
50µA (Figures 21 and 22). With ±15V supplies, this can be
achieved by using feedback resistor values >300kΩ.
The output stage is internally current limited. Output current limit
over temperature is shown in Figures 23 and 24. The amplifiers
can withstand a short circuit to either rail as long as the power
dissipation limits are not exceeded. This applies to only one
amplifier at a time for the dual op amp. Continuous operation
under these conditions may degrade long-term reliability.
The amplifiers perform well when driving capacitive loads
(Figures 45 and 46). The unity gain, voltage follower (buffer)
configuration provides the highest bandwidth but is also the
most sensitive to ringing produced by load capacitance found in
BNC cables. Unity gain overshoot is limited to 35% at
capacitance values to 0.33nF. At gains of 10 and higher, the
device is capable of driving more than 10nF without significant
overshoot.
Output Phase Reversal
Output phase reversal is a change of polarity in the amplifier
transfer function when the input voltage exceeds the supply
voltage. The ISL70218SRH is immune to output phase reversal
out to 0.5V beyond the rail (VABS MAX) limit (Figure 38).
Single Channel Usage
The ISL70218SRH is a dual op amp. If the application requires
only one channel, the user must configure the unused channel to
prevent it from oscillating. The unused channel oscillates if the
input and output pins are floating. This results in
higher-than-expected supply currents and possible noise
injection into the channel being used. The proper way to prevent
oscillation is to short the output to the inverting input, and
ground the positive input (Figure 50).
FIGURE 49. INPUT ESD DIODE CURRENT LIMITING
-
+
RIN-
RL
VIN-
V+
V-
RIN+
VIN+
RF
RG
FIGURE 50. PREVENTING OSCILLATIONS IN UNUSED CHANNELS
-
+
ISL70218SRH
15 FN7871.2
May 28, 2015
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Power Dissipation
It is possible to exceed the +150°C maximum junction
temperatures under certain load and power supply conditions. It
is therefore important to calculate the maximum junction
temperature (TJMAX) for all applications to determine if power
supply voltages, load conditions, or package type need to be
modified to remain in the safe operating area. These parameters
are related using Equation 1:
where
•PD
MAXTOTAL is the sum of the maximum power dissipation of
each amplifier in the package (PDMAX)
•T
MAX = Maximum ambient temperature
•ΘJA = Thermal resistance of the package
PDMAX for each amplifier can be calculated using Equation 2:
where
•PD
MAX = Maximum power dissipation of one amplifier
•V
S = Total supply voltage
•I
qMAX = Maximum quiescent supply current of one amplifier
•V
OUTMAX = Maximum output voltage swing of the application
•R
L = Load resistance
TJMAX TMAX JAxPDMAXTOTAL
+= (EQ. 1)
PDMAX VSIqMAX VS
- VOUTMAX VOUTMAX
RL
----------------------------
+=(EQ. 2)
ISL70218SRH
16 FN7871.2
May 28, 2015
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Package Characteristics
Weight of Packaged Device
0. 4029 grams (Typical)
Lid Characteristics
Finish: Gold
Potential: Floating
Die Characteristics
Die Dimensions
1565µm x 2125µm (62mils x 84mils)
Thickness: 355µm ± 25µm (14 mils ± 1 mil)
Interface Materials
GLASSIVATION
Type: Nitrox
Thickness: 15kÅ
TOP METALLIZATION
Type: AlCu (99.5%/0.5%)
Thickness: 30kÅ
BACKSIDE FINISH
Silicon
PROCESS
PR40
ASSEMBLY RELATED INFORMATION
SUBSTRATE POTENTIAL
Unbiased
ADDITIONAL INFORMATION
WORST CASE CURRENT DENSITY
< 2 x 105 A/cm2
Metallization Mask Layout
PLACE HOLDER
OUT_A
-IN_A
+IN_A
V-
V+
OUT_A
-IN_B
+IN_B
ISL70218SRH
17
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7871.2
May 28, 2015
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About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you
have the latest revision.
DATE REVISION CHANGE
May 28, 2015 FN7871.2 Updated Title from “Rad Hard” to “Radiation Hardened” and changed amplifiers to amplifier.
Removed "Low Dose Rate . . . 100krad(Si)" from “Features” on page 1.
Removed MSL note from ordering information on page 2.
Added "..and over a total iodizing dose of 100krad(Si) with exposure at a high dose rate of 50 - 300krad(Si)/s."
to common conditions of “Electrical Specifications” table beginning on page 3.
Updated by adding “Low Dose” to “Post Radiation Characteristics” on page 6.
Updated “Product information” to “About Intersil”
August 17, 2011 FN7871.1 Removed coming soon from parts ISL70218SRHMF AND ISL70218SRHMX AND ISL70218SRHX/SAMPLE in
“Ordering Information” table.
August 9, 2011 FN7871.0 Initial Release
ISL70218SRH
18 FN7871.2
May 28, 2015
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Ceramic Metal Seal Flatpack Packages (Flatpack)
NOTES:
1. Index area: A notch or a pin one identification mark shall be locat-
ed adjacent to pin one and shall be located within the shaded
area shown. The manufacturer’s identification shall not be used
as a pin one identification mark. Alternately, a tab (dimension k)
may be used to identify pin one.
2. If a pin one identification mark is used in addition to a tab, the lim-
its of dimension k do not apply.
3. This dimension allows for off-center lid, meniscus, and glass
overrun.
4. Dimensions b1 and c1 apply to lead base metal only. Dimension
M applies to lead plating and finish thickness. The maximum lim-
its of lead dimensions b and c or M shall be measured at the cen-
troid of the finished lead surfaces, when solder dip or tin plate
lead finish is applied.
5. N is the maximum number of terminal positions.
6. Measure dimension S1 at all four corners.
7. For bottom-brazed lead packages, no organic or polymeric mate-
rials shall be molded to the bottom of the package to cover the
leads.
8. Dimension Q shall be measured at the point of exit (beyond the
meniscus) of the lead from the body. Dimension Q minimum
shall be reduced by 0.0015 inch (0.038mm) maximum when sol-
der dip lead finish is applied.
9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
10. Controlling dimension: INCH.
-D-
-C-
0.004 H A - B
MD
S S
-A- -B-
0.036 H A - B
MD
S S
e
E
A
Q
L
A
E1
SEATING AND
LE2
E3 E3
BASE PLANE
-H-
b
C
S1
M
c1
b1
(c)
(b)
SECTION A-A
BASE
LEAD FINISH
METAL
PIN NO. 1
ID AREA
A
M
D
K10.A MIL-STD-1835 CDFP3-F10 (F-4A, CONFIGURATION B)
10 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.045 0.115 1.14 2.92 -
b 0.015 0.022 0.38 0.56 -
b1 0.015 0.019 0.38 0.48 -
c 0.004 0.009 0.10 0.23 -
c1 0.004 0.006 0.10 0.15 -
D - 0.290 - 7.37 3
E 0.240 0.260 6.10 6.60 -
E1 -0.280-7.11 3
E2 0.125 - 3.18 - -
E3 0.030 - 0.76 - 7
e 0.050 BSC 1.27 BSC -
k 0.008 0.015 0.20 0.38 2
L 0.250 0.370 6.35 9.40 -
Q 0.026 0.045 0.66 1.14 8
S1 0.005 - 0.13 - 6
M - 0.0015 - 0.04 -
N10 10-
Rev. 0 3/07
Mouser Electronics
Authorized Distributor
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ISL70218SRHMEVAL1Z