Document Number: MC10XS4200
Rev. 6.0, 12/2013
Freescale Semiconductor
Advance Information
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2012-2013. All rights reserved.
Dual
24 V,
10 mOhm High Side
Switch
The 10XS4200 device is part of a 24 V dual high side switch product
family with integrated control, and a high number of protective and
diagnostic functions. It has been designed for truck, bus, and industrial
applications. The low RDS(ON) channels (<10 m) can control different
load types; bulbs, solenoids, or DC motors. Control, device
configuration, and diagnostics are performed through a 16-bit serial
peripheral interface (SPI), allowing easy integration into existing
applications. This device is powered by SMARTMOS technology.
Both channels can be controlled individually by external or internal
clock signals, or by direct inputs. Using the internal clock allows fully
autonomous device operation. Programmable output voltage slew-
rates (individually programmable) helps improve electromagnetic
compatability (EMC) performance. To avoid shutting off the device
upon inrush current, while still being able to closely track the load
current, a dynamic overcurrent threshold profile is featured. Switching
current of each channel can be sensed with a programmable sensing
ratio. Whenever communication with the external microcontroller is
lost, the device enters a Fail-safe operation mode, but remains
operational, controllable, and protected.
Features
Two fully protected 10 m (@ 25 °C) high side switches
•Up to 6.0 A steady state current per channel
Separate bulb and DC motor latched overcurrent handling
Individually programmable internal/external PWM clock signals
Overcurrent, short-circuit, and overtemperature protection with
programmable autoretry functions
Accurate temperature and current sensing
OpenLoad detection (channel in OFF and ON state), also for LED
applications (7.0 mA typ.)
Normal operating range: 8.0 - 36 V, extended range: 6.0 - 58 V
•3.3 V and 5.0 V compatible 16-bit SPI port for device control,
configuration and diagnostics at rates up to 8.0 MHz
Figure 1. Simplified Application Diagram
FK SUFFIX (PB-FREE)
98ASA00428D
23 PIN PQFN (12 X12 mm)
10XS4200
HIGH SIDE SWITCH
MCU
V
DD
CLOCK
FSB
SCLK
CSB
SO
RSTB
SI
IN0
IN1
CSNS GND
VDD VPWR
HS0
HS1
LOAD
I/O
SCLK
CSB
SI
I/O
SO
I/O
I/O
A/D
GND
LOAD
M
CONF0
CONF1
FSOB
I/O
A/D SYNC
I/O
10XS4200
V
DD
V
PWR
Analog Integrated Circuit Device Data
2Freescale Semiconductor
10XS4200
ORDERABLE PARTS
ORDERABLE PARTS
Table 1. Simplified Orderable Part VariationsTable
Orderable Part Number Version Reverse Battery
voltage (V)
Negative clamp
voltage (V) Slew Rates Product ID Bit
Overcurrent
Profile
Configuration
MC10XS4200FK --28 -24
Standard 00
Hardware
MC10XS4200BFK (1) B (2)
-32 -32 Hardware +
Software
MC10XS4200BAFK (1) BA (2), (3) Accelerated 10
Notes:
1. Recommended for all new designs.
2. Version B and BA devices can support negative voltage battery and ground loss down to -32V, the overcurrent profile can be selected
by SPI, errata sheet MC24XS4ER is no more valid.
3. Version BA devices have faster slew rates to reduce switching losses.
Analog Integrated Circuit Device Data
Freescale Semiconductor 3
10XS4200
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
Figure 2. Internal Block Diagram
GND
Overtemperature
Detect.
Control
Severe Short-circuit
Selectable Overcurrent
Internal
Regulator
Selectable Slew Rate
Gate Driver
Over/Undervoltage
Protections
HS0
VPWRVDD
CSB
SCLK
SO
SI
RSTB
CLOCK
FSB
IN0
HS1
HS0
HS1
IN1
Detection
Output
CSNS
IDWN
IUP
OpenLoad
Detect
Detection
Temperature
Feedback
VREG
Short-circuit to
Charge
VDD Failure
Detection
Calibratable
Oscillator * PWM
Module
Drain/Gate
Clamp
RDWN
Current Sense
Analog MUX
Overtemperature
Prewarning
Pump
POR
FSOB
CONF0
CONF1
IUP
VREG
IDWN
SYNC
IDWN
VPWR detec.
Logic
*
*blocks marked in grey have implemented
independently for each of both channels
Analog Integrated Circuit Device Data
4Freescale Semiconductor
10XS4200
TABLE OF CONTENTS
TABLE OF CONTENTS
Orderable Parts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Internal Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Static Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Pin Assignment and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Functional Internal Block Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Functional Device Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Operation and Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Protection and Diagnostic Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Logic Commands and SPI Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Typical Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Soldering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Analog Integrated Circuit Device Data
Freescale Semiconductor 5
10XS4200
PIN ASSIGNMENT
PIN ASSIGNMENT
Figure 3. 10XS4200 Pin Assignments
The function of each pin is described in the section Functional Description
Table 2. 10XS4200 Pin Description
Pin
Number Pin Name Function Formal Name Definition
1CSNS Output Output Current/
Temperature
Monitoring
This pin either outputs a current proportional to the channel’s output current or
a voltage proportional to the temperature of the GND pin (pin 14). Selection
between current and temperature sensing, as well as setting the current
sensing sensitivity, are performed through the SPI interface. An external pull-
down resistor must be connected between CSNS and GND.
2
3
IN0
IN1
Input Direct Inputs The IN[0 : 1] input pins are used to directly control the switching state of both
switches and consequently the voltage on the HS0 : HS1 output pins. The pins
are connected to GND by internal pull-down resistors
4FSOB Output Fail-safe Output
(Active Low)
FSOB is asserted (active-low) upon entering Fail-safe mode (see Functional
Description) This open-drain output requires an external pull-up resistor to
VPWR
5
6
CONF0
CONF1
Input Configuration Input The CONF[0 : 1] input pins are used to select the appropriate overcurrent
detection profile (bulb /DC motor) for each of both channels. CONF requires a
pull-down resistor to GND.
7FSB Output Fault Status
(Active Low)
This open-drain output pin (external pull-up resistor to VDD is required) is set
when the device enters Fault mode (see Fault Mode)
8CLOCK Input PWM Clock The clock input gives the time-base when the device is operated in external
clock/internal PWM mode.
This pin has an internal pull-down current source.
9RSTB Input Reset This input pin is used to initialize the device’s configuration - and fault registers.
Reset puts the device in Sleep mode (low current consumption) provided it is
not stimulated by direct input signals.This pin is connected to GND by an
internal pull-down resistor.
10 CSB Input Chip Select
(Active Low)
This input pin is connected to the SPI chip-select output of an external micro-
controller. CSB is internally pulled up to VDD by a current source IUP.
Transparent Top View
1
12
10
9
8
7
6
5
4
3
2
2019
15
14
13
HS0HS1
CSNS
IN1
FSOB
CONF0
CONF1
FSB
RSTB
CSB
SCLK
SI
VDD
GND
VPWR
11
23
22
21
16
17
18
CLOCK
IN0
SYNC
GND
VPWR
SO
GND
VPWR
Analog Integrated Circuit Device Data
6Freescale Semiconductor
10XS4200
PIN ASSIGNMENT
11 SCLK Input Serial Clock This input pin is to be connected to an external SPI Clock signal. The SCLK
pin is internally connected to a pull-down current source IDWN
12 SI Input Serial Input This input pin receives the SPI input data from an external device (micro-
controller or another extreme switch device in case of daisy-chaining). The SI
pin is internally connected to a pull-down current source IDWN
13 VDD Power Digital Drain Voltage This is the positive supply pin of the SPI interface.
16 SO Output Serial Output This output pin transmits SPI data to an external device (external micro-
controller or the SI pin of the next SPI device in case of daisy-chaining). The
pin doesn’t require external pull-up or pull-down resistors, but a series resistor
is recommended to limit current consumption in case of GND disconnection
14, 17, 22 GND Ground Ground These pins, internally connected, are the ground pins for the logic and analog
circuitry. It is recommended to also connect these pins on the PCB.
15,18,21 VPWR Power Positive Power Supply These pins, internally connected, supply both the device’s power and control
circuitry (except the SPI port). The drain of both internal MOSFET switches is
connected to them. Pin 15 is the device’s primary thermal pad.
19
20
HS1
HS0
Output Power Switch Outputs Output pins of the switches, to be connected to the load.
23 SYNC Output Output Current
Monitoring
Synchronization
This output pin is asserted (logic low) when the Current Sense (CS) output
signal is within the specified accuracy range. Reading the SYNC pin allows the
external microprocessor to synchronize to the device when operating in
autonomous operating mode. SYNC is open-drain and requires a pull-up
resistor to VDD.
Table 2. 10XS4200 Pin Description (continued)
Pin
Number Pin Name Function Formal Name Definition
Analog Integrated Circuit Device Data
Freescale Semiconductor 7
10XS4200
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 3. Maximum Ratings
All voltages are relative to ground unless mentioned otherwise. Exceeding these ratings may cause permanent damage.
Parameter Symbol Maximum ratings Unit
ELECTRICAL RATINGS
VPWR Supply Voltage Range
Load Dump at 25 °C (500 ms)
Reverse Battery at 25 °C
10XS4200FK
10XS4200BFKand 10XS4200BAFK
Fast Negative Transient Pulses (ISO 7637-2 pulse #1, VPWR=14V & Ri=10)
VPWR
58
-28
-32
-60
V
VDD Supply Voltage Range VDD -0.3 to 5.5 V
Voltage on Input pins (4) (except IN[0:1]) and Output pins (5) (except HS[0:1]) VMAX,LOGIC(4) -0.3 to 5.5 V
Voltage on Fail-safe Output (FSOB) VFSO -0.3 to 58 V
Voltage on SO pin VSO -0.3 to VDD+0.3 V
Voltage (continuous, max. allowable) on IN[0:1] Inputs VIN,MAX 58 V
Voltage (continuous, max. allowable) on output pins (HS [0:1])
10XS4200FK
10XS4200BFK and 10XS4200BAFK
VHS[0:1]
-28 to 58
-32 to 58
V
Rated Continuous Output Current per channel(6) IHS[0:1] 6.0 A
Maximum allowable energy dissipation per channel and two parallel channels,
single-pulse method(7) ECL [0:1]_SING 128 mJ
Notes:
4. Concerned Input pins are: CONF[0:1], RSTB, SI, SCLK, Clock, and CSB.
5. Concerned Output pins are: CSNS, SYNC, and FSB.
6. Output current rating valid as long as maximum junction temperature is not exceeded. For computation of the maximum allowable output
current, the thermal resistance of the package & the underlying heatsink must be taken into account
7. Single pulse Energy dissipation, Single-pulse short-circuit method (LL = 0.5 mH, R = 48 mVPWR = 28 V, TJ = 150 C initial).
Analog Integrated Circuit Device Data
8Freescale Semiconductor
10XS4200
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL RATINGS (CONTINUED)
ESD Voltage(8)
Human Body Model (HBM) for HS[0:1], VPWR and GND
Human Body Model (HBM) for other pins
Charge Device Model (CDM)
Package Corner pins (1, 13, 19, 20)
All Other pins
VESD1
VESD2
VESD3
VESD4
± 8000
± 2000
± 750
± 500
V
THERMAL RATINGS
Operating Temperature
Ambient
Junction
TA
TJ
- 40 to 125
- 40 to 150
C
Storage Temperature TSTG - 55 to 150 C
Thermal Resistance Junction to Case Bottom/ VPWR Flag Surface RJC 0.22 C/ W
Peak package reflow temperature during reflow(8),(10) TPPRT Note 10 C
Notes:
8. ESD testing is performed in accordance with the Human Body Model (HBM) (CZAP = 100 pF, RZAP = 1500 ), and the Charge Device
Model (CDM), Robotic (CZAP = 4.0 pF).
9. Pin soldering temperature limit is for 40 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
10. Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020. For Peak Package Reflow
Temperature and Moisture Sensitivity Levels (MSL), Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes
and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics.
Table 3. Maximum Ratings (continued)
All voltages are relative to ground unless mentioned otherwise. Exceeding these ratings may cause permanent damage.
Parameter Symbol Maximum ratings Unit
Analog Integrated Circuit Device Data
Freescale Semiconductor 9
10XS4200
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 4. Static Electrical Characteristics
Unless specified otherwise: 8.0 V VPWR 36 V, 3.0 V VDD 5.5 V, - 40 C TA 125 C, GND = 0 V. Typical values are
average values evaluated under nominal conditions TA = 25 °C, VPWR = 28 V & VDD = 5.0 V, unless specified otherwise.
parameter Symbol Min Typ Max Unit
SUPPLY ELECTRICAL CHARACTERISTICS
Supply Voltage Range:
Full Specification compliant
Extended Mode(11)
VPWR
8.0
6.0
24
36
58
V
VPWR Supply Current, device in wake-up mode, channel On, OpenLoad
outputs in ON-state, HS[0 : 1] open, IN[0:1] > VIH
10XS4200FK and 10XS4200BFK
10XS4200BAFK
IPWR(ON)
6.5
6.5
8.0
8.5
mA
VPWR Supply Current, device in wake-up mode (Standby), channel Off
OpenLoad in OFF-state Detection Disabled, HS[0 : 1] shorted to ground
with VDD = 5.5 V and RSTB > VWAKE
IPWR(SBY)
6.5 8.0
mA
Sleep State Supply Current
VPWR = 24 V, RSTB = IN[0:1] < VWAKE, HS[0 : 1] connected to ground
TA = 25 °C
TA = 125 °C
IPWR(SLEEP)
3.0
10.0
60.0
A
VDD Supply Voltage VDD(ON) 3.0 5.5 V
VDD Supply Current at VDD = 5.5 V
No SPI Communication
8.0 MHz SPI Communication(12)
IDD(ON)
5.0
2.2
mA
VDD Sleep State Current at VDD = 5.5 V with or without VPWR IDD(SLEEP) 5.0 A
Overvoltage Shutdown Threshold VPWR(OV) 39 42 45.5 V
Overvoltage Shutdown Hysteresis VPWR(OVHYS) 0.2 0.8 1.5 V
Undervoltage Shutdown Threshold(13) VPWR(UV) 5.0 6.0 V
VPWR Power-On-Reset (POR) Voltage Threshold(13) VPWR(POR) 2.2 2.6 4.0 V
VDD Power-On-Reset (POR) Voltage Threshold(13) VDD(POR) 1.5 2.0 2.5 V
VDD Supply Failure Voltage Threshold (assumed VPWR > VPWR(UV))VDD(FAIL) 2.2 2.5 2.8 V
Notes
11. In extended mode, several device functions (channel control, RDS(ON) and overtemperature protection) are guaranteed, but compliance
with the specified values in this document is not. Below 6.0 V, the device is only protected from overheating (thermal shutdown). Above
VPWR(OV), the channels can only be turned ON when the overvoltage detection function has been disabled.
12. Typical value guaranteed per design.
13. When the device recovers from undervoltage and returns to normal mode (6.0 V < VPWR < 58 V) before the end of the auto-retry period
(see Auto-retry), the device performs normally. When VPWR drops below VPWR(UV), undervoltage is detected see Undervoltage Fault
(Latchable Fault) and EMC Performances.
Analog Integrated Circuit Device Data
10 Freescale Semiconductor
10XS4200
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
ELECTRICAL CHARACTERISTICS OF THE OUTPUT STAGE (HS0 AND HS1)
ON-Resistance, Drain-to-Source (IHS = 3.0 A, TJ = 25 °C)
CSNS_ratio = 0
VPWR = 8.0 V
VPWR = 28 V
VPWR = 36 V
RDS(ON)25
10
10
10
m
ON-Resistance, Drain-to-Source (IHS = 3.0 A,TJ = 150 °C)
CSNS_ratio = 0
VPWR = 8.0 V
VPWR = 28 V
VPWR = 36 V
RDS(ON)150
18
18
18
m
ON-Resistance, Drain-to-Source difference from one channel to the other
in parallel mode (IHS = 1.0 A,TJ = 150 °C) CSNS_ratio = X
RDS(ON)150
-0.8 +0.8 m
ON-Resistance, Source-Drain (IHS = -3.0 A, TJ = 150 °C,
VPWR = -24 V)
RSD(ON)150 18 m
Max. detectable wiring length (2.5 mm²) for severe short-circuit detection
10XS4200FK and 10XS4200BFK
High slew rate selected
Medium slew rate selected:
Low slew rate selected:
10XS4200BAFK
High slew rate selected
Medium slew rate selected:
Low slew rate selected:
LSHORT
20
50
100
20
40
75
85
160
280
75
135
250
140
300
600
130
240
430
cm
Overcurrent Detection thresholds with CSNS_ratio bit = 0 (CSR0) I_OCH1_0
I_OCH2_0
I_OCM1_0
I_OCM2_0
I_OCL1_0
I_OCL2_0
I_OCL3_0
55
35
22
13
9.0
6.0
3.0
66
42
26
16
10.8
7.2
3.6
77
49
31
19.5
12.6
8.4
4.2
A
Overcurrent Detection thresholds with CSNS_ratio bit = 1(CSR1) I_OCH1_1
I_OCH2_1
I_OCM1_1
I_OCM2_1
I_OCL1_1
I_OCL2_1
I_OCL3_1
18.3
11.7
7.2
4.4
3.0
2.0
0.96
22
14.0
8.7
5.3
3.6
2.4
1.2
26.5
16.3
10.1
6.2
4.2
2.8
1.44
A
Table 4. Static Electrical Characteristics (continued)
Unless specified otherwise: 8.0 V VPWR 36 V, 3.0 V VDD 5.5 V, - 40 C TA 125 C, GND = 0 V. Typical values are
average values evaluated under nominal conditions TA = 25 °C, VPWR = 28 V & VDD = 5.0 V, unless specified otherwise.
parameter Symbol Min Typ Max Unit
Analog Integrated Circuit Device Data
Freescale Semiconductor 11
10XS4200
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
ELECTRICAL CHARACTERISTICS OF THE OUTPUT STAGE (HS0 AND HS1) (CONTINUED)
Output pin leakage Current in sleep state (positive value = outgoing)
10XS4200FK
VHS,OFF = 0 V (VHS,OFF = output voltage in OFF state)
VHS,OFF = VPWR, device in sleep state (VPWR = 24 V)
10XS4200BFK and 10XS4200BAFK
VHS,OFF = 0 V (VHS,OFF = output voltage in OFF state)
VHS,OFF = VPWR, device in sleep state (VPWR = 24 V)
VHS,OFF = VPWR, device in sleep state (VPWR = 36 V)
IOUT_LEAK
-40.0
-120
-1400
+16
+5.0
+16
+5.0
+5.0
µA
Output biasing current in off-state (positive value = outgoing)
10XS4200BFK
with OL_OFF disabled (worst case for VPWR = 36 V, VHS,OFF = 34 V)
Fast slew rate selected
Medium slew rate selected
Slow slew rate selected
10XS4200BAFK
with OL_OFF disabled (worst case for VPWR = 36 V, VHS,OFF = 34 V)
Fast slew rate selected
Medium slew rate selected
Slow slew rate selected
With OL_OFF disabled and ECU ground disconnected (VPWR = 32 V) for
10XS4200B and 10XS4200BA
IOUT_OFF
-620
-440
-330
-770
-520
-390
0
-495
-360
-280
-620
-420
-315
-380
-280
-230
-460
-310
-240
1000
µA
Switch Turn-on threshold for Supply overvoltage (VPWR -GND) VD_GND(CLAMP) 58 66 V
Switch turn-on threshold for Drain-Source overvoltage (measured at
IOUT = 500 mA
VDS(CLAMP) 58 66 V
Current Sensing Ratio (14)
CSNS_ratio bit = 0 (high current mode)
CSNS_ratio bit = 1 (low current mode)
CSR0
CSR1
1/3000
1/1000
Minimum measurable load current with compensated error (16) I_LOAD_MIN 100 mA
CSNS leakage current in OFF state (CSNSx_en = 0, CSNS_ratio bit_x = 0)ICSR_LEAK -4.0 +4.0 µA
Systematic offset error (see Current Sense Errors)
10XS4200FK
10XS4200BFK and 10XS4200BAFK
I_LOAD_ERR_SYS
11
-10
mA
Random offset error I_LOAD_ERR_RAND -150 150 mA
Notes:
14. Current Sense Ratio CSRx = ICSNS / IHS[x]
15. ESRx_ERR=(ICSNS_MEAS / ICSNS_MODEL) -1, with ICSNS_MODEL = (I(HS[x])+ I_LOAD_ERR_SYS) * CSRx , (I_LOAD_ERR_SYS defined above, see
section Current Sense Error Model). With this model, load current becomes: I(HS[x]) = ICSNS / CSRx - I_LOAD_ERR_SYS
16. See note (15), but with ICSNS_MEAS obtained after compensation of I_LOAD_ERR_RAND (see Activation and Use of Offset Compensation).
Further accuracy improvements can be obtained by performing a 1 or 2 point calibration.
Table 4. Static Electrical Characteristics (continued)
Unless specified otherwise: 8.0 V VPWR 36 V, 3.0 V VDD 5.5 V, - 40 C TA 125 C, GND = 0 V. Typical values are
average values evaluated under nominal conditions TA = 25 °C, VPWR = 28 V & VDD = 5.0 V, unless specified otherwise.
parameter Symbol Min Typ Max Unit
Analog Integrated Circuit Device Data
12 Freescale Semiconductor
10XS4200
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
ELECTRICAL CHARACTERISTICS OF THE OUTPUT STAGE (HS0 AND HS1) (CONTINUED)
ESR0 Output Current Sensing Error (%, uncompensated(17) at output
current level (Sense ratio CSR0 selected):
TJ=-40 C
6.0 A
3.0 A
1.5 A
0.75 A
TJ=125C
6.0 A
3.0 A
1.5 A
0.75 A
TJ=25 to 125C
6.0 A
3.0 A
1.5 A
0.75 A
ESR0_ERR
-13
-12
-17
-31
-10
-9.0
-12
-19
-10
-9.0
-12
-22
13
12
17
31
10
9.0
12
19
10
9.0
12
22
%
ESR0 Output Current Sensing Error (% after offset compensation(18) at
output current level (Sense ratio CSR0 selected):
TJ=-40 C
6.0 A
3.0 A
1.5 A
0.75 A
TJ=125C
6.0 A
3.0 A
1.5 A
0.75 A
TJ=25 to 125C
6.0 A
3.0 A
1.5 A
0.75 A
ESR0_ERR(Comp)
-10
-10
-10
-10
-9.0
-8.0
-8.0
-9.0
-9.0
-8.0
-8.0
-9.0
10
10
10
10
9.0
8.0
8.0
9.0
9.0
8.0
8.0
9.0
%
Notes:
17. ESRx_ERR=(ICSNS_MEAS / ICSNS_MODEL) -1, with ICSNS_MODEL = (I(HS[x])+ I_LOAD_ERR_SYS) * CSRx , (I_LOAD_ERR_SYS defined above, see
section Current Sense Error Model). With this model, load current becomes: I(HS[x]) = ICSNS / CSRx - I_LOAD_ERR_SYS
18. See note (17), but with ICSNS_MEAS obtained after compensation of I_LOAD_ERR_RAND (see Activation and Use of Offset Compensation).
Further accuracy improvements can be obtained by performing a 1 or 2 point calibration.
Table 4. Static Electrical Characteristics (continued)
Unless specified otherwise: 8.0 V VPWR 36 V, 3.0 V VDD 5.5 V, - 40 C TA 125 C, GND = 0 V. Typical values are
average values evaluated under nominal conditions TA = 25 °C, VPWR = 28 V & VDD = 5.0 V, unless specified otherwise.
parameter Symbol Min Typ Max Unit
Analog Integrated Circuit Device Data
Freescale Semiconductor 13
10XS4200
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
ELECTRICAL CHARACTERISTICS OF THE OUTPUT STAGE (HS0 AND HS1) (CONTINUED)
ESR1 Output Current Sensing Error (%, uncompensated (19) at output
current level (Sense ratio CSR1 selected):
TJ=-40 C
1.5 A
TJ=125C
1.5 A
TJ=25 to 125C
1.5 A
ESR1_ERR
-15
-12
-12
15
12
12
%
ESR1 Output Current Sensing Error (% (level) after offset
compensation(20) at output current level (Sense ratio CSR1 selected):
TJ=-40 C
1.5 A
0.5 A
0.25 A
0.15 A
TJ=125C
1.5 A
0.5 A
0.25 A
0.15 A
TJ=25 to 125C
1.5 A
0.5 A
0.25 A
0.15 A
ESR1_ERR(Comp)
-10
-11
-18
-29
-8.0
-10
-12
-16
-8.0
-10
-13
-21
10
11
18
29
8.0
10
12
16
8.0
10
13
21
%
ESR0 Output Current Sensing Error in parallel mode (%,
uncompensated(19)) at outputs Current level (Sense ratio CSR0 selected):
TJ=-40 C
6.0 A
3.0 A
TJ=125C
6.0 A
3.0 A
TJ=25 to 125C
6.0 A
3.0 A
ESR0_ERR_PAR
-10
-11
-8.0
-8.0
-8.0
-8.0
10
11
8.0
8.0
8.0
8.0
%
Current Sense Clamping Voltage (condition: R(CSNS) > 10 kOhm) VCL(CSNS) 5.5 7.5 V
Notes:
19. ESRx_ERR=(ICSNS_MEAS / ICSNS_MODEL) -1, with ICSNS_MODEL = (I(HS[x])+ I_LOAD_ERR_SYS) * CSRx , (I_LOAD_ERR_SYS defined above, see
section Current Sense Error Model). With this model, load current becomes: I(HS[x]) = ICSNS / CSRx - I_LOAD_ERR_SYS
20. See note (19), but with ICSNS_MEAS obtained after compensation of I_LOAD_ERR_RAND (see Activation and Use of Offset Compensation).
Further accuracy improvements can be obtained by performing a 1 or 2 point calibration.
Table 4. Static Electrical Characteristics (continued)
Unless specified otherwise: 8.0 V VPWR 36 V, 3.0 V VDD 5.5 V, - 40 C TA 125 C, GND = 0 V. Typical values are
average values evaluated under nominal conditions TA = 25 °C, VPWR = 28 V & VDD = 5.0 V, unless specified otherwise.
parameter Symbol Min Typ Max Unit
Analog Integrated Circuit Device Data
14 Freescale Semiconductor
10XS4200
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
ELECTRICAL CHARACTERISTICS OF THE OUTPUT STAGE (HS0 AND HS1) (CONTINUED)
OpenLoad detection Current threshold in OFF state (21) IOLD(OFF) 30 100 A
OpenLoad Fault Detection Voltage Threshold (21) VOLD(THRES) 4.0 5.5 V
OpenLoad detection Current threshold in ON state (see OpenLoad
Detection In On State (OL_ON)):
CSNS_ratio bit = 0
10XS4200FK
10XS4200BFK and 10XS4200BAFK
CSNS_ratio bit = 1 (fast slew rate SR[1:0] = 10 mandatory for this
function)
IOLD(ON)
120
80
5.0
300
300
7.0
600
600
10
mA
Time period of the periodically activated OpenLoad in ON state detection
for CSNS_ratio bit = 1
tOLLED 105 150 195 ms
Output Shorted-to-VPWR Detection Voltage Threshold (channel in OFF
state)
VOSD(THRES) VPWR-1.2 VPWR-0.8 VPWR-0.4 V
Switch turn-on threshold for Negative Output Voltages (protects against
negative transients) - (measured at IOUT = 100 mA, Channel in OFF state)
10XS4200FK
10XS4200BFK and 10XS4200BAFK
VCL
-35
-38
-24
-32
V
Switch turn-on threshold for Negative Output Voltages difference from
one channel to the other in parallel mode - (measured at IOUT = 100 mA,
Channel in OFF state)
VCL
-2.0 +2.0 V
Switching State (On/Off) discrimination thresholds VHS_TH 0.45*VPWR 0.5*VPWR 0.55*VPWR V
Shutdown temperature (Power MOSFET junction; 6.0 V < VPWR < 58 V) TSD 160 175 190 C
ELECTRICAL CHARACTERISTICS OF THE CONTROL INTERFACE PINS
Logic Input Voltage, High(22) VIH 2.0 5.5 V
Logic Input Voltage, Low(22) VIL -0.3 0.8 V
Wake-up Threshold Voltage (IN[0:1] and RSTB)(23) VWAKE 1.0 2.2 V
Internal Pull-down Current Source (on inputs: CLOCK, SCLK and SI)(24) IDWN 5.0 20 A
Internal Pull-up Current Source (input CSB)(25) IUP_CSB 5.0 20 A
Internal Pull-up Current Source (input CONF[0:1])(26) IUP_CONF 25 100 A
Capacitance of SO, FSB and FSOB pins in Tri-state CSO 20 pF
Internal Pull-down Resistance (RSTB and IN[0:1]) RDWN 125 250 500 k
Input Capacitance(27) CIN 4.0 12 pF
Notes:
21. Minimum required value of OpenLoad impedance for detection of OpenLoad in OFF-state: 200 k.(VOLD(THRES) = VHS @ IOLD(OFF))
22. High and low voltage ranges apply to SI, CSB, SCLK, RSTB, IN[0:1] and CLOCK input signals. The IN[0:1] signals may be derived from
VPWR and can tolerate voltages up to 58 V.
23. Voltage above which the device wakes up
24. Pull-down current-value for VSI > 0.8 V and VSCLK > 0.8 V and VCLOCK > 0.8 V.
25. Pull-up current-value for VCSB < 2.0 V. CSB has an internal pull-up current source connected to VDD.
26. Pins CONF[0:1] are connected to an internal current source, connected itself to an internal voltage regulator (VREG ~ 3.0 V).
27. Input capacitance of SI, CSB, SCLK, RSTB, IN[0:1], CONF[0:1], and CLOCK pins. This parameter is guaranteed by the manufacturing
process but is not tested in production.
Table 4. Static Electrical Characteristics (continued)
Unless specified otherwise: 8.0 V VPWR 36 V, 3.0 V VDD 5.5 V, - 40 C TA 125 C, GND = 0 V. Typical values are
average values evaluated under nominal conditions TA = 25 °C, VPWR = 28 V & VDD = 5.0 V, unless specified otherwise.
parameter Symbol Min Typ Max Unit
Analog Integrated Circuit Device Data
15 Freescale Semiconductor
10XS4200
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
ELECTRICAL CHARACTERISTICS OF THE CONTROL INTERFACE PINS (CONTINUED)
SO High-state Output Voltage
(IOH = 1.0 mA)
VSOH
VDD-0.4
V
SYNC, SO, FSOB and FSB Low-state Output Voltage
(IOL = -1.0 mA)
VSOL
0.4
V
SYNC, SO, CSNS, FSOB and FSB Tri-state Leakage Current:
(0.0 V < V(SO) < VDD, or V(FS) or V(SYNC) = 5.5 V, or V(FSO) = 36 V
or V(CSNS) = 0 V
ISO(LEAK)
- 2.0 0.0 2.0
A
CONF[0:1] Required values of the External Pull-down Resistor
- Lighting applications
- DC motor applications
RCONF
1.0
50
10
Infinite
k
Table 4. Static Electrical Characteristics (continued)
Unless specified otherwise: 8.0 V VPWR 36 V, 3.0 V VDD 5.5 V, - 40 C TA 125 C, GND = 0 V. Typical values are
average values evaluated under nominal conditions TA = 25 °C, VPWR = 28 V & VDD = 5.0 V, unless specified otherwise.
parameter Symbol Min Typ Max Unit
Analog Integrated Circuit Device Data
16 Freescale Semiconductor
10XS4200
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 5. Dynamic Electrical Characteristics
Unless specified otherwise: 8.0 V VPWR 36 V, 3.0 V VDD 5.5 V, - 40 C TA 125 C, GND = 0 V. Typical values are
average values evaluated under nominal conditions TA = 25 °C,VPWR = 28 V & VDD = 5.0 V, unless specified otherwise.
Parameter Symbol Min Typ Max Unit
OUTPUT VOLTAGE SWITCHING CHARACTERISTICS
Rising and Falling edges medium slew rate (SR[1:0] = 00)(28)
10XS4200FK and 10XS4200BFK
VPWR = 16 V
VPWR = 28 V
VPWR = 36 V
10XS4200BAFK
VPWR = 16 V
VPWR = 28 V
VPWR = 36 V
SRR_00
SRF_00
0.164
0.28
0.34
0.25
0.45
0.5
0.65
0.79
0.90
1.1
1.4
1.5
V/s
Rising and Falling edges low slew rate (SR[1:0] = 01)(28)
10XS4200FK and 10XS4200BFK
VPWR = 16 V
VPWR = 28 V
VPWR = 36 V
10XS4200BAFK
VPWR = 16 V
VPWR = 28 V
VPWR = 36 V
SRR_01
SRF_01
0.081
0.14
0.17
0.125
0.225
0.25
0.32
0.395
0.45
0.55
0.7
0.75
V/s
Rising and Falling edges high slew rate / SR[1:0] = 10)(28)
10XS4200FK and 10XS4200BFK
VPWR = 16 V
VPWR = 28 V
VPWR = 36 V
10XS4200BAFK
VPWR = 16 V
VPWR = 28 V
VPWR = 36 V
SRR_10
SRF_10
0.29
0.55
0.68
0.5
0.9
1.0
1.30
1.58
1.80
2.2
2.8
3.0
V/s
Rising/Falling edge slew rate matching (SRR /SRF)
16 V < VPWR < 36 V
SR
0.75 1.0 1.2
Edge slew rate difference from one channel to the other in parallel mode(28)
16 V < VPWR < 36 V
SR[1:0] = 00
SR[1:0] = 01
10XS4200FK and 10XS4200BFK
SR[1:0] = 10
10XS4200BAFK
SR[1:0] = 10
SR
-0.1
-0.06
-0.14
-0.2
0.0
0.0
0.0
0.0
+0.1
+0.06
+0.14
0.2
V/s
Analog Integrated Circuit Device Data
Freescale Semiconductor 17
10XS4200
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
SWITCHING CHARACTERISTICS (CONTINUED)
Output Turn-ON and Turn-OFF Delays (medium slew rate: SR[1:0] = 00)
16 V < VPWR < 36 V(29)
10XS4200FK and 10XS4200BFK
10XS4200BAFK
t
DLY_00
32
20
128
120
s
Output Turn-ON and Turn-OFF Delays (medium slew rate / SR[1:0] = 01)
16 V < VPWR < 36 V(29)
10XS4200FK and 10XS4200BFK
10XS4200BAFK
t
DLY_01
59
40
245
240
s
Output Turn-ON and Turn-OFF Delays (medium slew rate / SR[1:0] = 16)
16 V < VPWR < 36 V(29)
10XS4200FK and 10XS4200BFK
10XS4200BAFK
t
DLY_10
18
10
68
60
s
Turn-ON and Turn-OFF Delay time matching (t
DLY(ON) - t
DLY(OFF))
f
PWM = 400 Hz, 16 V < VPWR < 36 V, duty cycle on IN[x] = 50 %, SR[1:0] = 00
t
RF_00
-25 0.0 25
s
Turn-ON and Turn-OFF Delay time matching (t
DLY(ON) - t
DLY(OFF))
f
PWM = 200 Hz, 16 V < VPWR < 36 V, duty cycle on IN[x] = 50 %, SR[1:0] = 01
10XS4200FK and 10XS4200BAFK
10XS4200BFK
t
RF_01
-50
-90
0.0
0.0
50
90
s
Turn-ON and Turn-OFF Delay time matching (t
DLY(ON) - t
DLY(OFF))
f
PWM = 1.0 kHz, 16 V < VPWR < 36 V, duty cycle on IN[x] = 50 %, SR[1:0] = 10
t
RF_10
-13 0.0 13
s
Notes
28. Rising and Falling edge slew rates specified for a 20 to 80% voltage variation on a 10 resistive load (see Figure 4).
29. Turn-on delay time measured as delay between a rising edge of the channel control signal (IN[0 : 1] = 1 or CSB) and the associated rising
edge of the output voltage up to: VHS[0 : 1] = VPWR / 2 (where RL = 5.0). Turn-OFF delay time is measured as time between a falling
edge of the channel control signal (IN[0 : 1] = 0 or CSB pin) and the associated falling edge of the output voltage up to the instant at which:
VHS[0 : 1] = VPWR / 2 (RL = 5.0 )
Table 5. Dynamic Electrical Characteristics (continued)
Unless specified otherwise: 8.0 V VPWR 36 V, 3.0 V VDD 5.5 V, - 40 C TA 125 C, GND = 0 V. Typical values are
average values evaluated under nominal conditions TA = 25 °C,VPWR = 28 V & VDD = 5.0 V, unless specified otherwise.
Parameter Symbol Min Typ Max Unit
Analog Integrated Circuit Device Data
18 Freescale Semiconductor
10XS4200
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
SWITCHING CHARACTERISTICS (CONTINUED)
Delay time difference from one channel to the other in parallel mode(30)
16 V < VPWR < 36 V
SR[1:0] = 00
10XS4200FK
10XS4200BFK and 10XS4200BAFK
SR[1:0] = 01
10XS4200FK
10XS4200BFK and 10XS4200BAFK
SR[1:0] = 10
10XS4200FK
10XS4200BFK and 10XS4200BAFK
t(DLY)
-21
-25
-40
-50
-11
-12
0.0
0.0
0.0
0.0
0.0
0.0
21
25
40
50
11
12
s
Fault Detection Delay Time(31) tFAULT 5.0 8.0 s
Output Shutdown Delay Time(32) tDETECT 7.0 12 s
Current sense output settling Time for SR[1:0] = 00 (medium slew rate) (33)
10XS4200FK and 10XS4200BFK
16 V < VPWR < 36 V
10XS4200BAFK
16 V < VPWR < 36 V
t
CSNSVAL_00
0.0
0.0
210
200
s
Current sense output settling Time for SR[1:0] = 01(low slew rate) (33)
10XS4200FK and 10XS4200BFK
16 V < VPWR < 36 V
10XS4200BAFK
16 V < VPWR < 36 V
t
CSNSVAL_01
0.0
0.0
310
300
s
Current sense output settling Time for SR[1:0] = 10 (high slew rate) (33)
10XS4200FK and 10XS4200BFK
16 V < VPWR < 36 V
10XS4200BAFK
16 V < VPWR < 36 V
t
CSNSVAL_10
0.0
0.0
175
165
s
SYNC output signal delay for SR[1:0] = 00 (medium SR) (33)
10XS4200FK
10XS4200BFK
10XS4200BAFK
t
SYNCVAL_00
50
50
25
150
160
130
s
Notes:
30. Rising and Falling edge slew rates specified for a 20 to 80% voltage variation on a 10 resistive load (see Figure 4).
31. Time required to detect and report the fault to the FSB pin.
32. Time required to switch off the channel after detection of overtemperature (OT), overcurrent (OC), SC or UV error (time measured
between start of the negative edge on the FSB pin and the falling edge on the output voltage until V(HS[0:1)) = 50% of VPWR
33. Settling time ( = t
CSNSVAL_xx), SYNC output signal delay ( = t
SYNCVAL_xx) and Read-out delay ( = t
SYNREAD_xx) are defined for a stepped
load current (100 mA< I(LOAD)<IOCLX A FOR CSNS_RATIO_S = 1, AND 300 mA< I(LOAD)<IOCLX A_0 FOR CSNS_RATIO_S = 0). (see
Figure 9 and Output Current Monitoring (CSNS))
Table 5. Dynamic Electrical Characteristics (continued)
Unless specified otherwise: 8.0 V VPWR 36 V, 3.0 V VDD 5.5 V, - 40 C TA 125 C, GND = 0 V. Typical values are
average values evaluated under nominal conditions TA = 25 °C,VPWR = 28 V & VDD = 5.0 V, unless specified otherwise.
Parameter Symbol Min Typ Max Unit
Analog Integrated Circuit Device Data
Freescale Semiconductor 19
10XS4200
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
SYNC output signal delay for SR[1:0] = 01 (low SR) (34)
10XS4200FK
10XS4200BFK
10XS4200BAFK
t
SYNCVAL_01
80
80
50
290
320
250
s
SYNC output signal delay for SR[1:0] = 10 (high SR) (34)
10XS4200FK
10XS4200BFK
10XS4200BAFK
t
SYNCVAL_10
24
22
10
80
80
65
s
Recommended sync_to_read delay SR[1:0] = 00 (medium slew rate) (34)
10XS4200FK and 10XS4200BFK
10XS4200BAFK
t
SYNREAD_00
200
150
µs
Recommended sync_to_read delay SR[1:0] = 01 (low slew rate) (34)
10XS4200FK and 10XS4200BFK
10XS4200BAFK
t
SYNREAD_01
200
150
µs
Recommended sync_to_read delay SR[1:0] = 10 (high slew rate) (34)
10XS4200FK and 10XS4200BFK
10XS4200BAFK
t
SYNREAD_10
200
150
µs
Upper overcurrent threshold duration tOCH1
tOCH2
6.0
12.0
8.6
17.2
11.2
22.4
ms
Medium overcurrent threshold duration (CONF = 0; Lighting Profile) tOCM1_L
tOCM2_L
48
96
67
137
87
178
ms
Medium overcurrent threshold duration (CONF = 1; DC motor Profile) tOCM1_M
tOCM2_M
96
245
137
350
178
455
ms
FREQUENCY & PWM DUTY CYCLE RANGES (35)(protections fully operational, see Protective Functions)
Switching Frequency range - Direct Inputs fCONTROL 0.0 1000 Hz
Switching Frequency range - External clock with internal PWM (recommended) fPWM_EXT 20 1000 Hz
Switching Frequency range - Internal clock with internal PWM (recommended) fPWM_INT 60 1000 Hz
Duty Cycle range RCONTROL 0.0 100 %
Notes:
34. Settling time ( = t
CSNSVAL_xx), SYNC output signal delay ( = t
SYNCVAL_xx) and Read-out delay ( = t
SYNREAD_xx) are defined for a stepped
load current (100 mA< I(LOAD)<IOCLX A FOR CSNS_RATIO_S = 1, AND 300 mA< I(LOAD)<IOCLX A_0 FOR CSNS_RATIO_S = 0). (see
Figure 9 and Output Current Monitoring (CSNS))
35. In Direct Input mode, the lower frequency limit is 0 Hz with RSTB=5.0 V and 4.0 Hz with RSTB=0 V. Duty-cycle applies to instants at which
VHS = 50% VPWR. For low duty cycle values, the effective value also depends on the value of the selected slew rate.
Table 5. Dynamic Electrical Characteristics (continued)
Unless specified otherwise: 8.0 V VPWR 36 V, 3.0 V VDD 5.5 V, - 40 C TA 125 C, GND = 0 V. Typical values are
average values evaluated under nominal conditions TA = 25 °C,VPWR = 28 V & VDD = 5.0 V, unless specified otherwise.
Parameter Symbol Min Typ Max Unit
Analog Integrated Circuit Device Data
20 Freescale Semiconductor
10XS4200
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
AVAILABILITY DIAGNOSTIC FUNCTIONS OVER DUTY-CYCLE AND SWITCHING FREQUENCY
(protection & diagnostics both fully operational, see Diagnostic Features for the exact boundary values)
Available Duty Cycle Range, fPWM = 1.0 kHz high slew rate (36)
OL_OFF
OL_ON
OS
RPWM_1K_H
0.0
35
0.0
62
100
90
%
Available Duty Cycle Range, fPWM = 400 Hz, medium slew rate mode(36)
OL_OFF
OL_ON
OS
RPWM_400_M
0.0
21
0.0
81
100
88
%
Available Duty Cycle Range, fPWM = 400 Hz, high slew rate mode (36)
OL_OFF
OL_ON
OS
RPWM_400_H
0.0
14
0.0
84
100
95
%
Available Duty Cycle Range, fPWM = 200 Hz, low slew rate mode(36)
OL_OFF
OL_ON
OS
RPWM_200_L
0.0
15
0.0
86
100
93
%
Available Duty Cycle Range, fPWM = 200 Hz, medium slew rate mode(36)
OL_OFF
OL_ON
OS
RPWM_200_M
0.0
11
0.0
90
100
94
%
Available Duty Cycle Range, fPWM = 100 Hz in low slew rate mode(36)
OL_OFF
OL_ON
OS
RPWM_100_L
0.0
8.0
0.0
93
100
96
%
Deviation of the internal clock PWM frequency after Calibration(37) AFPWM(CAL) -10 +10 %
Default output frequency when using an uncalibrated oscillator fPWM(0) 280 400 520 Hz
Minimal required Low Time during Calibration of the Internal Clock through CSB t
CSB(MIN) 1.0 1.5 2.0 s
Maximal allowed Low Time during Calibration of the Internal Clock through CSB t
CSB(MAX) 70 100 130 s
Recommended external Clock Frequency Range (external clock/PWM Module) fCLOCK 15 512 kHz
Upper detection threshold for external Clock frequency monitoring f
CLOCK(MAX) 512 730 930 kHz
Lower detection threshold for external Clock frequency monitoring f
CLOCK(MIN) 5.0 7.0 10 kHz
Notes:
36. The device can be operated outside the specified duty cycle and frequency ranges (basic protective functions OC, SC, UV, OV, and OT
remain active), but the availability of the diagnostic functions OL_ON, OL_OFF, and OS is affected. OL_OFF duty-cycle range is
guaranteed by design characterization.
37. Values guaranteed from 60 Hz to 1.0 kHz (recommended switching frequency range).
38. Only when the WD_dis bit set to logic [0] (default). Watchdog timeout defined from the rising edge on RST to rising edge HS[0,1]
39. Values were obtained after lab characterization
Table 5. Dynamic Electrical Characteristics (continued)
Unless specified otherwise: 8.0 V VPWR 36 V, 3.0 V VDD 5.5 V, - 40 C TA 125 C, GND = 0 V. Typical values are
average values evaluated under nominal conditions TA = 25 °C,VPWR = 28 V & VDD = 5.0 V, unless specified otherwise.
Parameter Symbol Min Typ Max Unit
Analog Integrated Circuit Device Data
Freescale Semiconductor 21
10XS4200
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
TIMING: SPI PORT, IN[0]/ IN[1] SIGNALS & AUTORETRY
Required Low time allowing delatching or triggering sleep mode (direct inputs) tIN 175 250 325 ms
Watchdog Timeout for entering Fail-safe Mode due to loss of SPI contact(40) t
WDTO 217 310 400 ms
Auto-Retry Repetition Period (when activated):
Auto_period bits = 00
Auto_period bits = 01
Auto_period bits = 10
Auto_period bits = 11
tAUTO_00
tAUTO_01
tAUTO_10
tAUTO_11
105
52.5
26.2
13.1
150
75
37.5
17.7
195
97.5
47.8
24.4
ms
GND PIN TEMPERATURE SENSING FUNCTION
Thermal Prewarning Detection Threshold(41) TOTWAR 110 125 140 °C
Temperature Sensing output voltage @ TA = 25 °C (470 < RCSNS < 10 k TFEED 918 1078 1238 mV
Gain Temperature Sensing output @ TA = 25 °C (470 < RCSNS < 10 k(41) DTFEED 10.7 11.1 11.5 mV/°C
Temperature Sensing Error, range [-40 °C, 150 °C], default(41) TFEED_ERROR -15 +15 °C
Temperature Sensing Error, [-40 °C, 150 °C] after 1 point calibration @ 25 °C(41) TFEED_ERROR
_CAL
-5.0 +5.0 °C
Notes:
40. Only when the WD_dis bit set to logic [0] (default). Watchdog timeout defined from the rising edge on RST to rising edge HS[0,1]
41. Values were obtained after lab characterization
Table 5. Dynamic Electrical Characteristics (continued)
Unless specified otherwise: 8.0 V VPWR 36 V, 3.0 V VDD 5.5 V, - 40 C TA 125 C, GND = 0 V. Typical values are
average values evaluated under nominal conditions TA = 25 °C,VPWR = 28 V & VDD = 5.0 V, unless specified otherwise.
Parameter Symbol Min Typ Max Unit