American Microsystems, Inc. reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. 2.28.02
FS6205
FS6205FS6205
FS6205
VCXO Clock Gener ator IC
VCXO Clock Gener ator ICVCXO Clock Gener ator IC
VCXO Clock Gener ator IC
ISO9001
ISO9001ISO9001
ISO9001
1.0 Features
On-chip tunable voltage-controlled crystal oscillator
circuitry (VCXO) allows precise system frequency
tuning (pull range typically 300ppm)
Uses inexpensive fundamental-mode crystals
Integrated phase-locked loops (PLL) multiply VCXO
frequency to the higher system frequencies needed
3.3V supply voltage available (contact factory for 5
volt ver s io ns )
Small circuit board footprint (8-pin 0.150 SOIC)
Custom frequency selections available - contact your
local AMI Sales Representative for more information
Figure 1: Pin Configuration
1 8
2
3
4
7
6
5
XIN
VDD
XTUNE
VSS
MS
FS
CLK
XOUT
FS6205
8-pin (0.150) SOIC
2.0 Description
The FS6205 is a monolithic CMOS clock generator IC
designed to m inim ize cost a nd com ponen t count in digi tal
video/audio systems.
An on-chip voltage-controlled crystal oscillator (VCXO)
permits the reference frequency (or output frequency) to
be tuned to match other frequencies present in the sys-
tem.
Phase- lock ed loops are use d to ge nerat e precis e output /
reference frequency ratios. See Table 1 for information
on the frequency ratios programmed into each version of
the FS6205.
Table 1: Version Information
DEVICE VDD
(nom) FREF
(MHz) FS MS CLK
(MHz)
00 27.000
(REF * 2)
13.500 0174.175824175…
(REF * 500 / 91)
10 27.027
(REF * 2)
FS6205-01 3.3
13.5135 1174.580835443…
(REF * 436 / 79)
NOTE: Contact AMI for custom versions
Figure 2: Block Diagram
VCXO
FS6205
CLK
PLL A
XOUT
XIN
XTUNE
MUX
FS
MS
PLL B
22.28.02
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VCXO
V
CXOVCXO
V
CXO Clock Generator IC
Clock Generator ICClock Generator IC
Clock Generator IC
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Table 2: Pin Descriptions
Key: AI = Analog Input; AO = Analog Output; DI = Digital Input; DIU = Input with Internal Pull-Up; DID = Input with Internal Pull-Down; DIO = Digital Input/Output; DI-3 = Three-Level Digital Input,
DO = Digital Output; P = Power/Ground; # = Active Low pin
PIN TYPE NAME DESCRIPTION
1 AI XIN VCXO Crystal Feedback
2 P VDD Power Supply (+3.3V nominal)
3 AI XTUNE VCXO Tune
4 P VSS Ground
5 DO CLK Clock Output
6DI
UFS Frequency Select Input (changes P LL Frequencies)
7DI
UMS Multiplexer Select Input (chooses PLL A or PLL B)
8 A O XOUT VCXO Crystal Drive
3.0 Functional Bl ock Descripti on
3.1 Phase-Locked Loops (PLL)
The on-chip PLLs are a standard frequency- and phase-
lock ed loop archi tec tur e. The PLL multiplies the refer enc e
oscillator to the desired frequency by a ratio of integers.
The frequency multiplication is exactly that specified by
the integer ratios .
3.2 Voltage-Controlled Crystal
Oscillator (VCXO)
The VCXO provides a tunable, low-jitter frequency refer-
ence for the rest of the FS6205 system components.
Loading capacitance for the crystal is internal to the
FS6205. No external components (other than the crystal
resonator itself) are required for operation of the VCXO.
Continuous fine-tuning of the VCXO frequency is accom-
plished by varying the voltage on the XTUNE pin. The
total change (from one extreme to the other) in effective
loading capacitance is 12pF nominal (i.e from 35pF to
13pF).
“Pulling” of the crystal oscillation frequency, is accom-
plished by altering the effective load capacitance pre-
sented to the crystal by the oscillator circuit. The actual
amount that c hanging th e load capac itance alt ers the os-
cillator fr equenc y will be d ependent o n the char acteristic s
of the crystal as well as the oscillator circuit itself.
Specifically, the m otional capacitance of the cr ystal (usu-
ally referr ed to by cr ystal m anufactur ers as C1), the st atic
capacitance of the crystal (C0), and the load capacitance
(CL) of the oscillator determine the “warping” or “pulling”
capability of the crystal in the oscillator circuit.
A simple formula to obtain the pulling capability of a
crystal oscillator is:
()
()()
CCCC CCC
ppmf LL
LL
1020
6
121
210
)( +×+× ××
=
where CL1 and CL2 are the two extremes of the applied
load capacitance.
EXAMPLE: A crystal with the following parameters is
used. With C1 = 0.02 pF, C0 = 5 pF, CL1 = 13 pF, and CL2 =
35pF, the tuning range between extreme settings of
XTUNE voltage is:
()
()()
ppm
.
f306
1353552 106
1335020
+×+× ××
= .
-250
-200
-150
-100
-50
0
50
100
150
200
250
00.511.522.533.5
V(XTUNE) - v olts
Deviation - ppm
Figure 3 - Typical VCXO Characteristic
32.28.02
FS6205
FS6205FS6205
FS6205
VCXO Clock Gener ator IC
VCXO Clock Gener ator ICVCXO Clock Gener ator IC
VCXO Clock Gener ator IC
ISO9001
ISO9001ISO9001
ISO9001
4.0 Electrical Specifications
Table 3: Absolute Maximum Ratings
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These conditions represent a stress rating only, and functional operation of the device at
these or any other conditions above the operational limits noted in this specification is not implied. Exposure to maximum rating conditions for extended conditions may affect device performance,
functionality, and reliability.
PARAMETER SYMBOL MIN. MAX. UNITS
Supply Voltage (VSS = ground) VDD VSS-0.5 7 V
Input Voltage, dc VIVSS-0.5 VDD+0.5 V
Output Voltage, dc VOVSS-0.5 VDD+0.5 V
Input Clamp Current, dc (V I < 0 or VI > VDD)I
IK -50 50 mA
Output Clamp Current, dc (VI < 0 or VI > VDD)I
OK -50 50 mA
Storage Temperature Range (non-condensing) TS-65 150 °C
Ambient Temperature Range, Under Bias TA-55 125 °C
Junction Temperature TJ125 °C
Lead Temperature (soldering, 10s) 260 °C
Input Static Disc harge Voltage Protection (MIL-STD 883E, Method 3015.7) 2 kV
CAUTION: ELECTROSTATIC SENSITIVE DEVICE
Permanent damage res ulting in a loss of functi onality or performance may occur if this devic e is subjected to a high-energy elec-
trostatic discharge.
Table 4: Operating Conditions
PARAMETER SYMBOL CONDITIONS/DESCRIPTION MIN. TYP. MAX. UNITS
Supply Voltage (3.3 volt system) VDD 3.0 3.3 3.6 V
Ambient Operating Temperature Range TA070°C
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V
CXOVCXO
V
CXO Clock Generator IC
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Table 5: DC Electrical Specifications
Unless otherwise stated, VDD = 3.3V ± 10%, no load on any output, and ambient temperature range TA = 0°C to 70°C. Parameters denoted with an asterisk ( * ) represent nominal characterization
data and are not production tested to any specific limits. Where given, MIN and MAX characterization data are ± 3σ from typical. Negative currents indicate current flows out of the device.
PARAMETER SYMBOL CONDITIONS/DESCRIPTION MIN. TYP. MAX. UNITS
Overall
Supply Current, Dynamic, with Loaded
Outputs IDD fXTAL = 13.5MHz; CL = 10pF, VDD = 3.3V 12 mA
Clock Outputs (CLKx)
High-Level Output Sourc e Current * IOH VO = 2.0V -40 mA
Low-Level Output Sink Current * IOL VO = 0.4V 17 mA
zOH VO = 0.5VDD; out put driving hi gh 25
Output Impedance * zOL VO = 0.5VDD; out put driving l ow 25
Short Circuit S ource Current * IOSH VO = 0V; shorted for 30s, max. -55 mA
Short Circuit S i nk Current * IOSL VO = 3.3V; shorted for 30s, max. 55 mA
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VCXO Clock Gener ator IC
VCXO Clock Gener ator ICVCXO Clock Gener ator IC
VCXO Clock Gener ator IC
ISO9001
ISO9001ISO9001
ISO9001
Table 6: AC Timing Specifications
Unless otherwise stated, VDD = 3.3V ± 10%, no load on any output, and ambient temperature range TA = 0°C to 70°C. Parameters denoted with an asterisk ( * ) represent nominal characterization
data and are not production tested to any specific limits. Where given, MIN and MAX characterization data are ± 3σ from typical.
PARAMETER SYMBOL CONDITIONS/DESCRIPTION MIN. TYP. MAX. UNITS
Overall
Synthesis Error (unless otherwise noted in Frequency Table) 0 ppm
Crystal Oscillator
Center Frequency Tuning Volt-
age VCENTER For c rystal with specified CL(xtal) 1.4 V
Center Frequency Crys tal
Loading Capacit ance CL(xtal)
As seen by a crystal connected to XIN and XOUT
(@VXTUNE=VCENTER). Cryst al loadi ng capacitance at
nominal center frequency should be specified for this
value.
20 pF
Crystal Dri ve Level RXTAL=20;200 uW
Clock Output (CLK)
Duty Cycle * Ratio of high pulse width (as measured from rising edge to next falling
edge at VDD/2) to one clock period 45 55 %
Jitter, Period (peak-peak) * tj(P) From rising edge to next rising edge at VDD/2 150 ps
Jitter, Long Term (σy(τ)) * tj(LT) From 0-500µs at VDD/2 compared to ideal clock
source (CLK =27MHz or 27.027MHz) 65 ps
Jitter, Long Term (σy(τ)) * tj(LT) From 0-500µs at VDD/2 compared to ideal clock
source (CLK = 74.175MHz or 74.58MHz) 200 ps
Rise Time * trVDD = 3.3V; VO = 0.3V to 3.0V; CL = 10pF 1.2 ns
Fall Time * tfVDD = 3.3V; VO = 3.0V to 0.3V; CL = 10pF 1.2 ns
62.28.02
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VCXO
V
CXOVCXO
V
CXO Clock Generator IC
Clock Generator ICClock Generator IC
Clock Generator IC
ISO9001
ISO9001ISO9001
ISO9001
5.0 Package Information
Table 7: 8-pin SOIC (0.150") Package Dimensions
DIMENSIONS
INCHES MILLIMETERS
MIN. MAX. MIN. MAX.
A 0.061 0.068 1.55 1.73
A1 0.004 0.0098 0.102 0.249
A2 0.055 0.061 1.40 1.55
B 0.013 0.019 0.33 0.49
C 0.0075 0.0098 0.191 0.249
D 0.189 0.196 4.80 4.98
E 0.150 0.157 3.81 3.99
e 0.050 BSC 1.27 BSC
H 0.230 0.244 5.84 6.20
h 0.010 0.016 0.25 0.41
L 0.016 0.035 0.41 0.89
Θ0°8°0°8°
B
DA
1
SEATING
PLANE
HE
8
1ALL RADII:
0.005" TO 0.01"
BASE
PLANE
A
2
e
AMERICAN MICROSYSTEMS, INC.
A
R
C
L
θ
7° typ.h x 45°
Table 8: 8-pin SOIC (0.150") Package Characteristics
PARAMETER SYMBOL CONDITIONS/DESCRIPTION TYP. UNITS
Thermal Impedance, Junction to Free-Air
8-pin 0.150” SOIC ΘJA Air flow = 0 m/s 110 °C/W
Corner lead 2.0
Lead Inductanc e, Self L11 Center lead 1.6 nH
Lead Inductanc e, Mutual L12 Any lead to any adjacent l ead 0.4 nH
Lead Capacitance, Bulk C11 Any lead to VSS 0.27 pF
72.28.02
FS6205
FS6205FS6205
FS6205
VCXO Clock Gener ator IC
VCXO Clock Gener ator ICVCXO Clock Gener ator IC
VCXO Clock Gener ator IC
ISO9001
ISO9001ISO9001
ISO9001
6.0 Ordering Information
ORDERING CODE DEVICE NUM BER PACKAGE TYPE OPERATING
TEMPERATURE RANGE SHIPPING
CONFIGURATION
11640-822 FS6205-01 8-pin (0.150”) S OIC
(Small Outl i ne Package) 0°C to 70°C (Commercial) Tape and Reel
11640-832 FS6205-01 8-pin (0.150”) S OIC
(Small Outl i ne Package) 0°C to 70°C (Commercial) Tubes
Copyright © 1999, 2000 American Microsystems, Inc.
Devices sold by AMI are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. AMI
makes no warranty, express, statutory implied or by description, regarding the information set forth herein or regarding the freedom
of the described devices from patent infringement. AMI makes no warranty of merchantability or fitness for any purposes. AMI re-
serves the right to discontinue production and change specifications and prices at any time and without notice. AMI’s products are
intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental require-
ments, or high reliability applications, such as military, medical life-support or life-sustaining equipment, are specifically not recom-
mended without additional processing by AMI for such applications.
American Microsystems, Inc., 2300 Buckskin Rd., Pocatello, ID 83201, (208) 233-4690, FAX (208) 234-6796,
WWW Address: http://www.amis.com E-mail: tgp@amis.com