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1 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
WEDPS512K32-XBX
512Kx32 SRAM MUL TI-CHIP P ACKAGE
Access Times of 12, 15, 17, 20, ns
Packaging
• 16mm x 18mm, 143 PBGA
Organized as 512Kx32, User Configurable as 1Mx16 or
2Mx8
FIG. 1 PIN CONFIGURATION FOR WEDPS512K32-XBX
August 2002 Rev. 4
FEATURES
*This data sheet describles a product that is developmental, is not qualified and
is subject to change or cancellation without notice.
TOP VIEW
PIN DESCRIPTION
I/O0-31 Data Inputs/Outputs
A0-18 Address Inputs
WE1-4 Write Enables
CS1-4 Chip Selects
OE Output Enable
VCC Power Supply
GND Ground
NC Not Connected
Commercial, Industrial and Military Temperature Ranges
TTL Compatible Inputs and Outputs
5 Volt Power Supply
Low Power CMOS
512K x 8
8
I/O
0-7
WE
CS
11
512K x 8
8
I/O
8-15
WE
CS
22
512K x 8
8
I/O
16-23
WE
CS
33
512K x 8
8
I/O
24-31
WE
CS
44
A
0
-
18
OE
BLOCK DIAGRAM
ADVANCED*
11
11
122
22
233
33
344
44
455
55
566
66
677
77
788
88
899
99
91010
1010
10 1111
1111
11 1212
1212
12
AA
AA
A-A2 A1 A0 GND GND VCC VCC A18 A17 A16 GND
BB
BB
B CS2 A3 A4 D14 D15 NC CS4 D24 D25 OE A15 NC
CC
CC
C D9 D8 NC D12 D13 GND VCC D26 D27 WE4 D31 D30
DD
DD
D D10 D11 GND GND GND GND VCC VCC VCC VCC D28 D29
EE
EE
E WE2 GND GND GND GND GND VCC VCC VCC VCC VCC NC
FF
FF
F GND GND GND GND GND GND VCC VCC VCC VCC VCC VCC
GG
GG
GVCC VCC VCC VCC VCC VCC GND GND GND GND GND GND
HH
HH
H CS1 VCC VCC VCC VCC VCC GND GND GND GND GND NC
JJ
JJ
JD1D0VCC VCC VCC VCC GND GND GND GND D23 D22
KK
KK
K D2D3NCD7D5VCC GND D17 D16 CS3 D20 D21
LL
LL
L WE1 A6 A5 D6 D4 NC WE3 D19 D18 A14 A13 NC
MM
MM
M GND A7 A8 A9 VCC VCC GND GND A10 A11 A12 VCC
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White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520
White Electronic Designs
WEDPS512K32-XBX
PP
PP
Parameterarameter
arameterarameter
arameter Symbol Symbol
Symbol Symbol
Symbol MinMin
MinMin
Min MaxMax
MaxMax
Max UnitUnit
UnitUnit
Unit
Operating Temperature TA-55 +125 °C
Storage Temperature TSTG -65 +150 °C
Signal Voltage Relative to GND VG-0.5 Vcc+0.5 V
Junction Temperature TJ150 °C
Supply Voltage VCC -0.5 7.0 V
TRUTH TABLE
RECOMMENDED OPERATING CONDITIONS
ABSOLUTE MAXIMUM RATINGS
PP
PP
Parameterarameter
arameterarameter
arameter SymbolSymbol
SymbolSymbol
Symbol MinMin
MinMin
Min MaxMax
MaxMax
Max UnitUnit
UnitUnit
Unit
Supply Voltage VCC 4.5 5.5 V
Input High Voltage VIH 2.2 VCC + 0.3 V
Input Low Voltage VIL -0.5 +0.8 V
Operating Temp (Mil) TA-55 +125 °C
CAPACITANCE
(TA = +25°C)
ParameterParameter
ParameterParameter
Parameter
SymbolSymbol
SymbolSymbol
Symbol
ConditionsConditions
ConditionsConditions
Conditions MaxMax
MaxMax
Max UnitUnit
UnitUnit
Unit
OE capacitance COE
V
IN
= 0 V, f = 1.0 MHz
30 pF
WE1-4 capacitance CWE
V
IN
= 0 V, f = 1.0 MHz
10 pF
CS1-4 capacitance CCS
V
IN
= 0 V, f = 1.0 MHz
10 pF
Data I/O capacitance CI/O
V
I/O
= 0 V, f = 1.0 MHz
10 pF
Address input capacitance CAD
V
IN
= 0 V, f = 1.0 MHz
30 pF
ParameterParameter
ParameterParameter
Parameter SymbolSymbol
SymbolSymbol
Symbol ConditionsConditions
ConditionsConditions
Conditions UnitsUnits
UnitsUnits
Units
MinMin
MinMin
Min MaxMax
MaxMax
Max
Input Leakage Current ILI VCC = 5.5, VIN = GND to VCC 10 µA
Output Leakage Current ILO CS = VIH, OE = VIH, VOUT = GND to VCC 10 µA
Operating Supply Current x 32 Mode ICC x 32 CS = VIL, OE = VIH, f = 5MHz, Vcc = 5.5 660 mA
Standby Current ISB CS = VIH, OE = VIH, f = 5MHz, Vcc = 5.5 80 mA
Output Low Voltage VOL IOL = 8mA 0.4 V
Output High Voltage VOH IOH = -4.0mA 2.4 V
NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V
DC CHARACTERISTICS
(VCC = 5.0V, VSS = 0V, TA = -55°C TO +125°C)
CC
CC
CSS
SS
SOEOE
OEOE
OE WEWE
WEWE
WE ModeMode
ModeMode
Mode Data I/OData I/O
Data I/OData I/O
Data I/O P P
P P
Powerower
owerower
ower
H X X Standby High Z Standby
L L H Read Data Out Active
L H H Out Disable High Z Active
L X L Write Data In Active
This parameter is guaranteed by design but not tested.
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3 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
WEDPS512K32-XBX
AC CHARACTERISTICS
(VCC = 5.0V, VSS = 0V, TA = -55°C TO +125°C)
FIG. 4 AC TEST CIRCUIT
Notes:
VZ is programmable from -2V to +7V.
IOL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 Ω.
VZ is typically the midpoint of VOH and VOL.
IOL & IOH
are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
AC CHARACTERISTICS
(VCC = 5.0V, VSS = 0V, TA = -55°C TO +125°C)
AC TEST CONDITIONS
ParameterParameter
ParameterParameter
Parameter TypTyp
TypTyp
Typ UnitUnit
UnitUnit
Unit
Input Pulse Levels VIL = 0, VIH = 3.0 V
Input Rise and Fall 5 ns
Input and Output Reference Level 1.5 V
Output Timing Reference Level 1.5 V
ParameterParameter
ParameterParameter
Parameter SymbolSymbol
SymbolSymbol
Symbol -12-12
-12-12
-12 -15-15
-15-15
-15 -17-17
-17-17
-17 -20-20
-20-20
-20 UnitsUnits
UnitsUnits
Units
Read CycleRead Cycle
Read CycleRead Cycle
Read Cycle Min MaxMin Max
Min MaxMin Max
Min Max Min MaxMin Max
Min MaxMin Max
Min Max Min MaxMin Max
Min MaxMin Max
Min Max Min MaxMin Max
Min MaxMin Max
Min Max
Read Cycle Time tRC 12 15 17 20 ns
Address Access Time tAA 12 15 17 20 ns
Output Hold from Address Change tOH 0 0 0 0 ns
Chip Select Access Time tACS 12 15 17 2 0 ns
Output Enable to Output Valid tOE 7 8 9 10 ns
Chip Select to Output in Low Z t CLZ11 2 2 2 ns
Output Enable to Output in Low Z t OLZ10 0 0 0 ns
Chip Disable to Output in High Z tCHZ17 12 12 12 ns
Output Disable to Output in High Z tOHZ17 12 12 12 ns
ParameterParameter
ParameterParameter
Parameter SymbolSymbol
SymbolSymbol
Symbol -12-12
-12-12
-12 -15-15
-15-15
-15 -17-17
-17-17
-17 -20-20
-20-20
-20 UnitsUnits
UnitsUnits
Units
Read CycleRead Cycle
Read CycleRead Cycle
Read Cycle Min MaxMin Max
Min MaxMin Max
Min Max Min MaxMin Max
Min MaxMin Max
Min Max Min MaxMin Max
Min MaxMin Max
Min Max Min MaxMin Max
Min MaxMin Max
Min Max
Write Cycle Time tWC 12 1 5 17 20 ns
Chip Select to End of Write tCW 10 13 15 15 ns
Address Valid to End of Write tAW 10 13 15 15 ns
Data Valid to End of Write tDW 8 10 11 12 ns
Write Pulse Width tWP 10 13 15 15 ns
Address Setup Time tAS 0 2 2 2 ns
Address Hold Time tAH 0 0 0 0 ns
Output Active from End of Write tOW12 2 2 3 ns
Write Enable to Output in High Z tWHZ17 8 9 11 ns
Data Hold Time tDH 00 00
1. This parameter is guaranteed by design but not tested.
1. This parameter is guaranteed by design but not tested.
≈
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White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520
White Electronic Designs
WEDPS512K32-XBX
WS32K32-XHX
FIG. 5 TIMING WAVEFORM - READ CYCLE
FIG. 6 WRITE CYCLE - WE
CONTROLLED
FIG. 6 WRITE CYCLE - CS
CONTROLLED
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5 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
WEDPS512K32-XBX
PACKAGE 756: 143 BALL GRID ARRAY
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
0.61 (0.024)
BSC
1.27
(0.050)
BSC
A
B
C
D
E
F
G
H
J
K
L
M
13.97 (0.550)
BSC
16.25 (0.640)
MAX
18.25 (0.719)
MAX
13.97 (0.550)
BSC 2.21 (0.087)
MAX
BOTTOM VIEW
12 11 10 9 8 7 6 5 4 3 2 1
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White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520
White Electronic Designs
WEDPS512K32-XBX
ORDERING INFORMATION
DEVICE GRADE:DEVICE GRADE:
DEVICE GRADE:DEVICE GRADE:
DEVICE GRADE:
M=MILITARY SCREENED -55°C TO +125°C
I=I
NDUSTRIAL -40°C TO 85°C
C=C
OMMERCIAL 0°C TO +70°C
PACKAGE TYPE: PACKAGE TYPE:
PACKAGE TYPE: PACKAGE TYPE:
PACKAGE TYPE:
B = 143 PBGA, 16mm x 18mm, 288mm2
ACCESS TIME (ns)ACCESS TIME (ns)
ACCESS TIME (ns)ACCESS TIME (ns)
ACCESS TIME (ns)
ORGANIZATIONORGANIZATION
ORGANIZATIONORGANIZATION
ORGANIZATION, 512Kx32, 512Kx32
, 512Kx32, 512Kx32
, 512Kx32
User configurable as 1Mx16 or 2Mx8
SRAMSRAM
SRAMSRAM
SRAM
PLASTICPLASTIC
PLASTICPLASTIC
PLASTIC
WHITE ELECTRONIC DESIGNS CORP.WHITE ELECTRONIC DESIGNS CORP.
WHITE ELECTRONIC DESIGNS CORP.WHITE ELECTRONIC DESIGNS CORP.
WHITE ELECTRONIC DESIGNS CORP.
WED P S 512K 32 WED P S 512K 32
WED P S 512K 32 WED P S 512K 32
WED P S 512K 32
- XX X X- XX X X
- XX X X- XX X X
- XX X X
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7 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
White Electronic Designs
WEDPS512K32-XBX
Document Title
512K x 32 SRAM Multi-Chip Package
Revision History
Rev # History ReleaseDate Status
Rev 0 Initial Release March 6, 2002 Advanced
Rev 1 Switch Rows and Columns header position (Pg. 1) March 13, 2002 Advanced
Rev 2 Switch Rows and Columns header position (Pg. 1) May 6, 2002 Advanced
Rev 3 Change mechanical outline to more accurate design (Pg. 1,5) May 14, 2002 Advanced
Rev 4 Remove references to 25-55ns speed grades (Pg. 1, 2, 3) Advanced
