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8-Ch/Dual 4-Ch High-Performance CMOS Analog Multiplexers
DG408MIL, DG409MIL
Vishay Siliconix
DESCRIPTION
The DG408 is an 8 channel single-ended analog multiplexer
designed to connect one of eight inputs to a common output
as determined by a 3-bit binary address (A0, A1, A2). The
DG409 is a dual 4 channel differential analog multiplexer
designed to connect one of four differential inputs to a
common dual output as determined by its 2-bit binary
address (A0, A1). Break-before-make switching action
protects against momentary crosstalk between adjacent
channels.
An on channel conducts current equally well in both
directions. In the off state each channel blocks voltages up
to the power supply rails. An enable (EN) function allows the
user to reset the multiplexer/demultiplexer to all switches off
for stacking several devices. All control inputs, address (Ax)
and enable (EN) are TTL compatible over the full specified
operating temperature range.
Applications for the DG408, DG409 include high speed data
acquisition, audio signal switching and routing, ATE
systems, and avionics. High performance and low power
dissipation make them ideal for battery operated and
remote instrumentation applications.
Designed in the 44 V silicon-gate CMOS process, the
absolute maximum voltage rating is extended to 44 V.
Additionally, single supply operation is also allowed. An
epitaxial layer prevents latchup.
For additional information please see Technical Article
TA201.
FEATURES
Low on-resistance - RDS(on): 100
Low charge injection - Q: 20 pC
Fast transition time - tTRANS: 160 ns
Low power - ISUPPLY: 10 μA
Single supply capability
44 V supply max. rating
TTL compatible logic
BENEFITS
Reduced switching errors
Reduced glitching
Improved data throughput
Reduced power consumption
Increased ruggedness
Wide supply ranges (± 5 V to ± 20 V)
APPLICATIONS
Data acquisition systems
Audio signal routing
ATE systems
Battery powered systems
High rel systems
Single supply systems
Medical instrumentation
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
S3
A0
S6
D
S4
A1
S8
S7
EN
CerDIP
A2
V- GND
S1V+
S2S5
Decoders/Drivers
1
2
3
4
5
6
7
16
15
14
13
12
11
10
Top View
89
DG408
CerDIP
9
A0
Da
A1
Db
EN GND
V- V+
S1a S1b
S2a S2b
S3a S3b
S4a S4b
Decoders/Drivers
1
2
3
4
5
6
7
16
15
14
13
12
11
10
Top View
8
DG409
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Notes
•Logic0 = V
AL 0.8 V
•Logic1 = V
AH 2.4 V
•X = Do not care
Key
EN A1
NCA0A2
S4S8
NCD S7
32012 19
9121110 13
4GND
S6
V+
NC
S5
V-
S3
S1
NC
S2
5
8
6
7
18
17
14
16
15
LCC-20
DG408 Top View
Key
EN A1
NCA0GND
S4a Db
NCDaS4b
32012 19
9121110 13
4V+
S3b
S1b
NC
S2b
V-
S3a
S1a
NC
S2a
5
8
6
7
18
17
14
16
15
DG409
LCC-20
Top View
FLATPACK
Top View
9
16
15
14
13
12
11
10
S8
A1
A2
GND
V+
S5
S6
S7
8
1
2
3
4
5
6
7
D
A0
EN
V-
S1
S2
S3
S4
DG408
FLATPACK
Top View
9
16
15
14
13
12
11
10
Db
A1
GND
V+
S1b
S2b
S3b
S4b
8
1
2
3
4
5
6
7
Da
A0
EN
V-
S1a
S2a
S3a
S4a
DG409
TRUTH TABLE (DG408)
A2A1A0EN ON SWITCH
XXX0None
0001 1
0011 2
0101 3
0111 4
1001 5
1011 6
1101 7
1111 8
TRUTH TABLE (DG409)
A1A0EN ON SWITCH
XX0None
0011
0112
1013
1114
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Note
Block diagram and pin configuration for Flat-pack 16 not shown.
Notes
a. Signals on SX, DX or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads soldered or welded to PC board.
c. Derate 12 mW/°C above 75 °C.
d. Derate 10 mW/°C above 75 °C.
ORDERING INFORMATION (Hi-Rel)
PART CONFIGURATION TEMP. RANGE PACKAGE ORDERING PART GENERIC DSCC NUMBER
DG408 8:1 x 1 - 55 °C to 125 °C
16-pin CerDIP
DG408AK DG408AK -
DG408AK-E3 DG408AK-E3 -
9204201EA DG408AK/883 5962-9204201MEA
LCC-20 92042012A DG408AZ/883 5962-9204201M2A
92042012C 5962-9204201M2C
Flat-pack 16 9204201XA DG408AL/883 5962-9204201MXA
9204201XC 5962-9204201MXC
DG409 4:1 x 2 - 55 °C to 125 °C
16-pin CerDIP
DG409AK DG409AK -
DG409AK-E3 DG409AK-E3 -
9204202EA DG409AK/883 5962-9204202MEA
LCC-20 92042022A DG409AZ/883 5962-9204202M2A
92042022C 5962-9204202M2C
Flat-pack 16 9204202XA DG409AL/883 5962-9204202MXA
9204202XC 5962-9204202MXC
ABSOLUTE MAXIMUM RATINGS
PARAMETER LIMIT UNIT
Voltages Referenced to V- V+ 44
V
GND 25
Digital Inputsa, VS, VD
(V-) - 2 to (V+) + 2
or 20 mA, whichever occurs first
Current (any terminal) 30 mA
Peak Current, S or D (pulsed at 1 ms, 10 % duty cycle max.) 100
Storage Temperature (A suffix) - 65 to 150 °C
Power Dissipation (Package)b16-pin CerDIPc900 mW
LCC-20d750
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SPECIFICATIONSa
PARAMETER SYMBOL
TEST CONDITIONS UNLESS
OTHERWISE SPECIFIED
TEMP.bTYP.c
A SUFFIX
- 55 °C to 125 °C
UNIT
V+ = 15 V, V- = - 15 V MIN.dMAX.d
VAL = 0.8 V, VAH = 2.4 VF
Analog Switch
Analog Signal RangeeVANALOG Full - - 15 15 V
Drain-Source
On-Resistance RDS(on) VD = ± 10 V, IS = - 10 mA Room 40 - 100
Full - - 125
RDS(on) Matching Between
ChannelsgRDS(on) VD = ± 10 V Room - - 15
Source Off Leakage Current IS(off) VS = ± 10 V,
VD = ± 10 V, VEN = 0 V
Room - - 0.5 0.5
nA
Full - - 50 50
Drain Off Leakage
Current
DG408
ID(off)
VD = ± 10 V,
VS = ± 10 V,
VEN = 0 V
Room - - 1 1
DG408 Full - - 100 100
DG409 Room - - 1 1
DG409 Full - - 50 50
Drain On Leakage
Current
DG408
ID(on)
VS = VD = ± 10 V
sequence each
switch on
Room - - 1 1
DG408 Full - - 100 100
DG409 Room - - 1 1
DG409 Full - - 50 50
Digital Control
Logic High Input Voltage VINH Full - 2.4 - V
Logic Low Input Voltage VINL Full - - 0.8
Logic High Input Current IAH VA = 2.4 V, 15 V Full - - 10 10 μA
Logic Low Input Current IAL VEN = 0 V, 2.4 V, VA = 0 V Full - - 10 10
Logic Input Capacitance Cin f = 1 MHz Room 8 - - pF
Dynamic Characteristics
Transition Time t TRANS see figure 2 Full 160 - 250
ns
Break-Before-Make Interval tOPEN see figure 4 Room - 10 -
Enable Turn-On Time tON(EN) see figure 3
Room 115 - 150
Full - - 225
Enable Turn-Off Time tOFF(EN) Room 105 - 150
Charge Injection Q CL = 10 nF, VS = 0 V Room 20 - - pC
Off IsolationhOIRR VEN = 0 V, RL = 1 k,
f = 1 MHz Room - 75 - -
pF
Source Off Capacitance CS(off) VEN = 0 V, VS = 0 V,
f = 1 MHz Room 3 - -
Drain Off
Capacitance
DG408 CD(off) VEN = 0 V,
VD = 0 V,
f = 1 MHz
Room 26 - -
DG409 Room 14 - -
Drain On
Capacitance
DG408 CD(on) Room 37 - -
DG409 Room 25 - -
Power Supplies
Positive Supply Current I+ VEN = VA = 0 V or 5 V Full 10 - 75 μA
Negative Supply Current I- Full 1 - 75 -
Positive Supply Current I+ VEN = VA = 0 V or 5 V
Room 0.2 - 0.5 mA
Full - - 2
Negative Supply Current I- Full - - 500 - μA
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Notes
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25 °C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
g. RDS(on) = RDS(on) max. - RDS(on) min.
h. Worst case isolation occurs on channel 4 due to proximity to the drain pin.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
SPECIFICATIONSa (Single Supply)
PARAMETER SYMBOL
TEST CONDITIONS UNLESS
OTHERWISE SPECIFIED
TEMP.bTYP.c
A SUFFIX
- 55 °C to 125 °C
UNIT
V+ = 12 V, V- = 0 V MIN.dMAX.d
VAL = 0.8 V, VAH = 2.4 VF
Analog Switch
Drain-Source
On-Resistancee, f RDS(on) VD = 3 V, 10 V, IS = - 1 mA Room 90 - -
Dynamic Characteristics
Switching Time of
MultiplexeretTRANS V
S1 = 8 V, VS8 = 0 V, VIN = 2.4 V Room 180 - -
ns
Enable Turn-On TimeetON(EN) VINH = 2.4 V, VINL = 0 V,
VS1 = 5 V Room 180 - -
Enable Turn-Off TimeetOFF(EN) Room 120 - -
Charge InjectioneQC
L = 1 nF, VS = 0 V, RS = 0 Room 5 - - pC
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Source/Drain Capacitance vs. Analog Voltage
Drain Leakage Current vs. Source/Drain Voltage
Input Switching Threshold vs. Supply Voltage
Drain Leakage Current vs. Source/Drain Voltage
(Single 12 V Supply)
Source Leakage Current vs. Source Voltage
Negative Supply Current vs. Switching Frequency
(pF) C
S, D
V
AN AL O G
- Analog Voltage (V)
0 15 - 15
0
20
40
80
60
V+ = 15 V
V- = - 15 V
C
D( of f)
C
S( o f f )
- 10 - 5 5 1 0
C
D( on)
DG408 I
D( on)
, I
D( of f)
(pA)
I D
V
D
or V
S
- Drain or Source V oltage (V)
0 15 - 15
- 140
- 60
20
100
60
- 20
- 100
V+ = 15 V
V- = - 15 V
V
S
= - V
D
for I
D(off)
V
D
= V
S ( open)
for I
D( on)
DG409 I
D( of f)
- 10 - 5 5 1 0
DG409 I
D( on)
(V)
TH
V
+ V
SUPPLY
(V)
12 2048 16
0.0
0.5
2.0
1.5
1.0
V
S
- Source V oltage (V)
0 15 - 15
- 10
0
10
20
15
5
- 5
V+ = 15 V
V- = - 15 V
V+ = 12 V
V- = 0 V
- 10 - 5 5 1 0
I
S(off)
(pA)
Switching Frequency (Hz)
10K 10M1 0 0 1K 100K 1M
V
SU PPL Y
= ± 15 V
- 100 mA
- 1 mA
- 100 µA
- 10 µA
- 1 µA
- 0.1 µA
- 10 mA
V
EN
= 2.4 V
V
EN
= 0 V or 5 V
I-
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Positive Supply Current vs. Switching Frequency
Positive Supply Current vs. Temperature (DG408)
RDS(on) vs. VD and Supply
ISUPPLY vs. Temperature
Charge Injection vs. Analog Voltage
RDS(on) vs. VD and Supply (Single Supply)
Switchin
g
Frequency (Hz)
10K 10M1 0 0 1K 100K 1 M
V
SU PPL Y
= 15 V
100 mA
10 mA
1 mA
100 µA
10 µA
V
EN
= 2.4 V
V
EN
= 0 V or 5 V
I
+
I+ (µA)
Temperature (°C)
5
15
20
10
125 - 55 85 45 5
0
V+ = 15 V
V- = - 15 V
V
IN
= 0 V
V
EN
= 0 V
- 35 - 15 25 65 105
R
DS(on)
(Ω)
V
D
- Drain V oltage (V)
0
40
100
60
80
120
20
- 20 - 12 - 8 - 4 0 4 8 1 2 1 6 2 0 - 16
± 5 V
± 8 V
± 10 V
± 12 V
± 20 V ± 15 V
I+, I-
Temperature (°C)
125 - 55 85 45 5
V
SU PPL Y
= ± 15 V
VA = 0 V
VEN = 0 V
I+
- (I-)
100 µA
1 µA
100 nA
10 nA
1 nA
100 pA
10 pA
10 µA
- 35 - 15 25 65 105
Q (pC)
V
S
- Source V oltage (V)
- 10
30
50
90
70
40
0
80
60
20
10
0 15- 15 - 10 - 5 5 1 0
V+ = 15 V
V- = - 15 V
V+ = 12 V
V- = 0 V
C
L
= 10 000 pF
V
IN
= 5 Vp-p
VD - Drain Voltage (V)
220
0
40
100
60
140
160
80
120
20
4 8 12 16 20
V+ = 7.5 V
10 V
12 V
15 V 20 V
22 V
V- = 0 V
RDS(on) (Ω)
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
RDS(on) vs. VD and Temperature
Off Isolation and Crosstalk vs. Frequency
Switching Time vs. Bipolar Supply
RDS(on) vs. VD and Temperature (Single Supply)
Insertion Loss vs. Frequency
Switching Time vs. Single Supply
RDS(on) (Ω)
VD - Drain Voltage (V)
0 15 - 15
0
40
60
80
50
10
70
30
20
V+ = 15 V
V- = - 15 V
125 °C
85 °C
25 °C
- 55 °C
- 10 - 5 5 1 0
- 40 °C
0 °C
(dB)
f - Frequency (Hz)
10K 10M
- 30
- 70
- 90
- 50
1 0 0 1K 100K 1M
- 110
100M
- 130
- 150
V+ = 15 V
V- = - 15 V
R
L
= 1 kΩ
Of f-Isolation
Crosstalk
t (ns)
V
SU PPL Y
(V)
± 10 ± 12 ± 14 ± 16 ± 18 ± 20 ± 22
60
80
100
120
140
tOFF(EN)
tON(EN)
tTRANS
RDS(on) ()
VD - Drain Voltage (V)
4 0
10
30
50
70
90
110
130
V+ = 12 V
V- = 0 V
- 55 °C
- 40 °C
0 °C
125 °C
85 °C
25 °C
2681012
LOSS (dB)
f - Frequency (Hz)
10M
- 5
- 2
1
- 1
0
- 4
- 3
- 6
V+ = 15 V
V- = - 15 V
Ref. 1 V
RMS
R
L
= 50 Ω
R
L
= 1 kΩ
1 0 1 0 0 1K 10K 100K 1 M 100M
t (ns)
V
SUPPLY
(V)
158
100
150
225
175
200
250
125
91214131110
275
t
TRANS
t
OFF(EN)
t
ON(EN)
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SCHEMATIC DIAGRAM (Typical Channel)
Fig. 1
TEST CIRCUITS
Fig. 2 - Transition Time
EN
A0
S1
D
V+
Sn
V-
Decode/
Drive
Level
Shift
V-
V+
VREF
AX
GND
V+
A1
A0
A2
A1
A0
+ 15 V
- 15 V
EN
V+
V-GND
D
35 pF
VO
S1
S2 - S7
S8
50 Ω 300 Ω
± 10 V
± 10 V
+ 15 V
- 15 V
EN
V+
V-GND
35 pF
VO
S1
S1a - S4a, Da
S4b
50 Ω 300 Ω
± 10 V
± 10 V
Db
Logic
Input
Switch
Output
VS8
VO
tTRANS
tr < 20 ns
tf < 20 ns
S8 ONS1 ON
tTRANS
0 V
VS1
50 %
90 %
90 %
3 V
0 V
DG408
DG409
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TEST CIRCUITS
Fig. 3 - Enable Switching Time
Fig. 4 - Break-Before-Make Interval
Logic
Input
Switch
Output
VO
tr < 20 ns
tf < 20 ns
3 V
0 V
0 V
tOFF(EN)
tON(EN)
50 %
90 %
10 %
VO
EN
S1
S2 - S8
A0
A1
A2
50 Ω1 kΩ
VO
V+
GND V- D
- 5 V
35 pF
- 15 V
+ 15 V
S1b
S1a - S4a, Da
S2b - S4b
Db
EN
A0
A1
50 Ω1 kΩ
VO
V+
GND V-
- 5 V
35 pF
- 15 V
+ 15 V
DG408
DG409
50 %
80 %
Logic
Input
Switch
Output
VO
VS
tOPEN
tr < 20 ns
tf < 20 ns
0 V
3 V
0 V
EN V+
GND V-
+ 5 V
35 pF
- 15 V
+ 15 V
+ 2.4 V
A2Db, D
All S and Da
300 Ω
VO
50 Ω
A1
A0DG408
DG409
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TEST CIRCUITS
Fig. 5 - Charge Injection
Fig. 6 - Off Isolation
Fig. 8 - Insertion Loss
Fig. 7 - Crosstalk
Fig. 9 - Source Drain Capacitance
A0
EN
A1
A2
VO
V+
GND V-
D
- 15 V
+ 15 V
Rg
SX
CL
10 nF
Channel
Select
3 V
0 V
OFF ON
Logic
Input
Switch
Output
ΔVO
ΔVO is the measured voltage due to charge transfer
error Q, when the channel turns off.
Q = CL x ΔVO
OFF
RL
1 kΩ
VO
V+
GND V-
- 15 V
+ 15 V
A2
D
A1
A0
S8
SX
VS
EN
Rg = 50 Ω
Off Isolation = 20 log
VOUT
VIN
VIN
RL
1 kΩ
A2
VO
D
Rg = 50 Ω
Insertion Loss = 20 log
VOUT
A1
VIN
A0
VSS1
V+
GND V-
- 15 V
+ 15 V
EN
RL
1 kΩ
VO
V+
GND V-
- 15 V
+ 15 V
A2
D
A1
A0
S8
SX
VS
EN
Rg = 50 Ω
Crosstalk = 20 log
VOUT
VIN
VIN S1
f = 1 MHz
S1
D
EN
+ 15 V
- 15 V
GND
V+
V-
Meter
HP4192A
Impedance
Analyzer
or Equivalent
S8
A1
A2
A0
Channel
Select
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APPLICATION HINTS
Overvoltage Protection
A very convenient form of overvoltage protection consists of
adding two small signal diodes (1N4148, 1N914 type) in
series with the supply pins (see figure 10). This arrangement
effectively blocks the flow of reverse currents. It also floats
the supply pin above or below the normal V+ or V- value. In
this case the overvoltage signal actually becomes the power
supply of the IC. From the point of view of the chip, nothing
has changed, as long as the difference VS - (V-) does not
exceed + 44 V. The addition of these diodes will reduce the
analog signal range to 1 V below V+ and 1 V above V-, but it
preserves the low channel resistance and low leakage
characteristics.
Fig. 10 - Overvoltage Protection Using Blocking Diodes
Fig. 11
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?70062.
1N4148
DG408
D
V-
V+
1N4148
SX
Vg
EN
A
0
A
1
+ 15 V
(MUX On-Off Control)
Analog
Inputs
(Outputs)
Clock
In
NC
Enable In
Analog
Output
(Input)
+ 15 V - 15 V
DG408
D
EN
GND
DM7493
V+ V-
NC
GND
+ 15 V
Analog
Inputs
(Outputs)
Analog
Outputs
(Inputs)
+ 15 V - 15 V
DG409
GNDV+ V-
Differential Differential
Clock
In
NC
GND
+ 15 V
NC
6
Reset Enable
J
K
CLK
J
K
CLK
CLEAR CLEAR
Q
S
5
S
7
S
6
S
8
S
1
S
3
S
2
S
4
S
1a
S
3a
S
2a
S
4a
S
1b
S
3b
S
2b
S
4b
D
a
D
b
A
0
A
1
A
2
B
IN
A
IN
r
01
r
02
Q
B
Q
C
Q
D
Q
A
1/2 MM74C73 1/2 MM74C73
Q
Q
Q
8-Channel Sequential Multiplexer/Demultiplexer Differential 4-Channel Sequential Multiplexer/Demultiplexer
D
EH
A
S1Q
e
b
S
PIN 1
I.D.
C
E2
E3
L
12345678
16 15 14 13 12 11 10 9
Packaging Information
Vishay Siliconix
Document Number: 71275
03-Jul-01 www.vishay.com
1
FLAT PACK: 16ĆLEAD
MILLIMETERS INCHES
Dim Min Max Min Max
A1.78 2.29 0.070 0.090
b0.38 0.48 0.015 0.019
c0.10 0.18 0.004 0.007
D9.91 10.41 0.390 0.410
E6.60 7.11 0.260 0.280
E24.57 5.08 0.180 0.200
E30.76 1.27 0.030 0.050
e1.27 BS C 0.050 BSC
H22.35 23.88 0.880 0.940
L7.62 8.89 0.300 0.350
Q0.25 0.51 0.010 0.020
S 1.02 0.040
S10.13 0.005
ECN: S-03946—Rev. C, 09-Jul-01
DWG: 5430
E1E
Q1
A
L
A1
e1B
B1
L1
S
C
eA
D
12 3 4 5 6 78
16 15 14 13 12 11 10 9
Package Information
Vishay Siliconix
Document Number: 71282
03-Jul-01 www.vishay.com
1
CERDIP: 16ĆLEAD
MILLIMETERS INCHES
Dim Min Max Min Max
A4.06 5.08 0.160 0.200
A10.51 1.14 0.020 0.045
B0.38 0.51 0.015 0.020
B11.14 1.65 0.045 0.065
C0.20 0.30 0.008 0.012
D19.05 19.56 0.750 0.770
E7.62 8.26 0.300 0.325
E16.60 7.62 0.260 0.300
e12.54 BS C 0.100 BSC
eA7.62 BSC 0.300 BSC
L3.18 3.81 0.125 0.150
L13.81 5.08 0.150 0.200
Q11.27 2.16 0.050 0.085
S0.38 1.14 0.015 0.045
0°15°0°15°
ECN: S-03946—Rev. G, 09-Jul-01
DWG: 5403
D
L1
E
BL
e
A1
A
28
1
2
Packaging Information
Vishay Siliconix
Document Number: 71290
02-Jul-01 www.vishay.com
1
20ĆLEAD LCC
MILLIMETERS INCHES
Dim Min Max Min Max
A1.37 2.24 0.054 0.088
A11.63 2.54 0.064 0.100
B0.56 0.71 0.022 0.028
D8.69 9.09 0.342 0.358
E8.69 9.09 0.442 0.358
e1.27 BS C 0.050 BSC
L1.14 1.40 0.045 0.055
L11.96 2.36 0.077 0.093
ECN: S-03946—Rev. B, 09-Jul-01
DWG: 5321
Legal Disclaimer Notice
www.vishay.com Vishay
Revision: 02-Oct-12 1Document Number: 91000
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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