General Description
The MAX6391/MAX6392 microprocessor (µP) supervisory
circuits provide sequenced logic reset outputs for multi-
component or dual-voltage systems. Each device can
monitor two supply voltages and time-sequence two reset
outputs to control the order in which system components
are turned on and off. The MAX6391/MAX6392 increase
system reliability and reduce circuit complexity and cost
compared to separate ICs or discrete components.
The MAX6391/MAX6392 monitor VCC as the master
reset supply. Both RESET1 and RESET2 are asserted
whenever VCC drops below the selected factory-fixed
reset threshold voltage. RESET1 remains asserted as
long as VCC is below the threshold and deasserts
140ms (min) after VCC exceeds the thresholds.
RESET IN2 is monitored as the secondary reset supply
and is adjustable with an external resistive-divider net-
work. RESET2 is asserted whenever either VCC or
RESET IN2 is below the selected thresholds. RESET2
remains asserted 140ms (min) or a capacitor-
adjustable time period after VCC and RESET IN2
exceed their thresholds. RESET2 is always deasserted
after RESET1 during system power-up and is always
asserted before RESET1 during power-down.
The MAX6391 includes two internal pullup resistors for
RESET1 and RESET2 (the open-drain outputs can be
externally connected to the desired pullup voltages).
The MAX6392 includes an active-low manual reset
input (MR) that asserts both RESET1 (push-pull) and
RESET2 (open drain).
The MAX6391/MAX6392 are available in small 8-pin
SOT23 packages and are specified over the -40°C to
+85°C extended temperature range.
Applications
Computers
Controllers
Critical µP Power Monitoring
Set-Top Boxes
Printers
Servers/Workstations
Industrial Equipment
Multivoltage Monitoring
Features
♦Preset VCC Reset Threshold Voltages from 1.58V
to 4.63V (master supply)
♦Customer-Adjustable RESET IN2 to Monitor
Voltages Down to 625mV (secondary supply)
♦Fixed (140ms min) RREESSEETT11Timeout
♦Fixed (140ms min) or Customer-Adjustable
RREESSEETT22Timeout Period
♦Guaranteed Reset Valid to VCC = 1V
♦Active-Low Open-Drain Outputs or Push-
Pull/Open-Drain Combination
♦Internal Open-Drain Pullup Resistors (for external
VOH voltage connections)
♦Manual Reset Input (MAX6392 only)
♦Immune to Short Negative VCC Transients
♦15µA Typical Supply Current
♦Few External Components
♦Small 8-Pin SOT23 Package
MAX6391/MAX6392
Dual-Voltage µP Supervisory Circuits
with Sequenced Reset Outputs
________________________________________________________________ Maxim Integrated Products 1
R2
RESET2GND
1
2
8
7
R1
RESET1VCC
CSRT
RESET IN2
SOT23-8
TOP VIEW
3
4
6
5
MAX6391
Pin Configurations
Ordering Information
19-2210; Rev 2; 12/05
*Insert the desired suffix (see Selector Guide) into the blanks to
complete the part number. The MAX6391/MAX6392 require a
2.5k minimum order increment and are available in tape-and-
reel only. Samples are typically available for standard versions
(see Selector Guide for standard versions). Contact factory for
availability.
Devices are available in both leaded and lead-free packaging.
Specify lead-free by replacing “-T” with “+T” when ordering.
PART*
TEMP RANGE
PIN-PACKAGE
MAX6391KA_ _-T -40°C to +85°C
SOT23-8
MAX6392KA_ _-T -40°C to +85°C
SOT23-8
Pin Configurations continued at end of data sheet.
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Typical Operating Circuit appears at end of data sheet.
MAX6391/MAX6392
Dual-Voltage µP Supervisory Circuits
with Sequenced Reset Outputs
2_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VCC = 1.2V to 5.5V, TA= TMIN to TMAX, unless otherwise specified. Typical values are at VCC = +5V and TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCC to GND...........................................................-0.3V to +6.0V
RESET1 (MAX6392), RESET IN2, CSRT,
MR to GND ..............................................-0.3V to (VCC + 0.3V)
RESET1 (MAX6391), RESET2, R1, R2 to GND......-0.3V to +6.0V
Input Current (VCC, GND, CSRT, R1, R2, MR).................±20mA
Output Current (RESET1, RESET2)..................................±20mA
Continuous Power Dissipation (TA= +70°C)
8-Pin SOT23 (derate 5.26mW/°C above +70°C)...........421mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
UNITS
TA = 0°C to +85°C 1.0 5.5
VCC Range TA = -40°C to +85°C 1.2 5.5 V
Supply Current ICC No load 15 25 µA
MAX639_UA46
4.50 4.63 4.75
MAX639_UA44
4.25 4.38 4.50
MAX639_UA31
3.00 3.08 3.15
MAX639_UA29
2.85 2.93 3.00
MAX639_UA26
2.55 2.63 2.70
MAX639_UA23
2.25 2.32 2.38
MAX639_UA22
2.12 2.19 2.25
MAX639_UA17
1.62 1.67 1.71
VCC Reset Threshold VTH1
MAX639_UA16
1.54 1.58 1.61
V
RESET IN2 Threshold VTH2 VCC = 5V
610 625 640
mV
RESET IN2 Input Current 50 nA
VCC to RESET1 Delay tRD1 20
VCC or RESET IN2 to RESET2
Delay tRD2
VCC falling at 1mV/µs (Note 2) 10 µs
MAX6391/MAX6392
Dual-Voltage µP Supervisory Circuits
with Sequenced Reset Outputs
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 1.2V to 5.5V, TA= TMIN to TMAX, unless otherwise specified. Typical values are at VCC = +5V and TA= +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
UNITS
RESET1 Timeout Period tRP1
140 200 280
ms
CCSRT = 1500pF 2.2 3.1 4.0
RESET2 Timeout Period (Note 3)
tRP2 CCSRT = VCC
140 200 280
ms
VCC ≥ 1.0V,
TA = 0°C to +85°C 0.3
ISINK = 50µA,
reset asserted VCC ≥ 1.2V,
TA = -40°C to +85°C 0.3
ISINK = 1.2mA, reset asserted, VCC ≥ 2.5V 0.3
RESET_ Output Voltage Low VOL
ISINK = 3.2mA, reset asserted, VCC ≥ 4.25V 0.4
V
Open-Drain RESET Output
Leakage Current ILKG VCC ≥ VTH1, VRESET IN2 ≥ VTH2,
reset not asserted 1.0 µA
VCC ≥ 2.25V, ISOURCE = 500µA,
reset not asserted
Push-Pull RESET1 Output
Voltage High (MAX6392 only) VOH VCC ≥ 4.5V, ISOURCE = 800µA, reset not
asserted
0.8 x
VCC
V
VIL 0.8
VIH
VCC > 4.0V 2.4
VIL 0.3 x
VCC
MR Input
VIH
VCC < 4.0V
0.7 x
VCC
V
MR Minimum Pulse Width 50 µs
MR Glitch Rejection
100
ns
MR to RESET1 Delay tMR1 10 µs
MR to RESET2 Delay tMR2
100
ns
tMR Skew tMR1 - tMR2 10 µs
MR Pullup Resistance Pullup to VCC 35 47 60 kΩ
Reset Pullup Resistance RESET1 to R1 or RESET2 to R2 35 47 60 kΩ
Note 1: Overtemperature limits are guaranteed by design and not production tested. Devices tested at +25°C only.
Note 2: RESET2 asserts before RESET1 when VCC goes below the threshold for all supply voltage and temperature ranges.
Note 3: CSRT must be connected to either VCC (for fixed RESET2 timeout period) or an external capacitor (for user-
adjustable RESET2 timeout period).
MAX6391/MAX6392
Dual-Voltage µP Supervisory Circuits
with Sequenced Reset Outputs
4_______________________________________________________________________________________
Typical Operating Characteristics
(VCC = +5V, TA = +25°C, unless otherwise noted.)
10.8
11.0
11.4
11.2
11.6
11.8
-40 10-15 35 60 85
RESET2 TO RESET1 DELAY
vs. TEMPERATURE
MAX6391 toc04
TEMPERATURE (°C)
DELAY (µs)
200
225
250
275
300
-40 -15 10 35 60 85
RESET1 TIMEOUT PERIOD
vs. TEMPERATURE
MAX6391 toc05
TEMPERATURE (°C)
TIMEOUT DELAY (ms)
2.50
2.75
3.00
3.25
3.50
-40 -15 10 35 60 85
RESET1 TO RESET2 TIMEOUT PERIOD
vs. TEMPERATURE (CSRT = 1500pF)
MAX6391 toc06
TEMPERATURE (°C)
TIMEOUT DELAY (ms)
200
225
250
275
300
-40 -15 10 35 60 85
RESET1 TO RESET2 TIMEOUT PERIOD
vs. TEMPERATURE (CSRT TIED TO VCC)
MAX6391 toc07
TEMPERATURE (°C)
TIMEOUT DELAY (ms)
10
20
40
30
50
60
MAXIMUM TRANSIENT DURATION
vs. RESET COMPARATOR OVERDRIVE
MAX6391 toc08
OVERDRIVE (mV)
MAXIMUM TRANSIENT DURATION (µs)
110010 1000
RESET ASSERTS ABOVE
THIS LINE
17
16
15
14
13
-40 10-15 35 60 85
SUPPLY CURRENT vs. TEMPERATURE
MAX6391 toc01
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
20
21
22
23
24
25
26
27
28
-40 -15 10 35 60 85
VCC FALLING TO RESET1 DELAY VS.
TEMPERATURE
MAX6391 toc02
TEMPERATURE (°C)
DELAY (µs)
9
10
11
12
13
14
15
16
17
-40 -15 10 35 60 85
VCC FALLING TO RESET2 DELAY
vs. TEMPERATURE
MAX6391 toc03
TEMPERATURE (°C)
DELAY (µs)
MAX6391/MAX6392
Dual-Voltage µP Supervisory Circuits
with Sequenced Reset Outputs
_______________________________________________________________________________________ 5
Pin Description
PIN
MAX6391
MAX6392
NAME FUNCTION
11
RESET IN2
Input Voltage for RESET2 Monitor. High-impedance input for internal reset
comparator. Connect this pin to an external resistive-divider network to set the reset
threshold voltage.
22V
CC Supply Voltage and Input Voltage for Primary Supply Monitor
33CSRT
RESET2 Delay Set Capacitor. Connect to VCC for a fixed 140ms (min) timeout period
or to an external capacitor for a user-adjustable timeout period after VCC exceeds its
minimum threshold.
44GND Ground
55RESET2
Secondary Reset Output, Open-Drain, Active-Low. RESET2 changes from high to low
when either VCC or RESET IN2 drop below their thresholds. RESET2 remains low for a
user-adjustable timeout period (see CSRT) or a fixed 140ms (min) after VCC and
RESET IN2 meet their minimum thresholds.
66R2
47kΩ Internal Pullup Resistor for RESET2. Connect to external voltage for RESET2
high pullup.
77RESET1
Primary Reset Output, Open-Drain (MAX6391) or Push-Pull (MAX6392), Active-Low.
RESET1 changes from HIGH to LOW when the VCC input drops below the selected
reset threshold. RESET1 remains LOW for the reset timeout period after VCC exceeds
the minimum threshold.
8—R1
47kΩ Internal Pullup Resistor for RESET1. Connect to external voltage for RESET1
high pullup.
—8MR
Manual Reset, Active-Low, Internal 47kΩ Pullup to VCC. Pull LOW to force a reset.
RESET1 and RESET2 remain asserted as long as MR is LOW and for the RESET1 and
RESET2 timeout periods after MR goes HIGH. Leave unconnected or connect to VCC
if unused.
Detailed Description
Each device includes a pair of voltage monitors with
sequenced reset outputs. The first block monitors VCC
only (RESET1 output is independent of the RESET IN2
monitor). It asserts a reset signal (LOW) whenever VCC
is below the preset voltage threshold. RESET1 remains
asserted for at least 140ms after VCC rises above the
reset threshold. RESET1 timing is internally set in each
device. VCC voltage thresholds are available from
1.57V to 4.63V. In all cases VCC acts as the master
supply (all resets are asserted when VCC goes below
its selected threshold). The VCC input also acts as the
device power supply.
The second block monitors both RESET IN2 and VCC. It
asserts a reset signal (LOW) whenever RESET IN2 is
below the 625mV threshold or VCC is below its reset
threshold. RESET2 remains asserted for a fixed 140ms
(min) or a user-adjustable time period after RESET IN2
rises above the 625mV reset threshold and RESET1 is
deasserted. Resets are guaranteed valid for VCC down
to 1V.
The timing diagram in Figure 2 shows the reset timing
characteristics of the MAX6391/MAX6392. As shown in
Figure 2, RESET1 deasserts 140ms (min) (tRP1) after
VCC exceeds the reset threshold. RESET2 deasserts
tRP2 (140ms minimum or a user-adjustable timeout peri-
od) after RESET IN2 exceeds 625mV and RESET1 is
deasserted. When RESET IN2 drops below 625mV
while VCC is above the reset threshold, RESET2 asserts
within 10µs typ. RESET1 is unaffected when this hap-
pens. When VCC falls below VTH1, RESET2 always
asserts before RESET1 (tRD2 < tRD1).
MAX6391/MAX6392
Dual-Voltage µP Supervisory Circuits
with Sequenced Reset Outputs
6_______________________________________________________________________________________
FIXED RESET
TIMEOUT
PERIOD
MR
DETECT
FIXED OR
CAPACITOR-
ADJUSTABLE
RESET TIMEOUT
PERIOD
MR
PULLUP
VCC
RESET IN2
CSRT
MR
(MAX6392 ONLY)
1.25V
0.625V
VCC
VCC
(MAX6392
ONLY)
47kΩ
47kΩ
R1
(MAX6391 ONLY)
RESET1
RESET2
R2
Figure 1. Functional Diagram
VCC
RESET1
RESET IN2
RESET2
VTH1
VTH2
tRP1
tRP2
tRD1
tRD2
VTH1
VTH2
tRD2
tRP2
Figure 2. Timing Diagram
MAX6391/MAX6392
Dual-Voltage µP Supervisory Circuits
with Sequenced Reset Outputs
_______________________________________________________________________________________ 7
Applications Information
Selecting the Reset Timeout Capacitor
The RESET2 delay may be adjusted by the user with an
external capacitor connected from the CSRT pin to
ground. The MAX6391 includes a 600nA current source
that is switched to CCSRT to create a voltage ramp. The
voltage ramp is compared to the internal 1.25V refer-
ence to set the RESET2 delay period. The period is cal-
culated by:
∆t = C ✕∆V/I
where ∆V = 1.25V, I = 600nA, and C is the external
capacitor.
Simplifying,
tRP = 2.08 ✕106s / F ✕CCSRT
For CCSRT = 1500pF, tRP = 3.1ms
A fixed internal 140ms (min) reset delay time for
RESET2 may be chosen by connecting the CSRT pin to
VCC. The VCC to CSRT connection disables the voltage
ramp and enables a separate fixed delay counter
chain. The MAX6391 internally determines the CSRT
connection and provides the proper timing setup.
In all cases, RESET IN2 acts as the slave supply. VCC
can assert the RESET2 output but RESET IN2 will have
no effect on the RESET1 output.
Monitoring Voltages Other Than VCC
An external resistive-divider network is required at
RESET IN2 for most applications. The divider resistors,
R3 and R4, may be calculated by the following formula:
VRST = VTH2 ✕(R3 + R4)/R4
where VTH2 = 625mV (internal reference voltage) and
VRST is the desired reset threshold voltage. R4 may be
set to a conveniently high value (500kΩfor example, to
minimize current consumption) and the equation may
be solved for R3 by:
R3 = R4 ✕(VRST/VTH2 - 1)
For single-supply operations requiring two reset out-
puts (RESET1 before RESET2), connect RESET IN2
directly to VCC and adjust RESET2 timeout delay with
CCRST as desired.
Pullup Resistors
The MAX6391 includes open-drain outputs for both
RESET1 and RESET2. Two internal resistors, R1 and
R2, of 47kΩeach are provided with internal connec-
tions to RESET1 and RESET2. These resistors may be
connected to the appropriate external voltage for inde-
pendent VOH drive with no additional component
requirements.
The MAX6392 includes a manual reset option, MR, that
replaces the R1 pullup resistor. The active-low manual
reset input forces both RESET1 and RESET2 low.
RESET2 is driven active before RESET1 in all cases
(10µs typ). The resets follow standard reset timing
specifications after the manual reset is released. The
manual reset is internally pulled up to VCC through a
47kΩresistor.
Negative-Going VCC Transients
In addition to issuing a reset to the µP during power-up,
power-down, and brownout conditions, these devices
are relatively immune to short-duration, negative-going
VCC or RESET IN2 transients (glitches). The Typical
Operating Characteristics show the Maximum Transient
Duration vs. Reset Comparator Overdrive graph. The
graph shows the maximum pulse width that a negative-
going VCC transient may typically have without issuing
a reset signal. As the amplitude of the transient increas-
es, the maximum allowable pulse width decreases.
PART NUMBER
NOMINAL
THRESHOLD (V)
TOP MARK
MAX6391KA46 4.63 AAHJ
MAX6391KA44 4.38 AAHK
MAX6391KA31 3.08 AAHL
MAX6391KA29 2.93 AAHM
MAX6391KA26 2.63 AAHN
MAX6391KA23 2.32 AAHO
MAX6391KA22 2.19 AAHP
MAX6391KA17 1.67 AAHQ
MAX6391KA16 1.58 AAHR
MAX6392KA46 4.63 AAHS
MAX6392KA44 4.38 AAHT
MAX6392KA31 3.08 AAHU
MAX6392KA29 2.93 AAHV
MAX6392KA26 2.63 AAHW
MAX6392KA23 2.32 AAHX
MAX6392KA22 2.19 AAHY
MAX6392KA17 1.67 AAHZ
MAX6392KA16 1.58 AAIA
Selector Guide
Standard versions in bold face. Samples are typically available
for standard versions. Contact factory for availability.
MAX6391/MAX6392
Chip Information
TRANSISTOR COUNT: 810
PROCESS: BiCMOS
Dual-Voltage µP Supervisory Circuits
with Sequenced Reset Outputs
8_______________________________________________________________________________________
RSTIN2
R2
R3
R4
RESET2
RESET1
GND
MR
VCC
CSRT
CCSRT
VCC = 3.3V
VCC = 1.8V
MAX6392
RESET
MASTER
PROCESSOR
RESET
SLAVE
PROCESSOR
Typical Operating Circuit
1
2
8
7
SOT23-8
TOP VIEW
3
4
6
5
MAX6392
R2
RESET2GND
MR
RESET1VCC
CSRT
RESET IN2
Pin Configurations (continued)
MAX6391/MAX6392
Dual-Voltage µP Supervisory Circuits
with Sequenced Reset Outputs
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 9
©2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.
SOT23, 8L .EPS
REV.DOCUMENT CONTROL NO.APPROVAL
PROPRIETARY INFORMATION
TITLE:
3.002.60E
C
E1
E
BETWEEN 0.08mm AND 0.15mm FROM LEAD TIP.
8. MEETS JEDEC MO178.
8∞
0.60
1.75
0.30
L2
0∞
e1
e
L
1.50E1
0.65 BSC.
1.95 REF.
0.25 BSC.
GAUGE PLANE
SEATING PLANE C
C
L
PIN 1
I.D. DOT
(SEE NOTE 6)
L
C
L
C
A2
e1
D
DETAIL "A"
5. COPLANARITY 4 MILS. MAX.
NOTE:
7. SOLDER THICKNESS MEASURED AT FLAT SECTION OF LEAD
6. PIN 1 I.D. DOT IS 0.3 MM ÿ MIN. LOCATED ABOVE PIN 1.
4. PACKAGE OUTLINE INCLUSIVE OF SOLDER PLATING.
3. PACKAGE OUTLINE EXCLUSIVE OF MOLD FLASH & METAL BURR.
HEEL OF THE LEAD PARALLEL TO SEATING PLANE C.
2. FOOT LENGTH MEASURED FROM LEAD TIP TO UPPER RADIUS OF
1. ALL DIMENSIONS ARE IN MILLIMETERS.
L2
L
A1
A
0.45
1.30
0.15
1.45
MAX
0.28b
0.90A2
0.00A1
0.90
A
MIN
SYMBOL
3.00
0.20
2.80D
0.09
C
SEE DETAIL "A"
L
C
be
D1
21-0078
1
PACKAGE OUTLINE, SOT-23, 8L BODY
0
0
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)