4-170
FAST AND LS TTL DATA
OCTAL D-TYPE FLIP-FLOP
WITH 3-STATE OUTPUTS
The MC54/74F374 is a high-speed, low-power octal D-type flip-flop featur-
ing separate D-type inputs for each flip-flop and 3-state outputs for bus ori-
ented applications. A buffered Clock (CP) and Output Enable (OE) are com-
mon to all flip-flops.
•Edge-triggered D-Type Inputs
•Buffered Positive Edge-triggered Clock
•3-State Outputs for Bus-Oriented Applications
•ESD >4000 Volts
20 14
2 3 4 5 6 7 8 9 10
D0
OE O0D1O1D2
O2D3GNDO3
11121315171819 16
VCC O7D7D6O6D5
O5D4CPO4
1
CONNECTION DIAGRAM (TOP VIEW)
FUNCTION TABLE
Inputs Outputs
DnCP OE On
H L H
L L L
X X H Z
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
DW SUFFIX
SOIC
CASE 751D-03
20
1
N SUFFIX
PLASTIC
CASE 738-03
20 1
J SUFFIX
CERAMIC
CASE 732-03
20
1
MC54/74F374
OCTAL D-TYPE FLIP-FLOP
WITH 3-STATE OUTPUTS
FAST SCHOTTKY TTL
ORDERING INFORMATION
MC54FXXXJ Ceramic
MC74FXXXN Plastic
MC74FXXXDW SOIC
LOGIC SYMBOL
VCC = PIN 20
GND = PIN 10
3 4 7 8 13 14 17 18
11
1
2 5 6 9 12 15 16 19
D0 D1 D2 D3 D4 D5 D6 D7
CP
OE
O0 O1 O2 O3 O4 O5 O6 O7
4-171
FAST AND LS TTL DATA
MC54/74F374
FUNCTIONAL DESCRIPTION
The F374 consists of eight edge-triggered flip-flops with
individual D-type inputs and 3-state true outputs. The buffered
clock and buffered Output Enable are common to all flip-flops.
The eight flip-flops will store the state of their individual D
inputs that meet the setup and hold time requirements on the
LOW-to-HIGH Clock (CP) transition. With the Output Enable
(OE) LOW, the contents of the eight flip-flops are available at
the outputs. When the OE is HIGH, the outputs go to the high
impedance state. Operation of the OE input does not affect the
state of the flip-flops.
O7
D7
CP D
Q Q
O6
D6
CP D
Q Q
O5
D5
CP D
Q Q
O4
D4
CP D
Q Q
O3
D3
CP D
Q Q
O2
D2
CP D
Q Q
O1
D1
CP D
Q Q
O0
OE
CP
LOGIC DIAGRAM
D0
CP D
Q Q
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol Parameter Min Typ Max Unit Test Conditions
VIH Input HIGH Voltage 2.0 V Guaranteed Input HIGH Voltage
VIL Input LOW Voltage 0.8 V Guaranteed Input LOW Voltage
VIK Input Clamp Diode Voltage –1.2 V IIN = –18 mA VCC = MIN
VOH Output HIGH Voltage 54, 74 2.4 3.3 V IOH = – 3.0 mA VCC = 4.5 V
74 2.7 3.3 V IOH = – 3.0 mA VCC = 4.75 V
VOL Output LOW Voltage 0.35 0.5 V IOL = 24 mA VCC = MIN
IOZH Output OFF Current — HIGH 50 µA VOUT = 2.7 V VCC = MAX
IOZL Output OFF Current — LOW –50 µA VOUT = 0.5 V VCC = MAX
IIH Input HIGH Current 20 µA VIN = 2.7 V VCC = MAX
100 µA VIN = 7.0 V VCC = MAX
IIL Input LOW Current –0.6 mA VIN = 0.5 V VCC = MAX
IOS Output Short Circuit Current (Note 2) –60 –150 mA VOUT = 0 V VCC = MAX
ICCZ Power Supply Current (All Outputs OFF) 55 86 mA Dn, = GND
OE = 4.5 V VCC = MAX
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable device type.
2. Not more than one output should be shorted at a time, nor for more than 1 second.
4-172
FAST AND LS TTL DATA
MC54/74F374
GUARANTEED OPERATING RANGES
Symbol Parameter Min Typ Max Unit
VCC Supply Voltage 54, 74 4.5 5.0 5.5 V
TAOperating Ambient Temperature Range 54 –55 25 125 °C
74 0 25 70
IOH Output Current — HIGH 54, 74 –3.0 mA
IOL Output Current — LOW 54, 74 24 mA
AC CHARACTERISTICS
54/74F 54F 74F
TA = +25°C TA = –55°C to +125°C TA = 0°C to +70°C
VCC = +5.0 V VCC = 5.0 V ± 10% VCC = 5.0 V ± 10%
CL = 50 pF CL = 50 pF CL = 50 pF
Symbol Parameter Min Typ Max Min Max Min Max Unit
fmax Maximum Clock Frequency 100 60 70 MHz
tPLH Propagation Delay 4.0 6.5 8.5 4.0 10.5 4.0 10 ns
tPHL CP to On4.0 6.5 8.5 4.0 11 4.0 10
tPZH
Output Enable Time
2.0 9.0 11.5 2.0 14 2.0 12.5 ns
tPZL 2.0 5.8 7.5 2.0 10 2.0 8.5
tPHZ
Output Disable Time
2.0 5.3 7.0 2.0 8.0 2.0 8.0 ns
tPLZ 2.0 4.3 5.5 2.0 7.5 2.0 6.5
AC OPERATING REQUIREMENTS
54/74F 54F 74F
TA = +25°C TA = –55°C to +125°C TA = 0°C to +70°C
VCC = +5.0 V VCC = 5.0 V ± 10% VCC = 5.0 V ± 10%
Symbol Parameter Min Typ Max Min Max Min Max Unit
ts (H) Setup Time, HIGH or LOW 2.0 2.5 2.0
ts (L) Dn to CP 2.0 2.0 2.0 ns
th (H) Hold Time, HIGH or LOW 2.0 2.0 2.0
th (L) Dn to CP 2.0 2.5 2.0
tw (H) CP Pulse Width, 7.0 7.0 7.0 ns
tw (L) HIGH or LOW 6.0 6.0 6.0
