International Rectifier 233 Kansas Street
,
El Se
g
undo
,
CA 90245 USA
R
R
E
EF
FE
ER
RE
EN
NC
CE
E
D
D
E
ES
SI
IG
GN
N
IRDCiP2021C-2
IRDCiP2021C-2: 500kHz, 20A, Dual Output,
180o Out of Phase Synchronous Buck Converter
Featuring iP2021C and IR3623M
Overview
This reference design is capable of delivering a continuous current of 20A per
channel at an ambient temperature of 45ºC and airflow of 200LFM. Fig. 4 –
Fig. 22 provide performance graphs, thermal images, and waveforms. Fig. 1 –
Fig. 3 are provided to engineers as design references for implementing an
IR3623+iP2021C solution.
The components installed on this demoboard were selected based on operation
at an input voltage of 12V (+/-10%), a switching frequency of 500kHz (+/-
15%), and an output voltage of 1.5V at channel-1 and 2.5V at channel-2. Major
changes from these set points may require optimizing the control loop and/or
adjusting the values of input/output filters in order to meet the user’s specific application requirements. Refer to iP2021C and
IR3623 datasheets for more information.
IRDCiP2021C-2 Recommended Operating Conditions
(refer to the iP2021C datasheet for maximum operating conditions)
Input voltage: 8.5V – 14.5V
Output voltage: 0.8 – 5V
Switching Freq: 500kHz
Output current: This reference design is capable of delivering a continuous current of 20A per channel without heatsink
at an ambient temperature of 45ºC and airflow of 200LFM.
Demoboard Quic k Star t Guide
Initial Settings:
VOUT1 is set to 1.5V, but can be adjusted from 0.8V to 5V by changing the values of R11 and R15 according to the following
formula: R11 = R15 = (10k * 0.8) / (VOUT1 - 0.8)
VOUT2 is set to 2.5V, but can be adjusted from 0.8V to 5V by changing the values of R12 and R16 according to the following
formula: R12 = R16 = (10k * 0.8) / (VOUT2 - 0.8)
The switching frequency is set to 500kHz, but can be adjusted by changing the value of R26. See Fig. 4 for the relationship
between R26 and the switching frequency.
8/13/2009
IRDCiP2021C-2
Power Up Procedure:
1. Apply input voltage across VIN and PGND.
2. Apply load across VOUT pads and PGND pads.
3. Toggle the SEQ (SW1) and EN (SW2) switches to the ON position.
4. Adjust load to desired level. See recommendations above.
www.irf.com 2
IRDCiP2021C-2
3 www.irf.com
Demoboard Schematic
Fig. 1 Schematic
1 2 3 4 56
A
B
C
D
6
54321
D
C
B
A
1
Int ernat ion al Rec t if ier
233 Kans as S t.
iPOWIR G roup
El Segun do
CA 902451
B
28-Jul-2009 15:40:59
iP2021 & IR3623M Eval - Du al Output
Title:
Size: Number:
Date: Revision:
Sheet of
Time:
Tabloid
C15
100uF C17
10uF
L1
0.22uH
L2
0.22uH
R17
3.65K
R18
3.65K
C1
10u F 16V C2
10u F 16V C5
10u F 16V C6
10u F 16V
C3
10u F 16V C7
10u F 16V
T5
PGND
T3
VOUT1
T1
VIN
TP3
+VOUTS1
TP4
-VOUTS1
C4
10u F 16V C8
10u F 16V
R22
open
C16
100uF C18
10uF
C14
680uF T2
PGND
TP1
+VINS1
TP2 VIN
C19
100uF
C20
100uF
C21
10uF
B1
BOARD
C54
1uF
T6
PGND
T4
VOUT2
TP5
+VOUTS2
TP6
-VOUTS2
C24
100uF
R12 4.75K
R10 10K
R16
4.75K
R6
11K
R26
78.7K (500kHz)
R14 10K
C36
47.0pF
C42
100pF
C34
0.1uF
C33
0.1uF
TP23
SYNC
C31
1uF
C32
100pF
R8 200
C38
2700pF
C40
390pF
R11 11.5K
R9 10K
R15
11.5K
R5
11K
R13 10K
C35
47.0pF
C41
100pF
R7 200
C37
2700pF
C39
390pF
C23
100uF C25
10uF
C26
10uF
C22
10uF
1.8V
1.8V
R4
0
R21
open
R19
0
R20
0
PGOOD1
1
VREF
27
COMP1 18
Ph_En1 15
RT
30
SYNC
23
SS1
17
SS2
8
PWM1 14
VP1
25
TRACK1
22
VSEN1 21
SEQ
24
OCSET1 16
ENABLE
31
VCC
12
5V_SNS 32
FB1 19
VOUT3 13
TRACK2
3
PGND
29
GND
28
PGOOD2
2
VP2
26
COMP2 7
Ph_En2 10
PWM2 11
VSEN2 4
OCSET2 9
FB2 6
OCGnd
20
FAULT
5
PGND
0
U3
IRU3623M
TP18
TRACK2
TP17
TRACK1
TP24
FAULT
C28
100uF C30
10uF
R1
10K
R2
10K
R3
0
R25
30.1K
R23
10K R24
10K
TP15
PGOOD1
TP16
PGOOD2
C27
100uF C29
10uF
TRK2
TRK1
SEQ
SYNC
PGD1
PGD2
VREF
EN
SS1
SS2
RT
FLT
FB1
FB2
VSEN1
CC1
CC2
OC1
OC2
EN1
EN2
PWM1
PWM2
VSW1
VSW2
VSEN2
VIN
VOUT3
VOUT3
VOUT1
VOUT1
VOUT2
VIN
VOUT3
VOUT3
C13
0.1uF C43
1uF
R28 0
R33
10K
VOUT3
R35
0
R27 0
R34
10K
PH_EN1
PH_EN2
C51
100pF
C52
100pF
R36
0
VP2
R45
open
R29
open C49
open
R39
open VP2
R30
open C50
open
R40
open FB2
R46
open C57
open
R47
0
R44
open
R43
open
R42
open
R41
open
VOUT1
VOUT2
C45
1uF
C53
1uF
R31 0
R32 0
PWM1_IC
VCC
VDD
VDD
PWM2_IC
TP10
EN2
TP12
PWM2
TP9
EN1
TP11
PWM1
TP21
VSW1
TP22
VSW2
TP13
SS1
TP14
SS2
TP7
VDD
TP8
PGND
TP19
CC1
TP20
CC2
TP25
FB1
TP26
FB2
TP27
+VINS2
TP28
PGND
C55
1uF
C56
1uF
SW1
EN SW2
SEQ
TP29
VO1A
TP30
VO1B
TP31
VO2A
TP32
VO2B
TP35
VOUT1
TP33
PGND
TP36
VOUT2
TP34
PGND
TP37
PGND TP38
PGND
VOS1-
VOS2-
-VOUTS1 -VOUTS2
T7
PGND
T9
PGND
VIN 12
ENA1
11
PWM1
5
CVCC 4
VIN1 1
VIN2 9
PGND
7
VSW1 2
ENA2
10
PWM2
6
PGND
3
VSW2 8
U1
iP2021
OC1
VIN
C9
10u F 16V C10
10u F 16V C11
10u F 16V C12
10u F 16V
12
C44
220uF
12
C46
220uF
12
C47
open
12
C48
open
VOUT1
12
C58
220uF
12
C59
220uF
12
C60
open
12
C61
open
VOUT2
R37
0
R38
open
R48
0
R49
open
VOS1+
VOS1D+
VOS1D-
VOS1S+
VOS1S-
C62
open
59.0K (600kHz)
16.2K (1MHz)
IRDCiP2021C-2
Bill of Material
Quantity Designator Type 1 T yp e 2 Value 1 Value 2 T olerance Package Manufac 1 Manufac 1No
20 C1, C2, C3, C4, C5, C6, C7, C8, C9, C10,
C11, C12, C17, C18, C21, C22, C25, C26,
C29, C30 capacitor X7R 10.0uF 16V 10% 1206 TDK C3216X7R1C106KT
3 C13, C33, C34 capacit or X7R 0.100uF 50V 10% 0603 TDK C1608X7R1H104K
1 C14 capacitor electrolytic 680uF 16V 20% SMD Panasonic EEV-FK1C681GP
8 C15, C16, C19, C20, C23, C24, C27, C28 capacit or X5R 100uF 6.3V 20% 1210 TDK C3225X5R0J107M
7 C31, C43, C45, C53, C54, C55, C56 capacit or X7R 1.00uF 16V 10% 0603 TDK C1608X7R1C105KT
5 C32, C41, C42, C51, C52 capacitor NPO 100pF 50V 5% 0603 Phycomp 0603CG101J9B20
2 C35, C36 capacitor NPO 47.0pF 50V 5% 0603 KOA NPO 0603HTT D470J
2 C37, C38 capacitor X7R 2700pF 50V 10% 0603 KOA X7R0603HTTD272K
2 C39, C40 capacitor NPO 390pF 50V 5% 0603 KO A NPO 0603HTT D391J
4 C44, C46, C58, C59 capacit or tantalum polym er 220uF 2.5V 20% 7343 Sanyo 2R5TPC220M
2 L1, L2 inductor f erri t e 0.22uH 47A 10% SMT Vit ec 59PR9873N
10 R1, R2, R9, R10, R13, R14, R23, R24,
R33, R34 resistor thick fil m 10.0K 1/10W 1% 0603 KOA RK73H1J1002F
2 R11, R15 resistor t hi c k fi lm 11.5K 1/10W 1% 0603 KO A RK73H1JLTD1152F
2 R12, R16 resistor t hi c k fi lm 4.75K 1/10W 1% 0603 KO A RK73H1JLTD4751F
2 R17, R18 resistor t hi c k fi lm 3.65K 1/10W 1% 0603 KO A RK73H1JLTD3651F
2 R19, R20 resi st or thick fil m 0 1/8W <50 m 0805 RO HM MCR10E Z H J0 00
1 R25 resistor thi ck film 30.1K 1/10W 1% 0603 KO A RK73H1J3012F
1 R26 resistor thi c k fil m 78. 7K 1/10W 1% 0603 KO A RK73H1JLTD7872F
10 R3, R4, R27, R28, R31, R32, R36, R37,
R47, R48 resistor thick fil m 0 1/10W 1% 0603 K OA RK73Z1JLTD
1 R35 resist or thick fi lm 0 1/8W <50m 1206 Panasonic ERJ- 8 GEY0 R0 0
2 R5, R6 resistor thick fi lm 11.0K 1/10W 1% 0603 KOA RK73H1JLT D1102F
2 R7, R8 resist or thick film 200 1/ 10 W 1% 060 3 KO A RK73H 1J 20 00F
2 SW1, SW2 switch slide SPDT 30VDC 0.2A pcb mount E-Switch EG1218
18 TP1, TP2, TP3, TP4, TP5, TP6, TP7, TP8,
TP27, TP28, TP29, TP30, TP31, TP32,
TP33, TP34, TP35, TP36 hardware test point 90 mils 112 x 150 mils - 5016 Keystone 5016
20
TP9, TP10, TP11, TP12, TP13, TP14,
TP15, TP16, TP17, TP18, TP19, TP20,
TP21, TP22, TP23, TP24, TP25, TP26,
TP37, TP38
hardware test point 60 m il s 40 x 105 mi ls - 5015 Keystone 5015
1 U1 i P 2021 LGA unit rev a - - 7.65mm x 11m m IRF rev a
1 U3 IC analog PWM co ntroller -0. 5 - 16V -0. 5 - 16V -40 - 120° C MLPQ-32L IRF IR3623 M
www.irf.com 4
IRDCiP2021C-2
Demoboard Component Placement
Fig. 2
Top Layer (Face View)
Fig. 3
Bottom Layer (Through View)
5 www.irf.com
IRDCiP2021C-2
Description of Test Points and Connectors
1.
Jumpers
Jumper Pin Name Description
SW1 EN Board Enable ( switch Up = Off, Down = On ) - Vin pin on top
SW2 SEQ Sequence ( switch Up = Off, Down = On ) - Vin pin on top
2.
Test Points/Connectors
Test Point Pin Name Description
T1 / T2 VIN / PGND Vin supply voltage
TP2 / TP28 VIN / PGND Vin supply voltage sense
T3 / T5 / T7 VOUT1 / PGND / PGND Channel 1 Output, connect to DC load
TP35 / TP33 VOUT1 / PGND Channel 1 Output sense
TP21 / TP37 VSW1 / PGND Channel 1 switch node / PGND test points
TP9 EN1 Channel 1 Enable test po int
TP11 PWM1 Channel 1 PWM test point
TP19 CC1 Channel 1 error amplifier output
TP25 FB1 Channel 1 error amplifier non-inverting input
T4 / T6 / T9 VOUT2 / PGND / PGND Channel 2 Output, connect to DC load
TP36 / TP34 VOUT2 / PGND Channel 2 Output sense
TP22 / TP38 VSW2 / PGND Channel 2 switch node / PGND test points
TP10 EN2 Channel 2 Enable test point
TP12 PWM2 Channel 2 PWM test point
TP20 CC2 Channel 2 error amplifier output
TP26 FB2 Channel 2 error amplifier non-inverting input
TP7 / TP8 VDD / PGND Supply voltage fo r IRU3623 and iPOWIR module
TP23 SYNC External frequency synchronization input
TP17 TRACK1 Channel 1 tracking input, pull-up to Vout3 if not used
TP18 TRACK2 Track2 test point
TP15 PGOOD1 Channel 1 Power good test point
TP16 PGOOD2 Channel 2 Power good test point
TP13 SS1 Channel 1 Soft start test point
TP14 SS2 Channel 2 Soft start test point
TP24 FAULT Fault monitor test point
3.
Test points for Efficiency Measurement
Test Point Pin Name Description
TP1 / TP4 +VINS1 / -VOUTS1 Channel 1 Vin sense for efficiency measurement
TP3 / TP4 +VOUTS1 / -VOUTS1 Channel 1 Output sense for efficiency measurement
TP27 / TP6 +VINS2 / -VOUTS2 Channel 2 Vin sense for efficiency measurement
TP5 / TP6 +VOUTS2 / -VOUTS2 Channel 2 Output sense for efficiency measurement
www.irf.com 6
IRDCiP2021C-2
Test Results
Fig. 4 Relationship Between Switching Frequency and R26
VIN = 12V, VOUT1 = 1.5V, Iout1 = 10A, fsw = 500 kHz
Fig. 5 Channel-1 Power Up Sequence (C3: EN, C1: SS1, C4: VOUT1)
VIN = 12V, VOUT1 = 1.5V, Iout1 = 20A, fsw = 500 kHz
Fig. 6 Channel-1 Power Down Sequence (C3: EN, C1: SS1, C4: VOUT1)
7 www.irf.com
IRDCiP2021C-2
VIN = 12V, VOUT2 = 2.5V, Iout2 = 10A, fsw = 500 kHz
Fig. 7 Channel-2 Power Up Sequence (C3: EN, C1: SS2, C4: VOUT2)
VIN = 12V, VOUT2 = 2.5V, Iout2 = 20A, fsw = 500 kHz
Fig. 8 Channel-2 Power Down Sequence (C3: EN, C1: SS2, C4: VOUT2)
VIN = 12V, VOUT1 = 1.5V, fsw = 500 kHz
Fig. 9 Hiccup Mode Over Current Protection (C1: SS1, C4: Iout1, C3: VOUT1)
www.irf.com 8
IRDCiP2021C-2
VIN = 12V, VOUT1 = 1.5V, fsw = 500 kHz
Fig. 10 Hiccup Mode Over Current Protection (C1: SS1, C4: Iout1, C3: VOUT1)
VIN = 12V, VOUT1 = 1.5V, Iout1 = 20A, fsw = 500 kHz
Fig. 11 Deadtime and Ringing at Switch Node
VIN = 12V, VOUT1 = 1.5V, Iout1 = 10A, fsw = 500 kHz
Vp-p = 17.8 mV
Fig. 12 Channel-1 Output Voltage DC Ripple
9 www.irf.com
IRDCiP2021C-2
Fig. 13 Channel-1 Output Voltage DC Ripple
Fig. 14 Channel-2 Output Voltage DC Ripple
Fig. 15 Channel-2 Output Voltage DC Ripple
VIN = 12V, VOUT1 = 1.5V, Iout1 = 10A, fsw = 500 kHz
Vp-p = 18.8 mV
VIN = 12V, VOUT2 = 2.5V, Iout2 = 10A, fsw = 500 kHz
VIN = 12V, VOUT2 = 2.5V, Iout2 = 10A, fsw = 500 kHz
www.irf.com 10
IRDCiP2021C-2
Fig. 16 Load Transie nt Resp o nse (C 1: V OU T1 – AC , C 2: Iout1 divi ded by 2)
Fig. 17 Load Transie nt Resp o nse (C 1: V OU T2 – AC , C 2: Iout2 divi ded by 2)
VIN = 12V, VOUT1 = 1.5V, Iout1 =
f = 500 kHz 0-20A, 0.5A/µs,
sw
VIN = 12V, VOUT 0-20A, 0.5A/µs,
fsw = 500 kHz
2 = 2.5V, Iout2 =
11 www.irf.com
IRDCiP2021C-2
fc = 70 kHz
PM = 63
Fig. 18 Bode Plot (VIN = 12V, VOUT1 = 1.5V, Iout1 = 10A)
fc = 77 kHz
PM = 63
Fig. 19 Bode Plot (VIN = 12V, VOUT2 = 2.5V, Iout2 = 10A)
www.irf.com 12
IRDCiP2021C-2
VIN = 12V, V OUT1 = 1.5V, 200LFM, fsw = 500kHz, No Heatsink
0.7
1.1
1.5
1.9
2.3
2.7
3.1
3.5
02468101214161820
Channel-1 Load Current (A)
Power Loss (W)
45C
Room Te mpe r ature
Fig. 20 Channel-1 Po wer Loss
VIN = 12V, V OUT1 = 1.5V, 200LFM, fsw = 500kHz, No Heatsink
72%
74%
76%
78%
80%
82%
84%
86%
88%
90%
92%
0 2 4 6 8 101214161820
Channel-1 Load Current (A)
Efficiency
45C
Room Tem perat ure
Fig. 21 Channel-1 Efficiency
13 www.irf.com
IRDCiP2021C-2
VIN = 12V, V OUT2 = 2.5V, 200LFM, fsw = 500kHz, No Heatsink
1.2
1.5
1.8
2.1
2.4
2.7
3.0
3.3
3.6
3.9
02468101214161820
Channel-2 Load Current (A)
Power Loss (W)
45C
Room Te mpe r ature
Fig. 22 Channel-2 Po wer Loss
VIN = 12V, V OUT2 = 2.5V, 200LFM, fsw = 500kHz, No Heatsink
76%
78%
80%
82%
84%
86%
88%
90%
92%
94%
0 2 4 6 8 101214161820
Channel-2 Load Current (A)
Efficiency
45C
Room Tem perat ure
Fig. 23 Channel-2 Efficiency
www.irf.com 14
IRDCiP2021C-2
15 www.irf.com
Fig. 24 Thermal Image: Iout = 20A per channel, VIN = 12V, VOUT1 = 1.5V, VOU T2 = 2.5V, TA = 45oC, fsw =
500kHz, 200LFM, No Heatsink, Maximum Temperature = 104 oC
Refer to the following application notes for detailed guidelines and suggestions when
implementing iPOWIR Technology products:
AN-1043: Stabilize the Buck Converter with Transconductance Amplifier
This paper explains how to design the voltage compensation network for Buck Converters with
Transconductance Amplifier. The design methods and equations for Type II and Type III compensation
are given.
AN-1028: Recommended Design, Integration and Rework Guidelines for International Rectifier’s
iPowIR Technology BGA and LGA and Packages
This paper discusses optimization of the layout design for mounting iPowIR BGA and LGA packages on
printed circuit boards, accounting for thermal and electrical performance and assembly considerations.
Topics discussed include PCB layout placement, and via interconnect suggestions, as well as soldering,
pick and place, reflow, inspection, cleaning and re working recommendations.
AN-1030: Applyi ng iPOWIR Products in Your Thermal Environment
This paper explains how to use the Power Loss and SOA curves in the data sheet to validate if the
operating conditions and thermal environment are within the Safe Operating Area of the iPOWIR product.
AN-1047: Graphical solution for two branch heatsi nking Safe Operating Area
Detailed explanation of the dual axis SOA graph and how it is derived.
Use of this design for any application should be fully verified by the customer. International Rectifier
cannot guarantee suitability for your applications, and is not liable for any result of usage for such
applications including, without limitation, personal or property damage or violation of third party
intellectual property rights.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, Calif ornia 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903