Semiconductor Components Industries, LLC, 2003
February, 2003 - Rev. 7 Publication Order Number:
BC856ALT1/D
1
BC856ALT1 Series
Preferred Devices
General Purpose
Transistors
PNP Silicon
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating Symbol Value Unit
Collector-Emitter Voltage BC856
BC857
BC858, BC859
VCEO -65
-45
-30
V
Collector-Base Voltage BC856
BC857
BC858, BC859
VCBO -80
-50
-30
V
Emitter-Base Voltage VEBO -5.0 V
Collector Current - Continuous IC-100 mAdc
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Total Device Dissipation FR-5 Board,
(Note 1) TA = 25°C
Derate above 25°C
PD225
1.8 mW
mW/°C
Thermal Resistance,
Junction to Ambient RJA 556 °C/W
Total Device Dissipation Alumina
Substrate, (Note 2) TA = 25°C
Derate above 25°C
PD300
2.4 mW
mW/°C
Thermal Resistance,
Junction to Ambient RJA 417 °C/W
Junction and Storage Temperature TJ, Tstg - 55 to
+150 °C
1. FR-5 = 1.0 x 0.75 x 0.062 in.
2. Alumina = 0.4 x 0.3 x 0.024 in. 99.5% alumina.
SOT-23
CASE 318
STYLE 6
MARKING DIAGRAM
xx = Device Code
= (See Table Below)
M = Date Code
12
3
12
3
xx M
Preferred devices are recommended choices for future use
and best overall value.
COLLECTOR
3
1
BASE
2
EMITTER
Device Package Shipping
ORDERING INFORMATION
BC856ALT1 SOT-23 3000/Tape & Reel
BC856ALT3 SOT-23 10,000/Tape & Reel
BC856BLT1 SOT-23 3000/Tape & Reel
BC856BLT3 SOT-23 10,000/Tape & Reel
BC857ALT1 SOT-23 3000/Tape & Reel
BC857BLT1 SOT-23 3000/Tape & Reel
BC857BLT3 SOT-23 10,000/Tape & Reel
BC858ALT1 SOT-23 3000/Tape & Reel
BC858BLT1 SOT-23 3000/Tape & Reel
Mark
3A
3A
3B
3B
3E
3F
3F
3J
3K
BC858BLT3 SOT-23 10,000/Tape & Reel
BC858CLT1 SOT-23 3000/Tape & Reel
BC858CLT3 SOT-23 10,000/Tape & Reel
BC859BLT1 SOT-23 3000/Tape & Reel
BC859CLT1 SOT-23 3000/Tape & Reel
3K
3L
3L
4B
4C
BC857CLT1 SOT-23 3000/Tape & Reel3G
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BC859BLT3 SOT-23 10,000/Tape & Reel4B
BC859CLT3 SOT-23 10,000/Tape & Reel4C
ORDERING INFORMATION
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2
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Collector- Emitter Breakdown Voltage BC856 Series
(IC = -10 mA) BC857 Series
BC858, BC859 Series
V(BR)CEO -65
-45
-30
-
-
-
-
-
-
V
Collector- Emitter Breakdown Voltage BC856 Series
(IC = -10 µA, VEB = 0) BC857A, BC857B Only
BC858, BC859 Series
V(BR)CES -80
-50
-30
-
-
-
-
-
-
V
Collector- Base Breakdown Voltage BC856 Series
(IC = -10 A) BC857 Series
BC858, BC859 Series
V(BR)CBO -80
-50
-30
-
-
-
-
-
-
V
Emitter- Base Breakdown Voltage BC856 Series
(IE = -1.0 A) BC857 Series
BC858, BC859 Series
V(BR)EBO -5.0
-5.0
-5.0
-
-
-
-
-
-
V
Collector Cutoff Current (VCB = -30 V)
Collector Cutoff Current (VCB = -30 V, TA = 150°C) ICBO -
--
--15
-4.0 nA
µA
ON CHARACTERISTICS
DC Current Gain BC856A, BC857A, BC858A
(IC = -10 µA, VCE = -5.0 V) BC856B, BC857B, BC858B
BC857C, BC858C
(IC = -2.0 mA, VCE = -5.0 V) BC856A, BC857A, BC858A
BC856B, BC857B, BC858B, BC859B
BC857C, BC858C, BC859C
hFE -
-
-
125
220
420
90
150
270
180
290
520
-
-
-
250
475
800
-
Collector- Emitter Saturation Voltage
(IC = -10 mA, IB = -0.5 mA)
(IC = -100 mA, IB = -5.0 mA)
VCE(sat) -
--
--0.3
-0.65
V
Base- Emitter Saturation Voltage
(IC = -10 mA, IB = -0.5 mA)
(IC = -100 mA, IB = -5.0 mA)
VBE(sat) -
--0.7
-0.9 -
-
V
Base- Emitter On Voltage
(IC = -2.0 mA, VCE = -5.0 V)
(IC = -10 mA, VCE = -5.0 V)
VBE(on) -0.6
--
--0.75
-0.82
V
SMALL- SIGNAL CHARACTERISTICS
Current- Gain - Bandwidth Product
(IC = -10 mA, VCE = -5.0 Vdc, f = 100 MHz) fT100 - - MHz
Output Capacitance
(VCB = -10 V, f = 1.0 MHz) Cob - - 4.5 pF
Noise Figure
(IC = -0.2 mA, VCE = -5.0 Vdc, RS = 2.0 k, f = 1.0 kHz, BW = 200 Hz)
BC856, BC857, BC858 Series
BC859 Series
NF
-
--
-10
4.0
dB
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BC857/BC858/BC859
Figure 1. Normalized DC Current Gain
IC, COLLECTOR CURRENT (mAdc)
2.0
Figure 2. “Saturation” and “On” Voltages
IC, COLLECTOR CURRENT (mAdc)
−0.2
0.2
Figure 3. Collector Saturation Region
IB, BASE CURRENT (mA)
Figure 4. Base-Emitter Temperature Coefficient
IC, COLLECTOR CURRENT (mA)
−0.6
−0.7
−0.8
−0.9
−1.0
−0.5
0
−0.2
−0.4
−0.1
−0.3
1.6
1.2
2.0
2.8
2.4
−1.2
−1.6
−2.0
−0.02 −1.0 −10
0−20
−0.1
−0.4
−0.8
hFE, NORMALIZED DC CURRENT GAIN
V, VOLTAGE (VOLTS)
VCE, COLLECTOR−EMITTER VOLTAGE (V)
VB, TEMPERATURE COEFFICIENT (mV/ C)°θ
1.5
1.0
0.7
0.5
0.3
−0.2 −10 −100
−1.0
TA = 25°C
VBE(sat) @ IC/IB = 10
VCE(sat) @ IC/IB = 10
VBE(on) @ VCE = −10 V
VCE = −10 V
TA = 25°C
−55°C to +125°C
IC = −100 mA
IC = −20 mA
−0.5 −1.0 −2.0 −5.0 −10 −20 −50 −100 −200 −0.1 −0.2 −0.5 −1.0 −2.0 −5.0 −10 −20 −50 −100
IC = −200 mAIC = −50 mAIC =
−10 mA
Figure 5. Capacitances
VR, REVERSE VOLTAGE (VOLTS)
10
Figure 6. Current-Gain - Bandwidth Product
IC, COLLECTOR CURRENT (mAdc)
−0.4
1.0
80
100
200
300
400
60
20
40
30
7.0
5.0
3.0
2.0
−0.5
C, CAPACITANCE (pF)
f, CURRENT−GAIN − BANDWIDTH PRODUCT (MHz)
T
TA = 25°C
Cob
Cib
−0.6 −1.0 −2.0 −4.0 −6.0 −10 −20 −30 −40
150
−1.0 −2.0 −3.0 −5.0 −10 −20 −30 −50
VCE = −10 V
TA = 25°C
TA = 25°C
1.0
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4
BC856
Figure 7. DC Current Gain
IC, COLLECTOR CURRENT (mA)
Figure 8. “On” Voltage
IC, COLLECTOR CURRENT (mA)
−0.8
−1.0
−0.6
−0.2
−0.4
1.0
2.0
−0.1 −1.0 −10 −200
−0.2
0.2
0.5
−0.2 −1.0 −10 −200
TJ = 25°C
VBE(sat) @ IC/IB = 10
VCE(sat) @ IC/IB = 10
VBE @ VCE = −5.0 V
Figure 9. Collector Saturation Region
IB, BASE CURRENT (mA)
Figure 10. Base-Emitter Temperature Coefficient
IC, COLLECTOR CURRENT (mA)
−1.0
−1.2
−1.6
−2.0
−0.02 −1.0 −10
0−20
−0.1
−0.4
−0.8
VCE, COLLECTOR−EMITTER VOLTAGE (VOLTS)
VB, TEMPERATURE COEFFICIENT (mV/ C)°θ
−0.2 −2.0 −10 −200
−1.0
TJ = 25°C
IC =
−10 mA
hFE, DC CURRENT GAIN (NORMALIZED)
V, VOLTAGE (VOLTS)
VCE = −5.0 V
TA = 25°C
0−0.5 −2.0 −5.0 −20 −50 −100
−0.05 −0.2 −0.5 −2.0 −5.0
−100 mA
−20 mA
−1.4
−1.8
−2.2
−2.6
−3.0
−0.5 −5.0 −20 −50 −100
−55°C to 125°C
θVB for VBE
−2.0 −5.0 −20 −50 −100
Figure 11. Capacitance
VR, REVERSE VOLTAGE (VOLTS)
40
Figure 12. Current-Gain - Bandwidth Product
IC, COLLECTOR CURRENT (mA)
−0.1 −0.2 −1.0 −50
2.0 −2.0 −10 −100
100
200
500
50
20
20
10
6.0
4.0
−1.0 −10 −100
VCE = −5.0 V
C, CAPACITANCE (pF)
f, CURRENT−GAIN − BANDWIDTH PRODUCT
T
−0.5 −5.0 −20
TJ = 25°C
Cob
Cib
8.0
−50 mA −200 mA
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Figure 13. Thermal Response
t, TIME (ms)
1.0
r(t), TRANSIENT THERMAL
2.0 5.01.00.50.20.1
RESISTANCE (NORMALIZED)
0.7
0.5
0.3
0.2
0.1
0.07
0.05
0.03
0.02
0.01
20 5010 200 500100 1.0k 2.0k 5.0k 10k
Figure 14. Active Region Safe Operating Area
VCE, COLLECTOR−EMITTER VOLTAGE (V)
−200
−1.0
IC, COLLECTOR CURRENT (mA)
TA = 25°C
D = 0.5
0.2
0.1 0.05 SINGLE PULSE
SINGLE PULSE
BONDING WIRE LIMIT
THERMAL LIMIT
SECOND BREAKDOWN LIMIT
3 ms
TJ = 25°C
ZθJC(t) = r(t) RθJC
RθJC = 83.3°C/W MAX
ZθJA(t) = r(t) RθJA
RθJA = 200°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) − TC = P(pk) RθJC(t)
t1
t2
P(pk)
DUTY CYCLE, D = t1/t2
−100
−50
−10
−5.0
−2.0
−5.0 −10 −30 −45 −65 −100
1 s
BC558, BC559
BC557
BC556
The safe operating area curves indicate IC-VCE limits of
the transistor that must be observed for reliable operation.
Collector load lines for specific circuits must fall below the
limits indicated by the applicable curve.
The data of Figure 14 is based upon TJ(pk) = 150°C; TC or
TA is variable depending upon conditions. Pulse curves are
valid for duty cycles to 10% provided TJ(pk) 150°C. TJ(pk)
may be calculated from the data in Figure 13. At high case or
ambient temperatures, thermal limitations will reduce the
power that can be handled to values less than the limitations
imposed by the secondary breakdown.
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6
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values
into the equation for an ambient temperature TA of 25°C,
one can calculate the power dissipation of the device which
in this case is 225 milliwatts.
INFORMATION FOR USING THE SOT-23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the
total design. The footprint for the semiconductor packages
must be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
SOT-23
mm
inches
0.037
0.95
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
SOT-23 POWER DISSIPATION
PD = TJ(max) - TA
RθJA
PD = 150°C - 25°C
556°C/W = 225 milliwatts
The power dissipation of the SOT-23 is a function of th e
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipa-
tion. Power dissipation for a surface mount device is deter-
mined b y T J(max), the maximum rated junction temperature
of the die, RθJA, the thermal resistance from the device
junction to ambient, and the operating temperature, TA.
Using the values provided on the data sheet for the SOT-23
package, PD can be calculated as follows:
The 556°C/W for the SOT-23 package assumes the use
of the recommended footprint on a glass epoxy printed
circuit board to achieve a power dissipation of 225 milli-
watts. There are other alternatives to achieving higher
power dissipation from the SOT-23 package. Another
alternative would be to use a ceramic substrate or an
aluminum core board such as Thermal Clad. Using a
board material such as Thermal Clad, an aluminum core
board, the power dissipation can be doubled using the same
footprint.
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the
rated temperature of the device. When the entire device is
heated to a high temperature, failure to complete soldering
within a short time could result in device failure. There-
fore, the following items should always be observed in
order to minimize the thermal stress to which the devices
are subjected.
Always preheat the device.
The delta temperature between the preheat and
soldering should be 100°C or less.*
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference shall be a maximum of 10°C.
The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
Mechanical stress or shock should not be applied
during cooling.
* Soldering a device without preheating can cause exces-
sive thermal shock and stress which can result in damage
to the device.
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PACKAGE DIMENSIONS
SOT-23
(TO-236)
CASE 318-08
ISSUE AH
STYLE 6:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
DJ
K
L
A
C
BS
H
GV
3
12
DIM
A
MIN MAX MIN MAX
MILLIMETERS
0.1102 0.1197 2.80 3.04
INCHES
B0.0472 0.0551 1.20 1.40
C0.0350 0.0440 0.89 1.11
D0.0150 0.0200 0.37 0.50
G0.0701 0.0807 1.78 2.04
H0.0005 0.0040 0.013 0.100
J0.0034 0.0070 0.085 0.177
K0.0140 0.0285 0.35 0.69
L0.0350 0.0401 0.89 1.02
S0.0830 0.1039 2.10 2.64
V0.0177 0.0236 0.45 0.60
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
4. 318−03 AND −07 OBSOLETE, NEW STANDARD
318−08.
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changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
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liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
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PUBLICATION ORDERING INFORMATION
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2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051
Phone: 81-3-5773-3850
ON Semiconductor Website: http://onsemi.com
For additional information, please contact your local
Sales Representative.
BC856ALT1/D
Thermal Clad is a registered trademark of the Bergquist Company.
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