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Special Application
Endicott Research Group, Inc. (ERG) reserves the right to make changes in circuit design and/or
specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets
are current before placing orders. Information furnished by ERG is believed to be accurate and
reliable. However, no responsibility is assumed by ERG for its use.
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9
0
0
1
A
3
3
1
3
+Vin
5% - 100%
0
GND
Enable +
Disable -
GND
+Vin
(1)
+Vin
approx. 5 ms*
Enable / Disable
or PWM Input
ACout
ACreturn
ACout
ACreturn
Note 1 Low ESR type input by-pass capacitor (22 uF - 100 uF) may be required to reduce reflected ripple.
Note 2 VPWM from 2.4V to less than or equal to +Vin.
Note 3 Full brightness without PWM control requires that pin 5 be tied to +Vin, Pin 5 must be at 0V to turn off.
Note 4 Duty Cycle 5% - 100%.
GND
(2) VPWM
(3)
(4)
+
DMA22734