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Is Now Part of
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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
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2001 Fairchild Semiconductor Corporation FDG6331L Rev B11 (W)
FDG6331L
Integrated Load Sw itch
General Description
This device is particularly suited for compact power
management in portable electronic equipment where
2.5V to 8V input and 0.8A output current capability are
needed. This load switch integrates a sm all N-Channel
power MOSFET (Q1) that drives a large P-Channel
power MOSFET (Q2) in one tiny S C70-6 package.
Applications
Power managem ent
Load switch
Features
–0.8 A, –8 V . RDS(ON) = 260 m @ VGS = –4.5 V
RDS(ON) = 330 m @ V GS = –2.5 V
RDS(ON) = 450 m @ VGS = –1.8 V
Control MOSFE T (Q1) i ncludes Zener protec tion for
ESD ruggedness (>6KV Hum an body model)
High performance trench t echnology for extremel y
low RDS(ON)
Compac t industry standard SC70-6 surfac e mount
package
Pin 1
SC70-6
3
2
1
4
5
6
Q1
Q2
Vout,C1
Vout,C1
R2
Vin,R1
ON/OFF
R1,C1
See Application Circuit
Equivalent Circuit
V
DROP
+–
IN OU
T
ON/OFF
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol Parameter Ratings Units
VIN Gate-Source Voltage (Q2) ± 8 V
VON/OFF Gate-Source Voltage (Q1) –0.5 to 8 V
ILoad Load Current Continuous (Note 2) 0.8 A
– Pulsed (Note 2) 2.4
PD Maximum Power Dissipat i o n (Note 1) 0.3 W
TJ, TSTG Operating and St orage Junction Temperature Range –55 to +150 °C
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 415 °C/W
Package Marking and Ordering Information
Device Marki ng Device Reel Siz e Tape width Quantity
.31 FDG6331L 7’’ 8mm 3000 units
FDG6331L
tm
November 2014
FDG6331L Rev B1 (W)
Electrical Characteristics TA = 25°C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVIN Vin Breakdown Voltage VON/OFF = 0 V, I D = –250 µA 8 V
ILoad Zero Gate Volt age Drai n Current VIN = –6.4 V, VON/OFF = 0 V –1 µA
IFL Leakage Current, Forward VON/OFF = 0 V, VIN = 8 V 100 nA
IRL Leakage Current, Reverse VON/OFF = 0 V, VIN = –8 V –100 nA
On Characteristics (Note 2)
VON/OFF (th) Gate Threshold V ol t age VIN = VON/OFF, ID = –250 µA 0.4 0.9 1.5 V
RDS(on) Static Drain–Source
On–Resistance (Q2) VIN = 4.5 V, ID = –0.8 A
VIN =2.5 V, ID = –0.7 A
VIN = 1.8 V, ID = –0.6 A
155
193
248
260
330
450
m
RDS(on) Static Drain–Source
On–Resistance (Q1) VIN = 4.5 V, ID = 0.4A
VIN = 2.7 V, ID = 0.2 A 310
380 400
500 m
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Cont i nuous Drain–Source Diode Forward Current –0.25 A
VSD Drain–Source Di ode Forward
Voltage VON/OFF = 0 V, IS = –0.25 A(Note 2) –1.2 V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design whil e RθJA is determined by the user’s board design.
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
FDG6331L Load Switch Application Circuit
Q2
Q1
R1
IN OUT
ON/OFF LOAD
C1
R2
External Component Recommendation:
For additional i n-rush current cont rol , R2 and C1 can be added. For m ore i nf ormation, see applicati on not e AN1030.
FDG6331L
FDG6331L Rev B1 (W)
Typical Characteristics
0
0.2
0.4
0.6
0.8
1
0 0.4 0.8 1.2 1.6 2 2.4
-IL, (A)
-V
DROP
, (V)
TJ = 25OC
TJ = 125OC
VIN = -1.8V
VON/OFF = -1.5-8V
PW = 300us, D < 2%
0
0.2
0.4
0.6
0.8
1
0 0.4 0.8 1.2 1.6 2 2.4
-IL, (A)
-V
DROP
, (V)
TJ = 25OC
TJ = 125OC
VIN = -2.5V
VON/OFF = -1.5-8V
PW = 300us, D < 2%
Figure 1. Conduction Voltage Drop
Variation with Load Current. Figure 2. Conduction Voltage Drop
Variation with Load Current.
0
0.2
0.4
0.6
0.8
1
0 0.4 0.8 1.2 1.6 2 2.4
-IL, (A)
-V
DROP
, (V)
VIN = -4.5V
VON/OFF = -1.5-8V
PW = 300us, D < 2%
TJ = 125OC
TJ = 25OC
0
0.1
0.2
0.3
0.4
0.5
0.6
1.25 2 2.75 3.5 4.25 5
-VIN, INPUT VOLTAGE (V)
R
DS(ON)
, ON-RESIST ANCE ()
TJ = 25OC
TJ = 125OC
IL = -1A
VON/OFF = 1.5 - 8V
PW = 300us, D < 2%
Figure 3. Conduction Voltage Drop
Variation with Load Current. Figure 4. On-Resistance Variation
With Input Voltage
FDG6331L
Dimensional Outline and Pad Layout
https://www.fairchildsemi.com/evaluate/package-specifications/packageDetails.html?id=PN_NSC7 0-006
tor’s online packaging area for the most recent package drawings:
Always visit Fairchild Semiconduc
cifically the warranty therein, which covers Fairchild products. spe-
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expand the terms of Fairch ild’s
obtain the most recent revision. Package specifications do not ify or
ing and contact a Fairchild Semiconductor representative to ver
without notice. Please note the revision and/or date on the draw
e to customers considering Fairchild components. Drawings may change in any manner
Package drawings are provided as a servic
FDG6331L
FDG6331L Rev B1 (W)
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
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As used here in:
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AccuPower™
Awinda®
AX-CAP®*
BitSiC™
Build it Now™
CorePLUS™
CorePOWER™
CROSSVOLT
CTL™
Current Transfer Logic™
DEUXPEED®
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Fairchild®
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and Better™
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STEALTH™
SuperFET®
SuperSOT™-3
SuperSOT™-6
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SyncFET™
Sync-Lock™
®*
TinyBoost®
TinyBuck®
TinyCalc™
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TinyPower™
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TranSiC™
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TRUECURRENT®*
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Ultra FRFET™
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VCX™
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VoltagePlus™
XS™
Xsens™
仙童
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®
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Fairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Fairchild’s Anti-Counterfeiting Policy is also stated on our external website,
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Counterfeiting of semico nductor parts is a growing problem in t he industry. All manufact ures of semiconductor product s are experiencing counterfe iting of their
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Rev. I72
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WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
tm
®
FDG6331L
FDG6331L Rev B1 (W)
www.onsemi.com
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