BUK7506-55A; BUK7606-55A
TrenchMOS™ standard level FET
Rev. 02 — 03 July 2001 Product data
c
c
1. Description
N-channel enhancement mode field-effect power transistor in a plastic package using
TrenchMOS™ technology, featuring very low on-state resistance.
Product availability:
BUK7506-55A in SOT78 (TO-220AB)
BUK7606-55A in SOT404 (D2-PAK).
2. Features
TrenchMOS™ technology
Q101 compliant
175 °C rated
Standard level compatible.
3. Applications
Automotive and general purpose power switching:
12 V and 24 V loads
Motors, lamps and solenoids.
4. Pinning information
Table 1: Pinning - SOT78, SOT404, simplified outline and symbol
Pin Description Simplified outline Symbol
1 gate (g)
SOT78 (TO-220AB) SOT404 (D2-PAK)
2 drain (d)
3 source (s)
mb mounting base;
connected to drain (d)
MBK106
12
mb
313
2
MBK116
mb
s
d
g
MBB076
Philips Semiconductors BUK7506-55A; BUK7606-55A
TrenchMOS™ standard level FET
Product data Rev. 02 — 03 July 2001 2 of 15
9397 750 08421 © Philips Electronics N.V. 2001. All rights reserved.
5. Quick reference data
6. Limiting values
[1] Current is limited by power dissipation chip rating
[2] Continuous current is limited by package
Table 2: Quick reference data
Symbol Parameter Conditions Typ Max Unit
VDS drain-source voltage (DC) 55 V
IDdrain current (DC) Tmb =25°C; VGS =10V [1] 154 A
Ptot total power dissipation Tmb =25°C300 W
Tjjunction temperature 175 °C
RDSon drain-source on-state resistance VGS = 10 V; ID=25A
Tj=25°C 5.3 6.3 m
Tj= 175 °C13.2 m
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage (DC) 55 V
VDGR drain-gate voltage (DC) RGS =20kΩ−55 V
VGS gate-source voltage (DC) −±20 V
IDdrain current (DC) Tmb =25°C; VGS =10V;
Figure 2 and 3[1] 154 A
[2] 75 A
Tmb = 100 °C; VGS =10V;Figure 2 [2] 75 A
IDM peak drain current Tmb =25°C; pulsed; tp10 µs;
Figure 3 616 A
Ptot total power dissipation Tmb =25°C; Figure 1 300 W
Tstg storage temperature 55 +175 °C
Tjoperating junction temperature 55 +175 °C
Source-drain diode
IDR reverse drain current (DC) Tmb =25°C[1] 154 A
[2] 75 A
IDRM pulsed reverse drain current Tmb =25°C; pulsed; tp10 µs616 A
Avalanche ruggedness
WDSS non-repetitive avalanche energy unclamped inductive load; ID=75A;
VDS 55 V; VGS = 10 V; RGS =50;
starting Tmb =25°C
1.1 J
Philips Semiconductors BUK7506-55A; BUK7606-55A
TrenchMOS™ standard level FET
Product data Rev. 02 — 03 July 2001 3 of 15
9397 750 08421 © Philips Electronics N.V. 2001. All rights reserved.
VGS 4.5 V
Fig 1. Normalized total power dissipation as a
function of mounting base temperature. Fig 2. Continuous drain current as a function of
mounting base temperature.
Tmb =25°C; IDM single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
03na19
0
20
40
60
80
100
120
0 25 50 75 100 125 150 175 200
Pder
(%)
Tmb (oC)
03ne93
0
20
40
60
80
100
120
140
160
180
25 50 75 100 125 150 175 200
Tj (ºC)
ID
(A)
Capped at 75A due to package
Pder Ptot
Ptot 25 C
°
()
---------------------- 100%×=
Ider ID
ID25C
°
()
-------------------100%×=
03nf32
1
10
10
2
10
3
1 10 10
2
VDS (V)
ID
(A)
D.C.
100 ms
10 ms
RDSon = VDS / ID
1 ms
tp = 10 us
100 us
Capped at 75 A due to package
tp
tp
T
P
t
T
δ =
Philips Semiconductors BUK7506-55A; BUK7606-55A
TrenchMOS™ standard level FET
Product data Rev. 02 — 03 July 2001 4 of 15
9397 750 08421 © Philips Electronics N.V. 2001. All rights reserved.
7. Thermal characteristics
7.1 Transient thermal impedance
Table 4: Thermal characteristics
Symbol Parameter Conditions Value Unit
Rth(j-a) thermal resistance from junction to ambient vertical in still air; SOT78 package 60 K/W
mounted on printed circuit board;
minimum footprint; SOT404
package
50 K/W
Rth(j-mb) thermal resistance from junction to mounting
base Figure 4 0.5 K/W
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.
03nf33
Single Shot
0.2
0.1
0.05
0.02
10
-3
10
-2
10
-1
1
10
-6
10
-5
10
-4
10
-3
10
-2
10
-1
1
tp (s)
Zth(j-mb)
(K/W)
δ = 0.5
tp
tp
T
P
t
T
δ =
Philips Semiconductors BUK7506-55A; BUK7606-55A
TrenchMOS™ standard level FET
Product data Rev. 02 — 03 July 2001 5 of 15
9397 750 08421 © Philips Electronics N.V. 2001. All rights reserved.
8. Characteristics
Table 5: Characteristics
T
j
=25
°
C unless otherwise specified
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V(BR)DSS drain-source breakdown
voltage ID= 0.25 mA; VGS =0V
Tj=25°C55−−V
Tj=55 °C50−−V
VGS(th) gate-source threshold voltage ID= 1 mA; VDS =V
GS;
Figure 9
Tj=25°C234V
Tj= 175 °C1−−V
Tj=55 °C−−4.4 V
IDSS drain-source leakage current VDS = 55 V; VGS =0V
Tj=25°C0.05 10 µA
Tj= 175 °C−−500 µA
IGSS gate-source leakage current VGS =±20 V; VDS =0V 2 100 nA
RDSon drain-source on-state
resistance VGS =10V; I
D=25A;
Figure 7 and 8
Tj=25°C5.3 6.3 m
Tj= 175 °C−−13.2 m
Dynamic characteristics
Ciss input capacitance VGS =0V; V
DS =25V;
f = 1 MHz; Figure 12 4500 6000 pF
Coss output capacitance 960 1200 pF
Crss reverse transfer capacitance 510 850 pF
td(on) turn-on delay time VDD = 30 V; RL= 1.2 ;
VGS =10V; R
G=10;35 ns
trrise time 115 ns
td(off) turn-off delay time 155 ns
tffall time 110 ns
Ldinternal drain inductance from drain lead 6mm from
package to centre of die 4.5 nH
from contact screw on
mounting base to centre of
die SOT78
3.5 nH
from upper edge of drain
mounting base to centre of
die SOT404
2.5 nH
Lsinternal source inductance from source lead to source
bond pad 7.5 nH
Philips Semiconductors BUK7506-55A; BUK7606-55A
TrenchMOS™ standard level FET
Product data Rev. 02 — 03 July 2001 6 of 15
9397 750 08421 © Philips Electronics N.V. 2001. All rights reserved.
Source-drain diode
VSD source-drain (diode forward)
voltage IS= 30 A; VGS =0V;
Figure 15 0.85 1.2 V
trr reverse recovery time IS=20A;dI
S/dt = 100 A/µs
VGS =10 V; VDS =30V 80 ns
Qrrecovered charge 200 nC
Table 5: Characteristics
…continued
T
j
=25
°
C unless otherwise specified
Symbol Parameter Conditions Min Typ Max Unit
Tj=25°C; tp= 300 µsT
j=25°C; ID=25A
Fig 5. Output characteristics: drain current as a
function of drain-source voltage; typical values. Fig 6. Drain-source on-state resistance as a function
of gate-source voltage; typical values.
Tj=25°C
Fig 7. Drain-source on-state resistance as a function
of drain current; typical values. Fig 8. Normalized drain-source on-state resistance
factor as a function of junction temperature.
03nf29
0
50
100
150
200
250
300
350
400
0246810
VDS (V)
ID
(A)
4.5
5.5
6.5
7.5
8.5
20
14
12
109
VGS (V) =
03nf28
4
4.5
5
5.5
6
6.5
7
7.5
8
8.5
5 101520
VGS (V)
RDSon
(m)
03nf30
0
2
4
6
8
10
12
0 20 40 60 80 100 120
ID (A)
RDSon
(m)5.5
66.5
7
8
10
VGS (V) =
03ne89
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
2.2
-60 -20 20 60 100 140 180
Tj (oC)
a
aRDSon
RDSon 25 C
°
()
----------------------------
=
Philips Semiconductors BUK7506-55A; BUK7606-55A
TrenchMOS™ standard level FET
Product data Rev. 02 — 03 July 2001 7 of 15
9397 750 08421 © Philips Electronics N.V. 2001. All rights reserved.
ID= 1 mA; VDS =V
GS Tj=25°C; VDS =V
GS
Fig 9. Gate-source threshold voltage as a function of
junction temperature. Fig 10. Sub-threshold drain current as a function of
gate-source voltage.
Tj=25°C; VDS =25V V
GS = 0 V; f = 1 MHz
Fig 11. Forward transconductance as a function of
drain current; typical values. Fig 12. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values.
03aa32
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
-60 -20 20 60 100 140 180
VGS(th)
Tj (oC)
(V) max.
typ.
min
03aa35
10-6
10-5
10-4
10-3
10-2
10-1
012345
maxtypmin
VGS (V)
ID
(A)
03nf26
0
20
40
60
80
0 20406080100
ID (A)
gfs
(S)
03nf31
0
1000
2000
3000
4000
5000
6000
7000
8000
9000
10
-2
10
-1
1 10 10
2
VDS (V)
C
(pF)
Ciss
Coss
Crss
Philips Semiconductors BUK7506-55A; BUK7606-55A
TrenchMOS™ standard level FET
Product data Rev. 02 — 03 July 2001 8 of 15
9397 750 08421 © Philips Electronics N.V. 2001. All rights reserved.
VDS =25V T
j=25°C; ID=25A
Fig 13. Transfer characteristics: drain current as a
function of gate-source voltage; typical values. Fig 14. Gate-source voltage as a function of turn-on
gate charge; typical values.
VGS =0V
Fig 15. Reverse diode current as a function of reverse diode voltage; typical values.
03nf27
0
20
40
60
80
100
120
0246
VGS (V)
ID
(A)
Tj = 175 oC
Tj = 25 oC
03nf25
0
2
4
6
8
10
0 20 40 60 80 100 120
QG (nC)
VGS
(V)
VDD = 44 V
VDD = 14 V
03nf24
0
20
40
60
80
100
0.0 0.2 0.4 0.6 0.8 1.0
VSD (V)
IS
(A)
Tj = 175 oCTj = 25 oC
Philips Semiconductors BUK7506-55A; BUK7606-55A
TrenchMOS™ standard level FET
Product data Rev. 02 — 03 July 2001 9 of 15
9397 750 08421 © Philips Electronics N.V. 2001. All rights reserved.
9. Package outline
Fig 16. SOT78 (TO-220AB).
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
SOT78 SC-463-lead TO-220AB
D
D1
q
p
L
123
L1(1)
b1
ee
b
0 5 10 mm
scale
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78
DIMENSIONS (mm are the original dimensions)
AE
A1
c
Note
1. Terminals in this zone are not tinned.
Q
L2
UNIT A1b1D1ep
mm 2.54
qQ
AbD
cL2
max.
3.0 3.8
3.6
15.0
13.5 3.30
2.79 3.0
2.7 2.6
2.2
0.7
0.4 15.8
15.2
0.9
0.7 1.3
1.0
4.5
4.1 1.39
1.27 6.4
5.9 10.3
9.7
L1(1)
EL
00-09-07
01-02-16
mounting
base
Philips Semiconductors BUK7506-55A; BUK7606-55A
TrenchMOS™ standard level FET
Product data Rev. 02 — 03 July 2001 10 of 15
9397 750 08421 © Philips Electronics N.V. 2001. All rights reserved.
Fig 17. SOT404 (D2-PAK).
UNIT A
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
mm
A1D1
D
max. EeL
pHDQc
2.54 2.60
2.20
15.80
14.80
2.90
2.10
11 1.60
1.20 10.30
9.70
4.50
4.10 1.40
1.27 0.85
0.60 0.64
0.46
b
DIMENSIONS (mm are the original dimensions)
SOT404
0 2.5 5 mm
scale
Plastic single-ended surface mounted package (Philips version of D2-PAK); 3 leads
(one lead cropped) SOT404
e e
E
b
D1
HD
D
Q
Lp
c
A1
A
13
2
mounting
base
99-06-25
01-02-12
Philips Semiconductors BUK7506-55A; BUK7606-55A
TrenchMOS™ standard level FET
Product data Rev. 02 — 03 July 2001 11 of 15
9397 750 08421 © Philips Electronics N.V. 2001. All rights reserved.
10. Soldering
Dimensions in mm.
Fig 18. Reflow soldering footprint for SOT404.
handbook, full pagewidth
MSD057
solder lands
solder resist
occupied area
solder paste
10.50
7.40
7.50
1.50
1.70
10.60
1.20
1.30
1.55
5.08
10.85
0.30
2.15
8.35
2.25
4.60
0.20
3.00
4.85
7.95
8.15
8.075
8.275
5.40
1.50
Philips Semiconductors BUK7506-55A; BUK7606-55A
TrenchMOS™ standard level FET
Product data Rev. 02 — 03 July 2001 12 of 15
9397 750 08421 © Philips Electronics N.V. 2001. All rights reserved.
11. Revision history
Table 6: Revision history
Rev Date CPCN Description
02 20010703 - Product Specification; second version; supersedes Rev. 01 of 19981217.
Combined BUK7506-55A and BUK7606-55A into one data sheet. Updated Figure 2,
Figure 3, and Figure 4.
01 19981217 - Product Specification; initial versions
Philips Semiconductors BUK7506-55A; BUK7606-55A
TrenchMOS™ standard level FET
Product data Rev. 02 — 03 July 2001 13 of 15
9397 750 08421 © Philips Electronics N.V. 2001 All rights reserved.
12. Data sheet status
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
13. Definitions
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
14. Disclaimers
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to
make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve
design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
licence or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products
are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Data sheet status[1] Product status[2] Definition
Objective data Development This data sheet contains data from the objective specification for product development.Philips Semiconductors
reserves the right to change the specification in any manner without notice.
Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a
later date. Philips Semiconductors reserves the right to change the specification without notice, in order to
improve the design and supply the best possible product.
Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to
make changes at any time in order to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change Notification (CPCN) procedure
SNW-SQ-650A.
Philips Semiconductors BUK7506-55A; BUK7606-55A
TrenchMOS™ standard level FET
Product data Rev. 02 — 03 July 2001 14 of 15
9397 750 08421 © Philips Electronics N.V. 2001. All rights reserved.
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(SCA72)
© Philips Electronics N.V. 2001. Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
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thereof does not convey nor imply any license under patent- or other industrial or
intellectual property rights.
Date of release: 03 July 2001 Document order number: 9397 750 08421
Contents
Philips Semiconductors BUK7506-55A; BUK7606-55A
TrenchMOS™ standard level FET
1 Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
4 Pinning information. . . . . . . . . . . . . . . . . . . . . . 1
5 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
6 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
7 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
7.1 Transient thermal impedance. . . . . . . . . . . . . . 4
8 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5
9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12
12 Data sheet status. . . . . . . . . . . . . . . . . . . . . . . 13
13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
14 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13