5 - Offset Null 2
6 - Output
7-V
CC+
8 - N.C.
WIDE BANDWIDTH
SINGLE J-FET OPERATIONAL AMPLIFIERS
.HIGH INPUT IMPEDANCE J-FET INPUT
STAGE
.HIGH SPEED J-FET OP-AMPs : up to 20MHz,
50V/µs
.OFFSETVOLTAGEADJUSTMENTDOESNOT
DEGRADEDRIFT OR COMMON-MODE
REJECTION AS IN MOSTOF MONOLITHIC
AMPLIFIERS
.INTERNAL COMPENSATION AND LARGE
DIFFERENTIALINPUTVOLTAGECAPABILITY
(UPTO VCC+)
TYPICAL APPLICATIONS
.PRECISIONHIGHSPEEDINTEGRATORS
.FASTD/A AND CONVERTERS
.HIGH IMPEDANCE BUFFERS
.WIDEBAND, LOWNOISE, LOWDRIFT
AMPLIFIERS
.LOGARITHIMICAMPLIFIERS
.PHOTOCELLAMPLIFIERS
.SAMPLEAND HOLD CIRCUITS
N
DIP8
(Plastic Package)
1
2
3
4
8
6
5
7
1 - Offset Null 1
2 - Inverting input
3 - Non-inverting input
4-V
CC-
PIN CONNECTIONS (top view)
DESCRIPTION
These circuits are monolithicJ-FET input operational
amplifiers incorporatingwell matched,high voltage
J-FET on the same chip with standardbipolartransis-
tors.
This amplifiers feature low input bias and offset cur-
rents,low inputoffsetvoltage and input offsetvoltage
drift,coupledwithoffsetadjustwhichdoesnotdegrade
driftor common-moderejection.
Thedevicesarealsodesignedforhighslewrate,wide
bandwidth,extremelyfastsettlingtime,lowvoltageand
current noise and a low 1/f noiselevel.
LF155-LF255-LF355
LF156-LF256-LF356
LF157-LF257-LF357
October1997
D
SO8
(Plastic Micropackage)
ORDER CODES
Part Number Temperature
Range Package
ND
LF355, LF356, LF357 0oC, +70oC••
LF255, LF256, LF257 –40oC, +105oC••
LF155, LF156, LF157 –55oC, +125oC••
Example : LF355N
1/14
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VCC Supply Voltage ±2V
V
i
Input Voltage - (note 1) ±20 V
Vid Differential Input Voltage ±40 V
Ptot Power Dissipation 570 mW
Output Short-circuit Duration Infinite
Toper Operating Free Air Temperature Range LF155-LF156-LF157
LF255-LF256-LF257
LF355-LF356-LF357
-55 to +125
–40 to +105
0to70
o
C
T
stg Storage Temperature Range –65 to 150 oC
SCHEMATIC DIAGRAM
Vio ADJUSTMENT
LF155 - LF156 - LF157
2/14
ELECTRICAL CHARACTERISTICS
LF155, LF156, LF157 -55oC≤Tamb ≤+125oC±5V
≤VCC ≤
±20V
LF255, LF256, LF257 -40oC≤Tamb ≤+105oC±5V
≤VCC ≤
±20V
(unless otherwise specified)
Symbol Parameter LF155 - LF156 - LF157
LF255 - LF256 - LF257 Unit
Min. Typ. Max.
Vio Input Offset Voltage (RS=50Ω)
T
amb =25
o
C
T
min. ≤Tamb ≤Tmax. LF155, LF156, LF157
LF255, LF256, LF257
35
7
6.2
mV
Iio Input Offset Current - (note 3)
Tamb =25
o
C
T
min. ≤Tamb ≤Tmax. LF155, LF156, LF157
LF255, LF256, LF257
320
20
1
pA
nA
nA
Iib Input Bias Current - (note 3)
Tamb =25
o
C
T
min. ≤Tamb ≤Tmax. LF155, LF156, LF157
LF255, LF256, LF257
20 100
50
5
pA
nA
nA
Avd Large Signal Voltage Gain (RL=2kΩ,V
O=±10V, VCC =±15V)
Tamb =25
o
C
T
min. ≤Tamb ≤Tmax. 50
25 200 V/mV
SVR Supply Voltage Rejection Ratio - (note 4) 85 100 dB
ICC Supply Current (VCC =±15V, no load)
Tamb =25
o
C LF155, LF255
LF156, LF256
LF157, LF257
2
5
5
4
7
7
mA
DVio Input Offset Voltage Drift (RS=50Ω)5µV/oC
DVio/Vio Change in Average Temperature Coefficient with Vio adjust
(RS=50Ω) - (note 2) 0.5 µV/oC
Vicm Input Common Mode Voltage Range (VCC =±15V, Tamb =25
o
C) ±11 +15.1
-12 V
CMR Common Mode Rejection Ratio 85 100 dB
±VOPP Output Voltage Swing (VCC =±15V)
RL= 10kΩ
RL=2kΩ±12
±10 ±13
±12
V
GBP Gain Bandwidth Product (VCC =±15V, Tamb =25
o
C)
LF155, LF255
LF156, LF256
LF157, LF257
2.5
5
20
MHz
SR Slew Rate (VCC =±15V, Tamb =25
o
C)
AV= 1 LF155, LF255
LF156, LF256
AV= 5 LF157, LF257 7.5
30
5
12
50
V/µs
RiInput Resistance (Tamb =25
o
C) 1012 Ω
CiInput Capacitance (VCC =±15V, Tamb =25
o
C) 3 pF
enEquivalent Input Noise Voltage
(VCC =±15V, Tamb =25
o
C, RS= 100Ω)
f = 1000Hz LF155, LF255
LF156, LF256
LF157, LF257
f = 100Hz LF155, LF255
LF156, LF256
LF157, LF257
20
12
12
25
15
15
nV
√Hz
inEquivalent Input Noise Current
(VCC =±15V, Tamb =25
o
C, f = 100Hz or f = 1000Hz) 0.01 pA
√Hz
tsSettling Time (VCC =±15V, Tamb =25
o
C) - (note 5)
LF155, LF255
LF156, LF256
LF157, LF257
4
1.5
1.5
µs
LF155 - LF156 - LF157
3/14
Notes: 1. Unless otherwise specified the absolute maximum negative input voltage is equal tothe negative power supply voltage.
2. The temperature coefficient of theadjusted input offset voltage changes only a small amount (0.5µV/oC typically) for each mV
of adjustment fromits original unadjusted value. Common-mode rejection and open loop voltage gain are alsounaffected by
offsetadjustment.
3. The input bias currents arejunction leakage currents which approximately double for every 10oC increase in thejunction
temperature Tamb. Due to limitedproduction test time,the input biascurrentmeasured is correlated to junction temperature.
In anormal operation the junction temperature rises above the ambienttemperature as a result of internal power dissipation,
Ptot-Tamb =Tamb +Rth(j-a)xPtot where Rth(j-a)is the thermal resistance from junction to ambient. Use of a heatsink is recommended
f inputcurrents are to be kept to aminimum.
4. Supply voltage rejection is measured for both supply magnitudes increasing or decreasing simultaneously, in accordance with
common practise.
5. Settlingtime isdefined here,fora unity gain inverter connection using 2kΩresistors for the LF155, LF156 series. It is the time
required for the error voltage (the voltage at theinverting input pin on theamplifier) to settle to within 0.01% of its final value from
the time a 10V step input is applied to the inverter. For the LF157 series AV= -5, thefeedback resistor from output to inputis 2kΩ
and the output step is 10V.
ELECTRICAL CHARACTERISTICS
LF355, LF356, LF357 0oC≤Tamb ≤+70oCV
CC =±15V, (unless otherwise specified)
Symbol Parameter LF355 - LF356 - LF357 Unit
Min. Typ. Max.
Vio Input Offset Voltage (RS=50Ω)
T
amb =25
o
C
T
min. ≤Tamb ≤Tmax. 310
13
mV
Iio Input Offset Current - (note 3)
Tamb =25
o
C
T
min. ≤Tamb ≤Tmax. 350
2pA
nA
Iib Input Bias Current - (note 3)
Tamb =25
o
C
T
min. ≤Tamb ≤Tmax. 20 200
8pA
nA
Avd Large Signal Voltage Gain (RL=2kΩ,V
O=±10V)
Tamb =25
o
C
T
min. ≤Tamb ≤Tmax. 25
15 200 V/mV
SVR Supply Voltage Rejection Ratio - (note 4) 80 100 dB
ICC Supply Current (no load)
Tamb =25
o
C LF355
LF356, LF357 2
54
10
mA
DVio Input Offset Voltage Drift (RS=50Ω) - (note 2) 5 µV/oC
DVio/Vio Change in Average Temperature Coefficient with Vio adjust
(RS=50Ω)0.5 µV/oC
per mV
Vicm Input Common Mode Voltage Range (Tamb =25
o
C) ±10 +15.1
-12 V
CMR Common Mode Rejection Ratio 80 100 dB
±VOPP Output Voltage Swing RL= 10kΩ
RL=2kΩ±12
±10 ±13
±12 V
GBP Gain Bandwidth Product Tamb =25
o
C) LF355
LF356
LF357
2.5
5
20
MHz
SR Slew Rate (Tamb =25
o
C)
AV= 1 LF355
LF356
AV= 5 LF357
5
12
50
V/µs
RiInput Resistance (Tamb =25
o
C) 1012 Ω
CiInput Capacitance (Tamb = 25oC) 3 pF
enEquivalent Input Noise Voltage (Tamb =25
o
C, RS= 100Ω)
f = 1000Hz LF355
LF356, LF357
f = 100Hz LF355
LF356, LF357
20
12
25
15
nV
√Hz
inEquivalent Input Noise Current
(Tamb =25
o
C, f = 100Hz or f = 1000Hz) 0.01 pA
√Hz
tsSettling Time (Tamb =25
o
C) - (note 5) LF355
LF356, LF357 4
1.5 µs
LF155 - LF156 - LF157
4/14
The LF155, LF156, LF157 series areop amps with J-
FETinputtransistors. TheseJFETshavelarge reverse
breakdown voltagesfromgatetosource or drain elimi-
natingtheneedofclampsacrosstheinputs.Therefore
large differentialinput voltagescan easily be accom-
modatedwithoutalarge increaseof inputcurrents.The
maximum differential input voltage is independentof
thesupplyvoltage.However,neitherofthenegativein-
put voltagesshouldbe allowed to exceedthenegative
supplyas this will cause large currentsto flowwhich
can resultin a destroyedunit. Exceedingthe negative
common-modelimit oneitherinputwillcauseareversal
of thephasetotheoutputandforce the amplifieroutput
to the correspondinghigh or lowstate. Exceedingthe
negativecommon-mode limit on bothinputs will force
theamplifieroutputtoahighstate.Inneithercasedoes
a latch occur since raising the input back within the
common-moderangeagain puts theinput stageand
thustheamplifierin anormaloperatingmode.Exceed-
ingthepositivecommon-modelimitonasingleinputwill
notchangethephaseoftheoutputhowever,ifbothin-
putsexceedthelimit, theoutputof theamplifier will be
forcedtoahighstate.Theseamplifierswill operatewith
the common-mode input voltageequal to the positive
supply. In fact, the common-modevoltagecanex-
ceedthepositivesupplybyapproximately100mVinde-
pendentof supply volt-age and over thefull operat-
ingtemperaturerange.The positive suplly can there-
forebeusedasareferenceonaninputas,forexample,
in asupplycurrentmonitorand/orlimiter. Precautions-
shouldbetakentoensurethatthepowersupplyforthe
integratedcircuitneverbecomesre-versedinpolarity
orthattheunitisnotinadvertentlyin-stalledbackwards
in a socket asan unilimited current surge throughthe
resultingforward diodewithin theIC couldcausefusin-
goftheinternalconductorsandresultinadestroyedunit.
Becausetheseamplifiers are JFET ratherthan MOS-
FET input op amps they do not require special han-
dling.
AllofthebiascurrentsintheseamplifiersaresetbyFET
currentsources. The drain currents for the amplifiers
are therefore essentially independent of supply volt-
ages.
Aswith most amplifiers,careshouldbetakenwithlead
dress,componentsplacementandsupply decoupling
inordertoensurestability.Forexample,resistorsfrom
theoutputtoan input shouldbe placedwith thebody
close totheinputtominimiz ”pickup”andmaximize the
frequencyof the feedbackpole by minimizing the ca-
pacitancefromthe input to ground.
A feedbackpole is createdwhenthe feedbackaround
any amplifier is resistive. The parallel resistance and
capacitancefromtheinput of thedevice(usuallythe in-
vertinginput)toacgroundsetthefrequencyofthepole.In
many instances the frequencyof this pole is much
greaterthantheexpected3 dBfrequencyof the closed
loopgainand consequentlythereisnegligible effect on
stability margin. However, if the feedbackpoleis less
than approximately six time the expected 3 dB fre-
quencyaleadcapacitorshould beplaced fromthe out-
putto theinputof theop amp.Thevalueofthatadded
capacitorshould be suchthattheRC time constantof
thiscapacitorand theresistance itparallels isgreater
than or equal to the original feedbackpole time con-
stant.
APPLICATION HINTS
LF155 - LF156 - LF157
5/14
LF155 - LF156 - LF157
6/14
LF155 - LF156 - LF157
7/14
LF155 - LF156 - LF157
8/14
LF155 - LF156 - LF157
9/14
LF155 - LF156 - LF157
10/14
LF155 - LF156 - LF157
11/14
LF155 - LF156 - LF157
12/14
PM-DIP8.EPS
PACKAGE MECHANICAL DATA
8 PINS - PLASTIC DIP
Dimensions Millimeters Inches
Min. Typ. Max. Min. Typ. Max.
A 3.32 0.131
a1 0.51 0.020
B 1.15 1.65 0.045 0.065
b 0.356 0.55 0.014 0.022
b1 0.204 0.304 0.008 0.012
D 10.92 0.430
E 7.95 9.75 0.313 0.384
e 2.54 0.100
e3 7.62 0.300
e4 7.62 0.300
F 6.6 0260
i 5.08 0.200
L 3.18 3.81 0.125 0.150
Z 1.52 0.060
DIP8.TBL
LF155 - LF156 - LF157
13/14
PM-SO8.EPS
PACKAGE MECHANICAL DATA
8 PINS - PLASTIC MICROPACKAGE (SO)
Dimensions Millimeters Inches
Min. Typ. Max. Min. Typ. Max.
A 1.75 0.069
a1 0.1 0.25 0.004 0.010
a2 1.65 0.065
a3 0.65 0.85 0.026 0.033
b 0.35 0.48 0.014 0.019
b1 0.19 0.25 0.007 0.010
C 0.25 0.5 0.010 0.020
c1 45o(typ.)
D 4.8 5.0 0.189 0.197
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 3.81 0.150
F 3.8 4.0 0.150 0.157
L 0.4 1.27 0.016 0.050
M 0.6 0.024
S8
o
(max.)
SO8.TBL
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsi-
bility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON
Microelectronics. Specifications mentioned in this publicationare subject to change without notice. This publication supersedes
and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical
components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics.
1997 SGS-THOMSON Microelectronics – Printed in Italy – All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - Canada - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco
The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom- U.S.A.
ORDER CODE :
LF155 - LF156 - LF157
14/14
