OPA452TAG3 - Texas Instruments

OPA452

7-Lead

Straight-Formed

TO-220 (TA)

NOTE: Tabs are electrically connected to V– supply.

NCV– VO

V+

VIN–

VIN+

123456

Flag

7-Lead

DDPAK (FA)

Surface-Mount

NCV– VO

V+

VIN–

VIN+

123456

Flag

7-Lead

Stagger-Formed

TO-220 (TA-1)

NCV– VO

V+

VIN–

VIN+

123456

Flag

80V, 50mA

OPERATIONAL AMPLIFIERS

FEATURES

●WIDE POWER-SUPPLY RANGE:

±10V to ±40V

●HIGH OUTPUT LOAD DRIVE:

50mA Continuous

●WIDE OUTPUT VOLTAGE SWING: 1V to Rail

●FULLY PROTECTED:

Thermal Shutdown

Output Current-Limited

●WIDE OPERATING TEMPERATURE RANGE:

–40°C TO +125°C

●PACKAGE OPTIONS:

TO220-7

DDPACK-7 Surface-Mount

APPLICATIONS

●PIEZOELECTRIC CELLS

●TEST EQUIPMENT

●AUDIO AMPLIFIERS

●TRANSDUCER DRIVERS

●SERVO DRIVERS

DESCRIPTION

The OPA452 and OPA453 are low-cost operational amplifi-

ers with high-voltage (80V) and high-current capabilities

(50mA). The OPA452 is unity-gain stable and has a gain

bandwidth product of 1.8MHz, whereas the OPA453 is opti-

mized for gains greater than 5 and has a 7.5MHz bandwidth.

The OPA452 and OPA453 are internally protected against

over-temperature conditions and current overloads. Power

supplies in the range of ±10V to ±40V can be used. Unlike

most other power op amps, the OPA452 and OPA453 have

ensured specifications over the entire power-supply range.

These laser-trimmed, monolithic integrated circuits provide

excellent low-level accuracy along with wide output swing.

Special design considerations assure that the product is

easy to use and free from phase inversion problems often

found in other amplifiers.

The OPA452 and OPA453 are available in TO220-7 and

DDPAK-7 options. They are specified for a junction tempera-

ture range of –40°C to +125°C.

OPA452

OPA453

SBOS127C – JULY 2000 – REVISED NOVEMBER 2003

www.ti.com

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

OPA452, 453

2SBOS127C

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Supply Voltage, V+ to V–................................................................... 80V

Signal Input Terminals, Voltage(2) .................. (V–) – 0.5V to (V+) + 0.5V

Current(2) ...................................................... 5mA

Output Short-Circuit ................................................................. Continuous

Operating Temperature ..................................................–55°C to +125°C

Storage Temperature .....................................................–65°C to +150°C

Junction Temperature.................................................................... +150°C

Lead Temperature (soldering 10s, TO-220) ................................... 300°C

(soldering 3s, DDPAK) ..................................... 240°C

NOTES: (1) Stresses above these ratings may cause permanent damage.

Exposure to absolute maximum conditions for extended periods may degrade

device reliability. (2) Input terminals are diode-clamped to the power-supply

rails. Input signals that can swing more than 0.5V beyond the supply rails

should be current limited to 5mA or less.

PACKAGE/ORDERING INFORMATION

For the most current package and ordering information, see the

Package Option Addendum located at the end of this data

sheet.

ELECTROSTATIC

DISCHARGE SENSITIVITY

This integrated circuit can be damaged by ESD. Texas Instru-

ments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling

and installation procedures can cause damage.

ESD damage can range from subtle performance degrada-

tion to complete device failure. Precision integrated circuits

may be more susceptible to damage because very small

parametric changes could cause the device not to meet its

published specifications.

ABSOLUTE MAXIMUM RATINGS(1)

OPA452, 453 3

SBOS127C www.ti.com

ELECTRICAL CHARACTERISTICS: OPA452; VS = ±10V to ±40V

Boldface limits apply over the specified junction temperature range, TJ = –40°C to +125°C.

At TJ = +25°C, RL = 3.8kΩ connected to ground, and VOUT = 0V, unless otherwise noted.

OPA452TA, FA

PARAMETER CONDITION MIN TYP MAX UNITS

OFFSET VOLTAGE

Input Offset Voltage VOS VS = ±40V, VCM = 0V, IO = 0V ±1±3mV

over Temperature ±6mV

Drift dVOS/dT ±5µV/°C

vs Power Supply PSRR VS = ±10V to ±40V, VCM = 0V 5 30 µV/V

over Temperature 45 µV/V

INPUT BIAS CURRENT(1)

Input Bias Current IBVS = ±40V, VCM = 0V ±7±100 pA

Input Offset Current IOS VS = ±40V, VCM = 0V ±1±100 pA

NOISE

Input Voltage Noise Density enf = 1kHz 21 nV/

√Hz

Current Noise Density inf = 1kHz 9 fA/

√Hz

INPUT VOLTAGE RANGE

Common-Mode Voltage Range VCM (V–) + 5 (V+) – 0.5 V

Common-Mode Rejection Ratio CMRR VS = ±40V, –35V < VCM < 39.5V 86 94 dB

over Temperature VS = ±40V, –35V < VCM < 39.5V 76 dB

INPUT IMPEDANCE

Differential 1013 || 2 Ω || pF

Common-Mode VS = ±40V, –35V < VCM < 39.5V 1013 || 6 Ω || pF

OPEN-LOOP GAIN

Open-Loop Voltage Gain AOL IO = 10mA, –VS + 2V < VO < +VS – 2V 105 110 dB

over Temperature IO = 10mA, –VS + 2V < VO < +VS – 2V 107 dB

IO = 50mA, –VS + 4V < VO < +VS – 4V 96 110 dB

over Temperature

= 50mA, –V

+ 5V < V

< +V

– 5.5V

105 dB

FREQUENCY RESPONSE

Gain-Bandwidth Product GBW VS = ±40V 1.8 MHz

Slew Rate SR VS = ±40V +7.2/–10 V/µs

Settling Time: 0.1%

VS = ±40V, G = +1, 10V Step, CL = 100pF

2µs

0.01%

VS = ±40V, G = +1, 10V Step, CL = 100pF

5µs

Overload Recovery Time VIN • Gain = VS1µs

Total Harmonic Distortion + Noise THD+N VS = ±40V, VO = 30Vp-p, G = 5 0.0008 %

f = 1kHz, RL = 2kΩ

OUTPUT

Voltage Output VOUT IO = 50mA (V–) + 4.0 (V+) – 4V

over Temperature IO = 50mA (V–) + 5 (V+) – 5.5 V

Voltage Output IO = 10mA (V–) + 2 (V+) – 2V

over Temperature IO = 10mA (V–) + 2 (V+) – 2V

Output Current ±50 mA

Short-Circuit Current ISC ±125 mA

Capacitive Load Drive CLOAD See Typical Characteristic

SHUTDOWN FLAG

Thermal Shutdown Status Output

Normal Operation VS = ±40V 0.1 1.0 µA

Thermally Shutdown VS = ±40V 100 140 165 µA

Junction Temperature

Shutdown +160 °C

Reset from Shutdown +145 °C

POWER SUPPLY

Supply Voltage Range VS±10 ±40 V

Quiescent Current (per amplifier) IQIO = 0 ±5.5 ±6.5 mA

over Temperature ±7.5 mA

TEMPERATURE RANGE

Specified Range (junction) TJ–40 +125 °C

Operating Range (junction) TJ–55 +125 °C

Storage Range (ambient) TA–65 +150 °C

Thermal Resistance

TO200-7 3°C/W

DDPAK-7 3°C/W

NOTE: (1) All tests are high-speed tested at +25°C ambient temperature. Effective junction temperature is +25°C, unless otherwise noted.

OPA452, 453

4SBOS127C

www.ti.com

ELECTRICAL CHARACTERISTICS: OPA453; VS = ±10V to ±40V

Boldface limits apply over the specified junction temperature range, TJ = –40°C to +125°C.

At TJ = +25°C, RL = 3.8kΩ connected to ground, and VOUT = 0V, unless otherwise noted.

OPA453TA, FA

PARAMETER CONDITION MIN TYP MAX UNITS

OFFSET VOLTAGE

Input Offset Voltage VOS VS = ±40V, VCM = 0V, IO = 0V ±1±3mV

over Temperature ±6mV

Drift dVOS/dT ±5µV/°C

vs Power Supply PSRR VS = ±10V to ±40V, VCM = 0V 5 30 µV/V

over Temperature 45 µV/V

INPUT BIAS CURRENT(1)

Input Bias Current IBVS = ±40V, VCM = 0V ±7±100 pA

Input Offset Current IOS VS = ±40V, VCM = 0V ±1±100 pA

NOISE

Input Voltage Noise Density enf = 1kHz 21 nV/

√Hz

Current Noise Density inf = 1kHz 9 fA/

√Hz

INPUT VOLTAGE RANGE

Common-Mode Voltage Range VCM (V–) + 5 (V+) – 0.5 V

Common-Mode Rejection Ratio CMRR VS = ±40V, –35V < VCM < 39.5V 86 94 dB

over Temperature VS = ±40V, –35V < VCM < 39.5V 76 dB

INPUT IMPEDANCE

Differential 1013 || 2 Ω || pF

Common-Mode VS = ±40V, –35V < VCM < 39.5V 1013 || 6 Ω || pF

OPEN-LOOP GAIN

Open-Loop Voltage Gain AOL IO = 10mA, –VS + 2V < VO < +VS – 2V 105 110 dB

over Temperature IO = 10mA, –VS + 2V < VO < +VS – 2V 107 dB

IO = 50mA, –VS + 4V < VO < +VS – 4V 96 110 dB

over Temperature

= 50mA, –V

+ 5V < V

< +V

– 5.5V

105 dB

FREQUENCY RESPONSE

Gain-Bandwidth Product GBW VS = ±40V 7.5 MHz

Slew Rate SR VS = ±40V +23/–38 V/µs

Settling Time: 0.1%

VS = ±40V, G = +5, 10V Step, CL = 100pF

1µs

0.01%

VS = ±40V, G = +5, 10V Step, CL = 100pF

1.5 µs

Overload Recovery Time VIN • Gain = VS1µs

Total Harmonic Distortion + Noise THD+N VS = ±40V, VO = 30Vp-p, G = 5 0.0008 %

f = 1kHz, RL = 2kΩ

OUTPUT

Voltage Output VOUT IO = 50mA (V–) + 4.0 (V+) – 4V

over Temperature IO = 50mA (V–) + 5 (V+) – 5.5 V

Voltage Output IO = 10mA (V–) + 2 (V+) – 2V

over Temperature IO = 10mA (V–) + 2 (V+) – 2V

Output Current ±50 mA

Short-Circuit Current ISC ±125 mA

Capacitive Load Drive CLOAD See Typical Characteristic

SHUTDOWN FLAG

Thermal Shutdown Status Output

Normal Operation VS = ±40V 0.1 1.0 µA

Thermally Shutdown VS = ±40V 100 140 165 µA

Junction Temperature

Shutdown +160 °C

Reset from Shutdown +145 °C

POWER SUPPLY

Supply Voltage Range VS±10 ±40 V

Quiescent Current (per amplifier) IQIO = 0 ±5.5 ±6.5 mA

over Temperature ±7.5 mA

TEMPERATURE RANGE TJ

Specified Range (junction) TJ–40 +125 °C

Operating Range (junction) TA–55 +125 °C

Storage Range (ambient) –65 +150 °C

Thermal Resistance

TO200-7 3°C/W

DDPAK-7 3°C/W

NOTE: (1) All tests are high-speed tested at +25°C ambient temperature. Effective junction temperature is +25°C, unless otherwise noted.

OPA452, 453 5

SBOS127C www.ti.com

TYPICAL CHARACTERISTICS

At TJ = +25°C, VS = ±40V, and RL = 3.8kΩ, unless otherwise noted.

All temperatures are junction temperatures unless otherwise noted. Refer to the Applications Information section to calculate junction temperatures from ambient

temperatures for a specific configuration.

140

120

100

–20

–40

–20

–40

–60

–80

–100

–120

–140

–160

–180

1 10 100 1k 10k 100k 1M 10M

Frequency (Hz)

Gain (dB)

OPEN-LOOP GAIN AND PHASE vs FREQUENCY

Phase (°)

Phase

Gain OPA452

140

120

100

–20

–40

–20

–40

–60

–80

–100

–120

–140

–160

–180

1 10 100 1k 10k 100k 1M 10M

Frequency (Hz)

Gain (dB)

OPEN-LOOP GAIN AND PHASE vs FREQUENCY

Phase (°)

Phase

OPA453

Gain

120

100

01 10 100 1k 10k 100k 1M 10M

Frequency (Hz)

CMRR (dB)

COMMON-MODE REJECTION RATIO vs FREQUENCY

140

120

100

20 1 10 100 1k 10k 100k 1M 10M

Frequency (Hz)

PSRR (dB)

POWER-SUPPLY REJECTION RATIO vs FREQUENCY

–PSRR

+PSRR

100

INPUT VOLTAGE AND CURRENT NOISE

SPECTRAL DENSITY vs FREQUENCY

Voltage Noise (nV/√Hz)

Current Noise (fA/√Hz)

10 100 1k 10k 100k 1M

Frequency (Hz)

0.1

0.01

0.001

0.0001

TOTAL HARMONIC DISTORTION + NOISE

vs FREQUENCY

Frequency (Hz)

10 100 1k 10k 100k

THD+N (%)

= +5

= 30Vp-p

= 600Ω, 2kΩOPA452

600Ω

2kΩ

OPA453

600Ω

2kΩ

OPA452, 453

6SBOS127C

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TYPICAL CHARACTERISTICS (Cont.)

At TJ = +25°C, VS = ±40V, and RL = 3.8kΩ, unless otherwise noted.

All temperatures are junction temperatures unless otherwise noted. Refer to the Applications Information section to calculate junction temperatures from ambient

temperatures for a specific configuration.

01k 10k 100k 1M

Frequency (Hz)

Maximum Output Voltage (Vp-p)

MAXIMUM OUTPUT VOLTAGE SWING

vs FREQUENCY

Without Slew-Induced

Distortion

OPA452

OPA453

OUTPUT VOLTAGE SWING vs OUTPUT CURRENT

(V+)

(V+) – 2

(V+) – 4

(V+) – 6

(V–) – 8

(V–) + 4

(V–) + 2

(V–)0 20 40 60 80 100 120

Output Current (mA)

Output Voltage Swing (V)

+85°C

+25°C

–55°C

+85°C

–55°C

160

140

120

100

60–55 –35 –15 5 25 6545 85 105 125

Temperature (°C)

Short-Circuit Current (mA)

5.7

5.5

5.3

QUIESCENT CURRENT AND SHORT-CIRCUIT

CURRENT vs TEMPERATURE

+ISC

–ISC

Quiescent Current (mA)

0–55 –35 –15 5 25 6545 85 105 125

Temperature (°C)

Gain Bandwidth (MHz)

GAIN BANDWIDTH PRODUCT

vs TEMPERATURE

OPA453

OPA452

120

110

100

70–55 –35 –15 5 25 6545 85 105 125

Temperature (°C)

AOL, PSRR, and CMRR (dB)

OPEN-LOOP GAIN, POWER-SUPPLY

REJECTION RATIO, AND COMMON-MODE

REJECTION RATIO vs TEMPERATURE

AOL

PSRR

CMRR

10000

1000

100

0.1–55 –35 –15 5 25 6545 85 105 125

Temperature (°C)

Current (pA)

INPUT BIAS CURRENT AND INPUT

OFFSET CURRENT vs TEMPERATURE

–IB

IOS

+IB

OPA452, 453 7

SBOS127C www.ti.com

TYPICAL CHARACTERISTICS (Cont.)

At TJ = +25°C, VS = ±40V, and RL = 3.8kΩ, unless otherwise noted.

All temperatures are junction temperatures unless otherwise noted. Refer to the Applications Information section to calculate junction temperatures from ambient

temperatures for a specific configuration.

–5–40 –30 –20 –10 0 302010 40

Common-Mode Voltage (V)

Current (pA)

INPUT BIAS CURRENT AND INPUT OFFSET CURRENT

vs COMMON-MODE VOLTAGE

–I

–3–2–10123

Offset Voltage (mV)

Percentage of Amplifiers (%)

OFFSET VOLTAGE

PRODUCTION DISTRIBUTION

5–55 –35 –15 5 25 45 65 85 105 125

Temperature (°C)

Slew Rate (V/µs)

SLEW RATE vs TEMPERATURE

–Slew (OPA453)

+Slew (OPA453)

–Slew (OPA452)

+Slew (OPA452)

100

11 10 100

Gain (V/V)

Settling Time (µs)

SETTLING TIME vs CLOSED-LOOP GAIN

0.01%

OPA452

OPA453

0.01%

0.1%

Offset Voltage Drift (µV/°C)

Amplifiers (%)

OFFSET VOLTAGE DRIFT DISTRIBUTION

2 3 4 5 6 7 8 9 101112131415161718

130

120

110

–55 10 20 30 40

Temperature (°C)

Short-Circuit Current (mA)

QUIESCENT CURRENT AND SHORT-CIRCUIT

CURRENT vs TEMPERATURE

–I

Quiescent Current (mA)

OPA452, 453

8SBOS127C

www.ti.com

TYPICAL CHARACTERISTICS (Cont.)

At TJ = +25°C, VS = ±40V, and RL = 3.8kΩ, unless otherwise noted.

All temperatures are junction temperatures unless otherwise noted. Refer to the Applications Information section to calculate junction temperatures from ambient

temperatures for a specific configuration.

00.01 0.1 1 10 32

Load Capacitance

Overshoot (%)

SMALL-SIGNAL OVERSHOOT

vs LOAD CAPACITANCE

G = +1

G = –6G = –8

OPA452

OPA453

G = –1

G = –4

G = –2

LARGE-SIGNAL STEP RESPONSE

(G = 1, CL = 100pF)

10V/div

2.5µs/div

OPA452

LARGE-SIGNAL STEP RESPONSE

(G = 5, CL = 100pF)

10V/div

2.5µs/div

OPA453

SMALL-SIGNAL STEP RESPONSE

(G = 1, CL = 100pF)

20V/div

1µs/div

OPA452

SMALL-SIGNAL STEP RESPONSE

(G = 5, CL = 100pF)

20V/div

500ns/div

OPA453

SMALL-SIGNAL STEP RESPONSE

(G = –1, CL = 1000pF)

20V/div

2.5µs/div

OPA452

OPA452, 453 9

SBOS127C www.ti.com

APPLICATIONS INFORMATION

Figure 1 shows the OPA452 connected as a basic noninverting

amplifier. The OPA452 can be used in virtually any op amp

configuration. The OPA453 is designed for use in configura-

tions with gains of 5 or greater. Power-supply terminals

should be bypassed with 0.1µF capacitors, or greater, near

the power-supply pins. Be sure that the capacitors are

appropriately rated for the power-supply voltage used. The

OPA452 and OPA453 can supply output currents up to

50mA with excellent performance.

FIGURE 1. Basic Circuit Connections.

CURRENT LIMIT

The OPA452 and OPA453 are designed with internal cur-

rent-limiting circuitry that limits the output current to approxi-

mately 125mA. The current limit varies slightly with increas-

ing junction temperature and supply voltage, as shown in the

Typical Characteristics. Current limit, in combination with the

thermal protection circuitry, provides protection from most

types of overload conditions including short-circuit to ground.

THERMAL PROTECTION

The OPA452 and OPA453 have thermal shutdown circuitry

that protects the amplifier from damage caused by overload

conditions. The thermal protection circuitry disables the out-

put when the junction temperature reaches approximately

160°C, allowing the device to cool. When the junction tem-

perature cools to approximately 140°C, the output circuitry is

automatically re-enabled.

The thermal shutdown function is not intended to replace

proper heat sinking. Activation of the thermal shutdown

circuitry is an indication of excessive power dissipation or an

inadequate heat sink. Continuously running the amplifier into

thermal shutdown can degrade reliability.

The Thermal Shutdown Indicator (Flag) pin can be monitored

to determine if shutdown is occurring. During normal opera-

tion, the current output from the flag pin is typically 50nA.

During shutdown, the current output from the flag pin in-

creases to 140µA (typical). This current output allows for

easy interfacing to external logic. Figure 2 shows two ex-

amples implementing this function.

FIGURE 2. Thermal Shutdown Indicator.

G = 1+

0.1µF

10µF

OPA452

V–

V+

10µF

0.1µF

Flag

(optional)

Flag

100µA to

165µA

HCT

OPA452

Logic

Ground

VOUT

+5V

19.1kΩ

+5V

VOUT

CMOS

OPA452

Logic

Ground

Interfacing with CMOS Logic

Interfacing with HCT Logic

39kΩ

Interface to virtually any CMOS

logic gate by choosing a resistor

value that provides an assured

logic high voltage with the

minimum (100µA) flag current.

HCT logic has relatively well-

controlled logic level. A properly

chosen resistor value can

assure proper logic high level

throughout the full range of flag

output current.

OPA452, 453

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POWER SUPPLIES

The OPA452 and OPA453 may be operated from power

supplies of ±10V to ±40V, or a total of 80V with excellent

performance. Most behavior remains unchanged throughout

the full operating voltage range. Parameters that vary signifi-

cantly with operating voltage are shown in the Typical Char-

acteristics.

For applications that do not require symmetrical output volt-

age swing, power-supply voltages do not need to be equal.

The OPA452 and OPA453 can operate with as little as 20V

between the supplies or with up to 80V between the supplies.

For example, the positive supply could be set to 70V with the

negative supply at –10V or vice-versa.

The tabs of the DDPAK-7 and TO220 packages are electri-

cally connected to the negative supply (V–), however, these

connections should not be used to carry current. For best

thermal performance, the tab should be soldered directly to

the circuit board copper area (see Heat Sinking section).

POWER DISSIPATION

Internal power dissipation of these op amps can be quite

large. All of the specifications for the OPA452 and OPA453

may change with junction temperature. If the device is not

subjected to internal self-heating, the junction temperature

will be the same as the ambient. However, in practical

applications, the device will self-heat and the junction tem-

perature will be significantly higher than ambient. The follow-

ing calculation can be performed to establish junction tem-

perature as a function of ambient temperature and the

conditions of the application.

Consider the OPA452 in a circuit configuration where the

load is 600Ω and the output voltage is 20V. The supplies are

at ±40V and the ambient temperature (TA) is 40°C. The

for the package plus heat sink is 30°C/W.

First, the quiescent heating of the op amp is as follows:

PD(internal) = IQ • VS = 6mA • 80V = 480mW

The output current (IO) can be calculated:

IO = VO/RL = 20V/600Ω = 33.33mA

The power being dissipated (PD) in the output transistor of

the amplifier can be calculated:

D(output stage)

= I

• (V

– V

) = 33.3mA • (40 – 20) = 667mW

D(total)

= P

D(internal)

+ P

D(output stage)

= 480mW + 667mW = 1147mW

The resulting junction temperature can be calculated:

TJ = TA + PD

TJ = 40°C + 1147mW • 30°C/W = 74.4°C

FIGURE 3. DDPAK-7 and TO220-7 Safe Operating Area.

Where,

VO = output voltage

VS = supply voltage

IO = output current

RL = load resistance

TJ = junction temperature (°C)

TA = ambient temperature (°C)

JA = junction-to-air thermal resistance (°C/W)

To estimate the margin of safety in a complete design

(including heat sink), increase the ambient temperature until

the thermal protection is activated. Use worst-case load and

signal conditions. For good reliability, the thermal protection

should trigger more than +35°C above the maximum ex-

pected ambient condition of your application. This ensures a

maximum junction temperature of +125°C at the maximum

expected ambient condition.

Operation from a single power supply (or unbalanced power

supplies) can produce even larger power dissipation be-

cause a larger voltage can be impressed across the conduct-

ing output transistor. Consult Application Bulletin SBOA022

at www.ti.com for further information on how to calculate or

measure power dissipation.

Power dissipation can be minimized by using the lowest

possible supply voltage. For example, with a 50mA load, the

output will swing to within 5.0V of the power-supply rails.

Power supplies set to no more than 5.0V above the maxi-

mum output voltage swing required by the application will

minimize the power dissipation.

SAFE OPERATING AREA

The Safe Operating Area (SOA curves, Figure 3) shows the

permissible range of voltage and current. The safe output

current decreases as the voltage across the output transistor

(VS – V

O) increases. For further insight on SOA, consult

Application Report SBOA022.

Output short circuits are a very demanding case for SOA. A

short-circuit to ground forces the full power-supply voltage

(V+ or V–) across the conducting transistor and produces a

100

0.1

10 80 100

| VS | – | VO | (V)

IO (mA)

SAFE OPERATING AREA

is total thermal

resistance including

junction-to-case.

This graph is for

+125°C max operating

temperature.

+85°C, = 20

+85°C, = 40

+25°C, = 40

+25°C, = 3

OPA452, 453 11

SBOS127C www.ti.com

typical output current of 125mA. With ±40V power supplies,

this creates an internal dissipation of 10W. This far exceeds

practical heat sinking and is not recommended. If operation

in this region is unavoidable, use the part with a heat sink.

HEAT SINKING

Power dissipated in the OPA452 or OPA453 will cause the

junction temperature to rise. For reliable operation, the junc-

tion temperature should be limited to +125°C. Many applica-

tions will require a heat sink to assure that the maximum

operating junction temperature is not exceeded. The heat

sink required depends on the power dissipated and on

ambient conditions.

For heat sinking purposes, the tab of the DDPAK is typically

soldered directly to a circuit board copper area. Increasing

the copper area improves heat dissipation. Figure 4 shows

typical thermal resistance from junction-to-ambient as a

function of copper area.

Depending on conditions, additional heat sinking may be

required. Aavid Thermal Products Inc. manufactures sur-

face-mountable heat sinks designed specifically for use with

these packages. Further information is available on Aavid’s

web site, www.aavid.com.

FIGURE 4. DDPAK Thermal Resistance versus Circuit Board

Copper Area.

CAPACITIVE LOADS

The dynamic characteristics of the OPA452 and OPA453

have been optimized for commonly encountered gains, loads,

and operating conditions. The combination of low closed-

loop gain and capacitive load will decrease the phase margin

and may lead to gain peaking or oscillations. Figure 5 shows

a circuit that preserves phase margin with capacitive load.

Figure 6 shows the small-signal step response for the circuit

in Figure 5. Consult Application Bulletin SBOA015, at

www.ti.com, for more information.

FIGURE 5. Driving Large Capacitive Loads.

5kΩ

1.8nF

10nF

OPA452

+40V

–40V

VICF

270pF

5kΩ

THERMAL RESISTANCE vs

CIRCUIT BOARD COPPER AREA

0012345

Copper Area (inches

)

OPA452FA, OPA453FA

Surface-Mount Package

1oz. copper

Circuit Board Copper Area

OPA452FA, OPA453FA

Surface-Mount Package

Thermal Resistance,

(°C/W)

FIGURE 6. Small-Signal Step Response for Figure 5.

SMALL-SIGNAL STEP RESPONSE

(G = –1, CL = 10nF)

20mV/div

2.5µs/div

OPA452

OPA452, 453

12 SBOS127C

www.ti.com

INCREASING OUTPUT CURRENT

In those applications where the 50mA of output current is not

sufficient to drive the desired load, output current can be

increased by connecting two or more OPA452s or OPA453s

in parallel, as shown in Figure 7. Amplifier A1 is the master

amplifier and may be configured in virtually any op amp

circuit. Amplifier A2, the slave, is configured as a unity gain

buffer. Alternatively, external output transistors can be used

to boost output current. The circuit in Figure 8 is capable of

supplying output currents up to 1A. Alternatively, the OPA547,

OPA548, and OPA549 series power op amps should be

considered for high output current drive, along with program-

mable current limit and output disable capability.

FIGURE 7. Parallel Amplifiers Increase Output Current Ca-

pability.

INPUT PROTECTION

The OPA452 and OPA453 feature internal clamp diodes to

protect the inputs when voltages beyond the supply rails are

encountered. However, input current should be limited to

5mA. In some cases, an external series resistor may be

required. Many input signals are inherently current-limited,

therefore, a limiting resistor may not be required. Please

consider that a large series resistor, in conjunction with the

input capacitance, can affect stability.

USING THE OPA453 IN LOW GAINS

The OPA453 is intended for applications with signal gains of

5 or greater, but it is possible to take advantage of its high

slew rate in lower gains using an external compensation

technique in an inverting configuration. This technique main-

tains low noise characteristics of the OPA453 architecture at

low frequencies. Depending on the application, a small in-

crease in high-frequency noise may result. This technique

shapes the loop gain for good stability while giving an easily

controlled 2nd-order low-pass frequency response.

Considering only the noise gain (noninverting signal gain) for

the circuit of Figure 9, the low-frequency noise gain (NG

) will

be set by the resistor ratios, whereas the high-frequency

noise gain (NG

) will be set by the capacitor ratios. The

capacitor values set both the transition frequencies and the

high-frequency noise gain. If this noise gain, determined by

= 1 + C

, is set to a value greater than the recom-

mended minimum stable gain for the op amp and the noise

gain pole, set by 1/R

, is placed correctly, a very well

controlled, 2nd-order low-pass frequency response will result.

To choose the values for both CS and CF, two parameters

and only three equations need to be solved. First, the target

for the high-frequency noise gain (NG2) should be greater

than the minimum stable gain for the OPA453. In the circuit

in Figure 9, a target NG2 of 10 is used. Second, the signal

gain of –1 in Figure 10 sets the low-frequency noise gain to

NG1 = 1 + RF/RG (= 2 in this example). Using these two gains,

knowing the Gain Bandwidth Product (GBP) for the OPA453

(7.5MHz), and targeting a maximally flat 2nd-order, low-pass

Butterworth frequency response (Q = 0.707), the key fre-

quency in the compensation can be found.

For the values in Figure 9, the f–3dB will be approximately

180kHz. This is less than that predicted by simply dividing the

GBP by NG1. The compensation network controls the band-

width to a lower value while providing good slew rate at the

output and an exceptional distortion performance due to

increased loop gain at frequencies below NG1 • Z

0. The

capacitor values in Figure 10 are calculated for NG1 = 2 and

NG2 = 10 with no adjustment for parasitics.

Actual circuit values can be optimized by checking the small-

signal step response with actual load conditions. See Figure 9

for the small-signal step response of this OPA453, G = –1

circuit with a 1000pF load. It is well-behaved with no tendency

to oscillate. If CS and CF were removed, the circuit would be

unstable.

FIGURE 8. External Output Transistors Boost Output Cur-

rent Up to 1 Amp.

R1R2

OPA452

“SLAVE”

“MASTER”

VIN

RS(1)

10Ω

RS(1)

10Ω

NOTE: (1) RS resistors minimize the circulating

current that can flow between the two devices

due to VOS errors.

R1R2

OPA452

TIP30C

TIP29C

VIN

+40V

–40V

R3(1)

100Ω

NOTE: (1) R3 provides current limit and allows the amplifier to

drive the load when the output is between 0.7V and –0.7V.

0.2Ω

LOAD

OPA452, 453 13

SBOS127C www.ti.com

FIGURE 9. Compensation of the OPA453 for G = –1. FIGURE 10. Small-Signal Step Response for Figure 9.

5kΩ

1.8nF

NG1 = 1 + RF/RG = 2

NG2 = 1 + CS/CF = 10

OPA453

+40V

–40V

VIN

VOUT

200pF

5kΩ

SMALL-SIGNAL STEP RESPONSE

(G = –1, CL = 1000pF)

20mV/div

2.5µs/div

OPA453

PACKAGE OPTION ADDENDUM

www.ti.com 24-Jul-2010

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status (1) Package Type Package

Drawing Pins Package Qty Eco Plan (2) Lead/

Ball Finish MSL Peak Temp (3) Samples

(Requires Login)

OPA452FA OBSOLETE DDPAK KTW 7 TBD Call TI Call TI Replaced by

OPA452FAKTWT

OPA452FA/500 ACTIVE DDPAK KTW 7 500 Green (RoHS

& no Sb/Br) CU SN Level-3-245C-168 HR Purchase Samples

OPA452FA/500G3 ACTIVE DDPAK KTW 7 500 Green (RoHS

& no Sb/Br) CU SN Level-3-245C-168 HR Purchase Samples

OPA452FAKTWT ACTIVE DDPAK KTW 7 50 Green (RoHS

& no Sb/Br) CU SN Level-3-245C-168 HR Request Free Samples

OPA452FAKTWTG3 ACTIVE DDPAK KTW 7 50 Green (RoHS

& no Sb/Br) CU SN Level-3-245C-168 HR Contact TI Distributor

or Sales Office

OPA452TA ACTIVE TO-220 KC 7 50 Green (RoHS

& no Sb/Br) CU SN N / A for Pkg Type Request Free Samples

OPA452TA-1 ACTIVE TO-220 KVT 7 50 Green (RoHS

& no Sb/Br) CU SN N / A for Pkg Type Contact TI Distributor

or Sales Office

OPA452TA-1G3 ACTIVE TO-220 KVT 7 50 Green (RoHS

& no Sb/Br) CU SN N / A for Pkg Type Contact TI Distributor

or Sales Office

OPA452TAG3 ACTIVE TO-220 KC 7 50 Green (RoHS

& no Sb/Br) CU SN N / A for Pkg Type Contact TI Distributor

or Sales Office

OPA453FA OBSOLETE DDPAK KTW 7 TBD Call TI Call TI Replaced by

OPA453FAKTWT

OPA453FAKTWT ACTIVE DDPAK KTW 7 50 Green (RoHS

& no Sb/Br) CU SN Level-3-245C-168 HR Request Free Samples

OPA453TA ACTIVE TO-220 KC 7 50 Green (RoHS

& no Sb/Br) CU SN N / A for Pkg Type Request Free Samples

OPA453TA-1 ACTIVE TO-220 KVT 7 50 Green (RoHS

& no Sb/Br) CU SN N / A for Pkg Type Request Free Samples

OPA453TA-1G3 ACTIVE TO-220 KVT 7 50 Green (RoHS

& no Sb/Br) CU SN N / A for Pkg Type Contact TI Distributor

or Sales Office

OPA453TAG3 ACTIVE TO-220 KC 7 50 Green (RoHS

& no Sb/Br) CU SN N / A for Pkg Type Contact TI Distributor

or Sales Office

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PACKAGE OPTION ADDENDUM

www.ti.com 24-Jul-2010

Addendum-Page 2

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

OPA452FA/500 DDPAK KTW 7 500 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2

OPA452FAKTWT DDPAK KTW 7 50 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2

OPA453FAKTWT DDPAK KTW 7 50 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2

PACKAGE MATERIALS INFORMATION

www.ti.com 14-Jul-2012

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

OPA452FA/500 DDPAK KTW 7 500 367.0 367.0 45.0

OPA452FAKTWT DDPAK KTW 7 50 367.0 367.0 45.0

OPA453FAKTWT DDPAK KTW 7 50 367.0 367.0 45.0

PACKAGE MATERIALS INFORMATION

www.ti.com 14-Jul-2012

Pack Materials-Page 2

MECHANICAL DATA

MPSF015 – AUGUST 2001

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

KTW (R-PSFM-G7) PLASTIC FLANGE-MOUNT

0.010 (0,25) AM

4201284/A 08/01

0.385 (9,78)

0.410 (10,41)

–A– 0.006

–B–

0.170 (4,32)

0.183 (4,65)

0.000 (0,00)

0.012 (0,305)

0.104 (2,64)

0.096 (2,44)

0.034 (0,86)

0.022 (0,57)

0.050 (1,27)

0.055 (1,40)

0.045 (1,14)

0.014 (0,36)

0.026 (0,66)

0.330 (8,38)

0.370 (9,40)

0.297 (7,54)

0.303 (7,70)

0.0585 (1,485)

0.0625 (1,587)

0.595 (15,1 1)

0.605 (15,37)

0.019 (0,48)

0.017 (0,43)

0°~3°

0.179 (4,55)

0.187 (4,75)

0.056 (1,42)

0.064 (1,63)

0.296 (7,52)

0.304 (7,72)

0.300 (7,62)

0.252 (6,40)

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.

C. Lead width and height dimensions apply to the

plated lead.

D. Leads are not allowed above the Datum B.

E. Stand–off height is measured from lead tip

with reference to Datum B.

F. Lead width dimension does not include dambar

protrusion. Allowable dambar protrusion shall not

cause the lead width to exceed the maximum

dimension by more than 0.003”.

G. Cross–hatch indicates exposed metal surface.

H. Falls within JEDEC MO–169 with the exception

of the dimensions indicated.

MECHANICAL DATA

MSOT010 – OCTOBER 1994

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

KC (R-PSFM-T7) PLASTIC FLANGE-MOUNT PACKAGE

4040251/B 01/95

0.420 (10,67)

0.055 (1,40)

0.335 (8,51)

0.030 (0,76)

0.026 (0,66)

0.380 (9,65)

0.325 (8,25)

0.045 (1,14)

0.113 (2,87)

0.103 (2,62)

0.146 (3,71)

0.156 (3,96)

0.122 (3,10)

0.102 (2,59)

DIA

(see Note C)

0.125 (3,18)

0.137 (3,48)

0.147 (3,73)

1.020 (25,91)

1.000 (25,40)

0.175 (4,46)

0.185 (4,70)

0.050 (1,27)

0.300 (7,62) 0.025 (0,64)

0.012 (0,30)

0.010 (0,25)

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.

C. Lead dimensions are not controlled within this area.

D. All lead dimensions apply before solder dip.

E. The center lead is in electrical contact with the mounting tab.

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