General Description
The MAX1702B power-management IC supports ARM
Powered® devices such as the Intel® PXA210 and
PXA250 microprocessors based on the Intel XScale™
micro-architecture. These devices include PDAs, third-
generation smart cellular phones, internet appliances,
automotive in-dash Telematics systems, and other appli-
cations requiring substantial computing and multimedia
capability at low power.
The MAX1702B integrates three ultra-high-performance
power supplies with associated supervisory and manage-
ment functions. Included is a step-down DC-DC converter
to supply 3.3V I/O and peripherals, a step-down DC-DC
converter to supply 0.7V to VIN for the microprocessor
core, and a step-down DC-DC converter to supply either
1.8V, 2.5V, or 3.3V to power the memory.
Management functions include automatic power-up
sequencing, power-on-reset and manual reset with timer,
and two levels of low-battery detection.
The DC-DC converters use fast 1MHz PWM switching,
allowing the use of small external components. They
automatically switch from PWM mode under heavy loads
to skip mode under light loads to reduce quiescent cur-
rent and maximize battery life. The input voltage range is
from 2.6V to 5.5V, allowing the use of three NiMH cells,
a single Li+ cell, or a regulated 5V input. The MAX1702B
is available in a tiny 6mm x 6mm, 36-pin QFN package
and operates over the -40°C to +85°C temperature range.
Applications
PDA, Palmtop, and Wireless Handhelds
Third Generation Smart Cell Phones
Internet Appliances and Web Books
Features
Three Regulators in One Package
Peripherals and I/O Supply: 3.3V at 900mA
• μPCoreSupply:0.7VtoVIN at 400 mA
Memory Supply: 1.8/2.5/3.3V at 800 mA
Supports Intel® PXA210 and PXA250
Microprocessors
Power-On Reset with Manual Reset Input
Auto Power-Up Sequencing
1MHz PWM Switching Allows Small External
Components
Low5μAShutdownCurrent
Tiny 6mm x 6mm, 36-pin QFN Package
Typical Operating Circuit appears at end of data sheet.
Intel is a registered trademark of Intel Corporation.
XScale is a trademark of Intel Corporation.
ARM and ARM Powered are registered trademarks of ARM
Limited.
19-2448; Rev 1; 4/15
PART TEMP RANGE PIN-PACKAGE
MAX1702BEGX -40°C to +85°C 36 QFN
(6mm x 6mm)
MAX1702B
6mm x 6mm QFN
TOP VIEW
3233343536 28293031
N.C.
INP3
LX3
PG3
N.C.
COMP3
OUT3
11 13 1514 161210
IN
PG1
LX1
N.C.
INP1
COMP1
19
20
21
22
23
N.C.
24
25
26
27 N.C.
INP2
LX2
PG2
OUTOK
COMP2
OUT1
N.C.
2
3
4
5
6
7
8GND
REF
9N.C.
GND
PGM3
ON2
DBI
LBI
1N.C.
FB2
1817
N.C.
RSO
MR
LBO
MAX1702B Triple Output Power Management IC for
Microprocessor-Based Systems
Ordering Information
Pin Conguration
IN, FB2, OUT3, COMP1, COMP2, COMP3, PGM3,
ON2, LBO, OUTOK, RSO, MR, LBI, DBI,
OUT1 to GND ......................................................-0.3V to +6V
REF to GND .................................................-0.3 to (VIN + 0.3V)
INP1, INP2, INP3 to IN.........................................-0.3V to +0.3V
PG1, PG2, PG3 to GND.......................................-0.3V to +0.3V
LX1, LX2, LX3 Continous Current .......................... -1.5A to 1.5A
INP1 to PG1 ............................................................-0.3V to +6V
INP2 to PG2 ............................................................-0.3V to +6V
INP3 to PG3 .............................................................0.3V to +6V
Output Short-Circuit Duration ........................................... Infinite
Continuous Power Dissipation (TA =+70°C) 36-Pin QFN
(derate 22.7 mW/°C) .................................................1818mW
Operating Temperature Range ............................. 40°C to +85°C
Junction Temperature ...................................................... +150°C
Storage Temperature Range ............................ -65°C to +150°C
Lead Temperature (soldering, 10sec) .............................+300°C
(VINP1 = VINP2 = VINP3 = VIN = 3.6V, VLBI = 1.1V, VDBI = 1.35V, MR = ON2 = IN, PGM3 = GND, Circuit of Figure 1, TA = -40°C to
+85°C unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER CONDITIONS MIN TYP MAX UNITS
INP1, INP2, INP3,
IN Supply Voltage Range
INP1, INP2, INP3, IN must be connected together
externally 2.6 5.5 V
Undervoltage
Lockout Threshold
VIN rising 2.25 2.40 2.55 V
VIN falling 2.2 2.35 2.525
Quiescent Current
(IINP1 + IINP2 + IINP3 + IIN)
ON2 = IN, no load 485 µA
ON2 = GND, no load 335 µA
VDBI < 1.2 V (shutdown)
LX1-3 = GND 5 20 µA
SYNCHRONOUS BUCK PWM REGULATOR 1 (REG1)
OUT1 Voltage Accuracy 3.6V≤VINP1≤5.5V,Load=0to900mA 3.234 3.3 3.366 V
OUT1 Input Resistance 200 400 kΩ
Error-Amp Transconductance 55 95 135 µS
Dropout Voltage Load = 800mA, Note 1 250 425 mV
P-Channel On-Resistance ILX1 = 180mA 0.25 0.4
ILX1 = 180mA, VINP1 = 2.6V 0.3 0.5
N-Channel On-Resistance ILX1 = 180mA 0.2 0.35
Current-Sense Transresistance 0.40 0.47 0.54 V/A
P-Channel
Current-Limit Threshold 1.15 1.275 1.45 A
P-Channel Pulse-Skipping
Current Threshold 0.115 0.140 0.160 A
N-Channel Zero
Crossing Comparator 25 55 75 mA
OUT1 Maximum
Output Current 2.6V≤VINP1≤5.5V(Note2) 0.9 A
LX1 Leakage Current VINP1 = 5.5V, LX1= GND or INP1, VOUT1 = 3.6V -20 0.1 +20 µA
LX1 Duty-Cycle Range VINP2 = 4.2V 0 100 %
MAX1702B Triple Output Power Management IC for
Microprocessor-Based Systems
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Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(VINP1 = VINP2 = VINP3 = VIN = 3.6V, VLBI = 1.1V, VDBI = 1.35V, MR = ON2 = IN, PGM3 = GND, Circuit of Figure 1, TA = -40°C to
+85°C unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER CONDITIONS MIN TYP MAX UNITS
OUT1 Discharge Resistance VOUT1 = 3.3V, VDBI = 1V 300
(Note 3)
SYNCHRONOUS BUCK REGULATOR 2 (REG2)
FB2 Regulation Voltage 2.6V≤VINP2≤5.5V,load=0to400mA 0.686 0.7 0.714 V
FB Input Current VFB = 0.7V 1 150 nA
Error-Amp Transconductance 150 250 350 µS
Dropout Voltage Load = 400mA (Note 1) 150 250 mV
P-Channel On-Resistance ILX2 = 180mA 0.25 0.4
ILX2 = 180mA, VINP2 = 2.6V 0.3 0.5
N-Channel On-Resistance ILX2 = 180mA 0.2 0.35
Current-Sense Transresistance 0.40 0.47 0.54 V/A
P-Channel
Current-Limit Threshold 1.15 1.275 1.45 A
P-Channel Pulse-Skipping
Current Threshold 0.115 0.140 0.160 mA
N-Channel Zero-Crossing
Comparator 25 55 75 mA
OUT2 Maximum Output 2.6V≤VINP2≤5.5V(Note2) 0.4 A
LX2 Leakage Current VINP2 = 5.5V, LX2 = GND or INP2,VFB2 = 1V -20 0.1 20 µA
LX2 Duty-Cycle Range VINP2 = 4.2V 0 100 %
LX2 Discharge Resistance VLX2 = VDBI = 1V 300 Ω
SYNCHRONOUS BUCK REGULATOR 3 (REG3)
OUT3 Voltage Accuracy
PGM3=GND,3.6V≤VINP3_≤5.5V,
Load = 0 to 800mA 1.764 1.8 1.836
V
PGM3=REF,3.6V≤VINP3_≤5.5V,
Load = 0mA to 800mA 2.45 2.5 2.55
PGM3=IN,3.6V≤VINP3_≤5.5V,
Load = 0mA to 800mA 3.234 3.3 3.366
OUT3 Input Resistance
PGM3 = GND 340 650
PGM3 = REF 200 400
PGM3 = IN 160 320
Error-Amp Transconductance
PGM3 = GND 105 175 245
μsPGM3 = REF 75 125 175
PGM3 = IN 55 95 135
Dropout Voltage Load = 800mA, Note 1 220 400 mV
P-Channel On-Resistance ILX3 = 180mA 0.25 0.4 Ω
ILX3 = 180mA, VINP3 = 2.6V 0.3 0.5 Ω
N-Channel On-Resistance ILX3 = 180mA 0.2 0.35 Ω
MAX1702B Triple Output Power Management IC for
Microprocessor-Based Systems
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Electrical Characteristics (continued)
(VINP1 = VINP2 = VINP3 = VIN = 3.6V, VLBI = 1.1V, VDBI = 1.35V, MR = ON2 = IN, PGM3 = GND, Circuit of Figure 1, TA = -40°C to
+85°C unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER CONDITIONS MIN TYP MAX UNITS
Current-Sense Transresistance 0.40 0.47 0.54 V/A
P-Channel
Current-Limit Threshold 1.15 1.275 1.45 A
P-Channel Pulse-Skipping
Current Threshold 0.115 0.140 0.160 A
N-Channel Zero-Crossing
Comparator 25 55 75 mA
OUT3 Maximum Output Current 2.6V≤VINP3_≤5.5V(Note2) 0.8 A
LX3 Leakage Current VINP3 = 5.5V, LX3 = GND or INP3, VOUT3 = 3.6V -20 0.1 +20 µA
LX3 Duty-Cycle Range VINP3 = 4.2V 0 100 %
OUT3 Discharge Resistance VOUT3 = 3.3V, VDBI = 1V 300
(Note 3) Ω
REFERENCE
REF Output Voltage 1.225 1.25 1.275 V
REF Load Regulation 10µA < IREF < 100µA 2.5 6.25 mV
REF Line Regulation 2.6V < VBATT < 5.5V 0.6 5 mV
OSCILLATOR
Switching Frequency 0.85 1 1.15 MHz
THERMAL SHUTDOWN
Thermal Shutdown Temperature TJ rising 160 °C
Thermal Shutdown Hysteresis 15 °C
SUPERVISORY/MANAGEMENT FUNCTIONS
Reset Timeout MR rising to RSO rising 55 65.5 75 ms
OUTOK Trip Threshold VFB2 rising 94 95.5 97.5 %
VFB2 falling 91 92.5 94
OUTOK, LBO
Minimum Assertion Time 107 126 145 µs
LBI Input Threshold VLBI falling 0.98 1.000 1.02 V
VLBI rising 1.00 1.020 1.04
LBI Input Bias Current VLBI = 0.95V 0.02 0.1 µA
DBI Input Threshold
VDBI falling, TA = 0°C to +85°C 1.2103 1.235 1.2597
V
VDBI rising, TA = 0°C to +85°C 1.2345 1.2597 1.2849
VDBI falling, TA = -40°C to +85°C 1.198 1.235 1.273
VDBI rising, TA = -40°C to +85°C 1.221 1.260 1.298
DBI Input Bias Current VDBI = 1.25V 0.01 0.1 µA
MAX1702B Triple Output Power Management IC for
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Electrical Characteristics (continued)
(VINP1 = VINP2 = VINP3 = VIN = 3.6V, VLBI = 1.1V, VDBI = 1.35V, MR = ON2 = IN, PGM3 = GND, Circuit of Figure 1, TA = -40°C to
+85°C unless otherwise noted. Typical values are at TA = +25°C.)
Note 1: Dropoutvoltageisnottested.GuaranteedbyP-channelswitchresistanceandassumesa72mΩ(REG1andREG3)or
162mΩ(REG2)maximumESRofinductor.
Note 2: The maximum output current is guaranteed by the following equation:
OUT
LIM
OUT ( MAX )
NL
V (1 D)
I2L
I(1 D)
1 (R R )
2L
׃×
=
++ ׃×
where:
OUT OUT ( MAX ) N L
IN OUT ( MAX ) N P
V I (R R )
DV I (R R )
++
=
++
and: RN=N-channelsynchronousrectierRDSON
RP = P-channel power switch RDSON
RL = external inductor ESR
IOUT(MAX) = maximum required load current
ƒ = operating frequency minimum
L = external inductor value
Note 3: SpeciedresistanceisinserieswithaninternaldiodetoLX2.
Note 4: Specicationsto-40°Careguaranteedbydesignandnotproductiontested.
PARAMETER CONDITIONS MIN TYP MAX UNITS
RSO, LBO, OUTOK
Output Low Level
2.6V≤VIN_≤5.5V,sinking1mA 0.4 V
VIN_ = 1V, sinking 100µA 0.4
RSO, LBO, OUTOK
Output High Leakage Current VRSO = VLBO = VOUTOK = 5.5V 0.1 µA
ON2, MR, Input High Level 2.6V≤VIN_≤5.5V 1.6 V
ON2, MR, Input Low Level 2.6V≤VIN_≤5.5V 0.4 V
ON2, MR, PGM3, Input Leakage
Current VON2 = VMR = VPGM3 = GND, 5.5V -1 +1 µA
PGM3 Selection Threshold
REG3 target = 1.8V, IN = 2.6V to 5.5V 0.4
V
REG3 target = 2.5V, IN = 2.6V to 5.5V 1.1 REF 1.4
REG3 target = 3.3V, IN = 2.6V to 5.5V VIN_ - 0.25
MAX1702B Triple Output Power Management IC for
Microprocessor-Based Systems
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Electrical Characteristics (continued)
(Circuit of Figure 1, TA = +25°C, unless otherwise noted.)
MAX1702B toc02
LOAD CURRENT (mA)
EFFICIENCY (%)
10010
10
20
30
40
50
60
70
80
90
100
0
1 1000
REG3 INCREMENTAL EFFICIENCY
vs. LOAD CURRENT
VOUT3 = 2.5V
VOUT3 = 3.3V
VOUT3 = 1.8V
NOTE: INCREMENTAL EFFICIENCY
IS REG3 OUTPUT POWER OVER
ADDITIONAL INPUT POWER.
REG1 AND REG3 QUIESCENT
CURRENT IS REFLECTED IN
REG1’S EFFICIENCY GRAPH.
MAX1702B toc03
LOAD CURRENT (mA)
EFFICIENCY (%)
10010
10
20
30
40
50
60
70
80
90
100
0
1 1000
REG2 INCREMENTAL EFFICIENCY
vs. LOAD CURRENT
VOUT2 = 1V
VOUT2 = 1.3V
NOTE: INCREMENTAL EFFICIENCY
IS REG2 OUTPUT POWER OVER
ADDITIONAL INPUT POWER.
REG1 AND REG3 QUIESCENT
CURRENT IS REFLECTED IN
REG1’S EFFICIENCY GRAPH.
VOUT2 = 1.1V
MAX1702B toc04
SUPPLY VOLTAGE (V)
QUIESCENT CURRENT (mA)
5.55.04.54.03.53.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0
2.5 6.0
NO LOAD QUIESECNT CURRENT
vs. SUPPLY VOLTAGE
MAX1702B toc05
LOAD CURRENT (mA)
DROPOUT VOLTAGE (mV)
900800700600500400300200100
50
100
150
200
250
300
350
0
0 1000
REG1 DROPOUT VOLTAGE
vs. LOAD CURRENT (VIN = 3.3V)
MAX1702B toc06
LOAD CURRENT (mA)
DROPOUT VOLTAGE (mV)
40035050 100 150 250200 300
20
40
60
80
100
120
140
160
0
0 450
REG3 DROPOUT VOLTAGE
vs. LOAD CURRENT (VIN = 3.3V)
VOUT3 = 3.3V
REG1 OUTPUT VOLTAGE
vs. LOAD CURRENT
MAX1702B toc07
LOAD CURRENT (mA)
OUTPUT VOLTAGE (V)
600500400300200100
3.23
3.25
3.27
3.29
3.31
3.33
3.21
0 700
TA = +85°C
TA = -40°C TA = 0°C
TA = +40°C
MAX1702B toc01
LOAD CURRENT (mA)
EFFICIENCY (%)
10010
10
20
30
40
50
60
70
80
90
100
0
1 1000
REG1 EFFICIENCY
vs. LOAD CURRENT
MAX1702B toc08
LOAD CURRENT (mA)
OUTPUT VOLTAGE (V)
25020015010050
1.095
1.097
1.099
1.101
1.103
1.105
1.107
0 300
REG2 OUTPUT VOLTAGE
vs. LOAD CURRENT
TA = -40°C
TA = +85°C
TA = 0°C
TA = +40°C
MAX1702B toc09
LOAD CURRENT (mA)
40035030025020015010050
3.275
3.285
3.295
3.305
3.315
3.325
3.265
0 450
REG3 OUTPUT VOLTAGE
vs. LOAD CURRENT (VOUT3 = 3.3V)
OUTPUT VOLTAGE (V)
TA = -40°C
TA = +85°C
TA = 0°C TA = +40°C
MAX1702B Triple Output Power Management IC for
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Typical Operating Characteristics
(Circuit of Figure 1, TA = +25°C, unless otherwise noted.)
MAX1702B toc10
LOAD CURRENT (mA)
400
35050 100 150 250200 300
2.480
2.485
2.490
2.495
2.500
2.505
2.510
2.515
2.475
0 450
REG3 OUTPUT VOLTAGE
vs. LOAD CURRENT (VOUT3 = 2.5V)
OUTPUT VOLTAGE (V)
TA = +85°C
TA = +40°C
TA = -40°C TA = 0°C
MAX1702B toc11
LOAD CURRENT (mA)
400
35030025020015010050
1.787
1.792
1.797
1.802
1.807
1.812
1.782
0 450
REG3 OUTPUT VOLTAGE
vs. LOAD CURRENT (VOUT3 = 1.8V)
OUTPUT VOLTAGE (V)
TA = +85°C
TA = +40°C
TA = -40°C TA = 0°C
MAX1702B toc12
SUPPLY VOLTAGE (V)
FREQUENCY (kHz)
5.04.54.03.53.0
920
940
960
980
1000
1020
1040
900
2.5 5.5
INTERNAL OSCILLATOR FREQUENCY
vs. SUPPLY VOLTAGE
TA = -40°C
TA = +25°C
TA = +85°C
MAX1702B toc13
TEMPERATURE (°C)
REFERENCE VOLTAGE (V)
603510-15
1.21
1.22
1.23
1.24
1.25
1.26
1.27
1.28
1.29
1.30
1.20
-40 85
INTERNAL REFERENCE
vs. TEMPERATURE
REG1 HEAVY-LOAD SWITCHING WAVEFORM
LOAD = 800mA, V
IN
= 4V
400ns/div
VOUT1
AC-COUPLED
20mV/div
IL1
500mA/div
MAX1702B toc14
VLX1
2V/div
0
0
0
I/O
CORE
REG2 HEAVY-LOAD SWITCHING WAVEFORM
LOAD = 400mA, V
IN
= 4V
400ns/div
VOUT2
AC-COUPLED
20mV/div
IL2
500mA/div
MAX1702B toc15
VLX2
2V/div
0
0
0
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Typical Operating Characteristics (continued)
(Circuit of Figure 1, TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
REG3 HEAVY-LOAD SWITCHING WAVEFORM
LOAD = 700mA, V
IN
= 4V
400ns/div
VOUT3
AC-COUPLED
20mV/div
IL3
500mA/div
MAX1702B toc16
VLX3
2V/div
0
0
0
REG1 MEDIUM-LOAD SWITCHING WAVEFORM
LOAD = 100mA, V
IN
= 4V
400ns/div
VOUT1
AC-COUPLED
20mV/div
IL1
500mA/div
MAX1702B toc17
VLX1
2V/div
0
0
0
REG3 MEDIUM-LOAD SWITCHING WAVEFORM
LOAD = 100mA, V
IN
= 4V
2µs/div
VOUT3
AC-COUPLED
20mV/div
IL3
500mA/div
MAX1702B toc18
VLX3
2V/div
0
0
0
REG1 LIGHT-LOAD SWITCHING WAVEFORM
LOAD = 10mA, V
IN
= 4V
10µs/div
VOUT1
AC-COUPLED
20mV/div
IL1
500mA/div
MAX1702B toc19
VLX1
2V/div
0
0
0
REG2 LIGHT-LOAD SWITCHING WAVEFORM
LOAD = 10mA, V
IN
= 4V
10µs/div
VOUT2
AC-COUPLED
20mV/div
IL2
500mA/div
MAX1702B toc20
VLX2
2V/div
0
0
0
REG3 LIGHT-LOAD SWITCHING WAVEFORM
LOAD = 10mA, V
IN
= 4V
10µs/div
VOUT3
AC-COUPLED
20mV/div
IL3
500mA/div
MAX1702B toc21
VLX3
2V/div
0
0
0
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(Circuit of Figure 1, TA = +25°C, unless otherwise noted.)
TURN-ON SEQUENCE
FROM POWER APPLICATION
ILOAD1 = 250mA, ILOAD2 = 100mA, ILOAD3 = 200mA
20ms/div
IIN
500mA/div
MAX1702B toc22
VOUT1
5V/div
VOUT3
5V/div
VOUT2
2V/div
VIN
5V/div
0
0
0
0
0
0VRSO
5V/div
TURN-OFF SEQUENCE
ILOAD1 = 250mA, ILOAD2 = 100mA, ILOAD3 = 200mA
200µs/div
IIN
500mA/div
MAX1702B toc23
VOUT1
5V/div
VOUT3
5V/div
VOUT2
2V/div
VIN
5V/div
0
0
0
0
0
0
VRSO
5V/div
TURN-ON DELAY
I
LOAD1
= 250mA, I
LOAD2
= 100mA, I
LOAD3
= 200mA
40µs/div
IIN
200mA/div
MAX1702B toc24
VOUT2
1V/div
VON2
2V/div
0
0
0
REG1 LOAD TRANSIENT WAVEFORM
LOAD = 100mA TO 500mA, VIN = 4V
40µs/div
ILX1
500mA/div
ILOAD1
500mA/div
MAX1702B toc25
VOUT1
AC-COUPLED
200mV/div
0
0
MAX1702B Triple Output Power Management IC for
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Typical Operating Characteristics (continued)
(Circuit of Figure 1, TA = +25°C, unless otherwise noted.)
REG2 LOAD TRANSIENT WAVEFORM
LOAD = 20mA TO 200mA, VIN = 4V
40µs/div
ILX2
200mA/div
ILOAD2
100mA/div
MAX1702B toc26
VOUT2
AC-COUPLED
100mV/div
0
0
0
REG3 LOAD TRANSIENT WAVEFORM
LOAD = 75mA TO 400mA, VIN = 4V
40µs/div
ILX3
200mA/div
ILOAD3
200mA/div
MAX1702B toc27
VOUT3
AC-COUPLED
200mV/div
0
0
0
LINE TRANSIENT RESPONSE WAVEFORM
VIN = 4V TO 5V, ILOAD1 = 250mA,
ILOAD2 = 100mA, ILOAD3 = 200mA
400µs/div
MAX1702B toc28
VOUT1
AC-COUPLED
50mV/div
VOUT2
AC-COUPLED
50mV/div
0
0
0
0
VIN
2V/div
VOUT3
AC-COUPLED
20mV/div
ENTERING AND EXITING DROPOUT WAVEFORM
VIN = 2.75V TO 4V, ILOAD1 = 250mA,
ILOAD2 = 100mA, ILOAD3 = 200mA
20ms/div
MAX1702B toc29
VOUT1
AC-COUPLED
500mV/div
VOUT3
AC-COUPLED
500mV/div
0
0
0
VIN
AC-COUPLED
500mV/div
MAX1702B Triple Output Power Management IC for
Microprocessor-Based Systems
Maxim Integrated
10
www.maximintegrated.com
Typical Operating Characteristics (continued)
PIN NAME FUNCTION
1, 9, 13, 18,
19, 26, 27,
31, 35
N.C. No Connection. These pins are not internally connected.
2 LBI Low-Battery Input. Connect a resistive voltage-divider from the battery voltage to LBI to set the low-
battery threshold. LBI threshold voltage is 1.235V.
3 DBI
Dead-Battery Input. Connect a resistive voltage-divider from the battery voltage to DBI to set the dead-
battery voltage threshold. When the voltage at DBI is below the 1.25V threshold, the MAX1702B is
turned off and draws only 5µA from the battery.
4 ON2 REG2 On/Off Input. Drive ON2 high to turn on REG2, drive it low to turn it off. When enabled, the
MAX1702B soft-starts REG2, when disabled, the output of REG2 is internally discharged to PG2.
5 PGM3 REG3 Regulation Voltage-Control Input. Connect PGM3 to IN, REF, or GND to set the REG3 output
regulation voltage. Connect PGM3 to GND for 1.8V, REF for 2.5V, and IN for 3.3V.
6 GND Connect Pin 6 to Pin 8
7 REF Reference Output. Output of the 1.25V reference. Bypass REF to GND with a 0.1µF or greater
capacitor.
8 GND
Analog Ground. Connect GND to a local analog ground plane with no high-current paths. GND should
be connected to the main ground plane at a single point as close to the IC and the IN bypass capacitor
as possible. Connect the ground of the low-noise components, such as resistive voltage-dividers and
reference bypass capacitor to the analog ground plane.
10 IN Analog Supply Input. Bypass IN to GND with a 1µF or greater low-ESR capacitor.
11 RSO
Reset Output. RSO is low (sinks current to GND) during initial startup or while the manual reset input,
MR, is asserted. RSO remains low for 65.5ms after all regulators are in regulation or after MR is
deasserted. RSO is an open-drain output. RSO remains high when REG2 is turned off. The RSO line
maintains a valid low output for IN as low as 1V.
12 PG1 REG1 Power Ground. Connect PG1 directly to a power ground plane. Connect PG1, PG2, PG3 and
GND together at a single point as close to the IC as possible.
14 LX1 REG1Power-SwitchingNode.ConnecttheexternalinductoroftheREG1outputLClterfromLX1to
OUT1 (see the Inductor Selection section).
15 INP1
REG1 Power Input. Bypass INP1 to PG1 with a 1.0µF or greater low-ESR capacitor. INP1, INP2,
INP3, and IN must be connected together externally. A single 4.7µF capacitor can be used for INP1,
INP2, and INP3.
16 MR Manual Reset Input. A momentary low on MR forces RSO to go low. RSO remains low as long as MR
is low, and returns high 65.5ms after MR returns high and all output voltages are in regulation.
17 COMP1 REG1 Compensation Node. Connect a series resistor and capacitor from COMP1 to GND in parallel
with a 33pF capacitor to compensate REG1 (see the Compensation and Stability section).
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Pin Description
PIN NAME FUNCTION
18, 19 N.C. No Connection. These pins are not internally connected.
20 OUT1 REG1 Output-Voltage Sense Input. Bypass OUT1 to PG1 with a 10µF or greater low-ESR capacitor
(see the Output Capacitor Selection section).
21 COMP2 REG2 Compensation Node. Connect a series resistor and capacitor from COMP2 to GND in parallel
with a 33pF capacitor to compensate REG2 (see the Compensation and Stability section).
22 OUTOK
Output-OK Output. OUTOK sinks current to GND when the voltage at REG2 is below the regulation
threshold. When the output is in regulation, OUTOK is high impedance. OUTOK is used by the
processor to indicate when it is safe for the processor to exit sleep mode. OUTOK is an open-drain
output. OUTOK maintains a valid low output for IN as low as 1V.
23 PG2 REG2 Power Ground. Connect PG2 directly to a power ground plane. Connect PG1, PG2, PG3, and
GND together at a single point as close to the IC as possible.
24 LX2 REG2Power-SwitchingNode.ConnecttheexternalinductoroftheREG2outputLClterfromLX2to
OUT2. LX2 discharges OUT2 when REG2 is disabled (see the Inductor Selection section).
25 INP2
REG2 Power Input. Bypass INP2 to PG2 with a 1.0µF or greater low-ESR capacitor. INP1, INP2,
INP3, and IN must be connected together externally. A single 4.7µF capacitor can be used for INP1,
INP2, and INP3.
28 FB2
REG2 Feedback-Sense Input. Set the REG2 output voltage with a resistive voltage-divider from the
REG2 output voltage to FB2. The FB2 regulation threshold is 0.7V. Connect FB2 directly to OUT2 for
an output voltage of 0.7V.
29 OUT3 REG3 Output-Voltage Sense Input. Bypass OUT3 to GND with a 10µF or greater low-ESR capacitor
(see the Output Capacitor Selection section).
30 COMP3 REG3 Compensation Node. Connect a series resistor and capacitor from COMP3 to GND in parallel
with a 33pF capacitor to compensate REG3 (see the Compensation and Stability section).
32 PG3 REG3 Power Ground. Connect PG3 directly to a power ground plane. Connect PG1, PG2, PG3, and
GND together at a single point as close to the IC as possible.
33 LX3 REG3Power-SwitchingNode.ConnecttheexternalinductoroftheREG3outputLClterfromLX3to
OUT3 (see the Inductor Selection section).
34 INP3
REG3 Power Input. Bypass INP3 to PG3 with a 1.0µF or greater low-ESR capacitor. INP1, INP2,
INP3, and IN must be connected together externally. A single 4.7µF capacitor can be used for INP1,
INP2, and INP3.
36 LBO
Low-Battery Output. LBO sinks current to GND when the voltage at LBI is below the LBI threshold
voltage; LBO is high impedance when LBI is above the threshold. LBO is an open-drain output. LBO
maintains a valid low output level for IN as low as 1V.
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Pin Description (continued)
Detailed Description
The MAX1702B triple output step-down DC-DC converter
is ideal for powering PDA, palmtop, and subnotebook
computers. Normally, these devices require separate
power supplies for the processor core, memory, and the
peripheral circuitry. The MAX1702B’s REG1 provides a
fixed 3.3V output designed to power the microproces-
sor I/O and other peripheral circuitry. REG1 delivers up
to 900mA output current. The microprocessor core is
powered from REG2 which has an adjustable 0.7V to VIN
output, providing up to 400mA output current. The third
output, REG3, is designed to power memory. REG3 out-
put voltage is set to one of 3 voltages; 3.3V (PGM3 = IN),
2.5V (PGM3 = REF) or 1.8V (PGM3 = GND) and delivers
up to 800mA of output current. All three regulators utilize
a proprietary regulation scheme allowing PWM operation
at medium to heavy loads, and automatically switch to
pulse skipping at light loads for improved efficiency. Under
low-battery conditions, the MAX1702B issues a warning
(LBO output).
The MAX1702B employs PWM control at medium and
heavy loads, and skip mode at light loads (below approxi-
mately 80mA) to improve efficiency and reduce quiescent
current to 485μA. During skip operation, the MAX1702B
switches only as needed to service the load, reducing the
switching frequency and associated losses in the internal
switch, the synchronous rectifier, and the external inductor.
There are three steady-state operating conditions for
the MAX1702B. The device performs in continuous con-
duction for heavy loads. The inductor current becomes
discontinuous at light loads, requiring the synchronous
rectifier to be turned off before the end of a cycle as the
inductor current reaches zero. The device enters into
skip mode when the converter output voltage exceeds
its regulation limit before the inductor current reaches the
pulse-skip threshold.
During skip mode, a switching cycle initiates when the
output voltage drops below the regulation voltage. The
P-channel MOSFET switch turns on and conducts current
to the output-filter capacitor and load until the inductor
current reaches the pulse-skip current threshold. Then
the main switch turns off, and the current flows through
the synchronous rectifier to the output filter capacitor and
the load. The synchronous rectifier is turned off when the
inductor current approaches zero. The MAX1702B waits
until the output voltage drops below the regulation voltage
again to initiate the next cycle.
100% Duty-Cycle Operation
If the inductor current does not rise sufficiently to supply
the load during the on-time, the switch will remain on,
allowing operation up to 100% duty cycle. This allows the
output voltage to maintain regulation while the input volt-
age approaches the regulation voltage. Dropout voltage
is the output current multiplied by the on-resistance of the
internal switch and inductor, approximately 220mV for a
800mA load for REG1 and REG3 and 150mV for a 400mA
load on REG2. Near dropout, the on-time may exceed
BANDGAP
REFERENCE
DEAD-
BATTERY
DETECTOR
RESET
TIMER
LOW-
BATTERY
DETECTOR
ON/OFF
CONTROL
LOGIC
DC-DC BUCK
WITH SKIP
1MHz PWM
REG1
EN
REF
DC-DC BUCK
WITH SKIP
1MHz PWM
REG2
POK
EN
REF
DC-DC BUCK
WITH SKIP
1MHz PWM
REG3
EN
REF
DBO
DBI
LBI
LBO
OUTOK
ON2
IN
INP1
LX1
PG1
OUT1
COMP1
INP2
LX2
PG2
FB2
COMP2
INP3
LX3
PG3
OUT3
COMP3
PGM3
RSO
MR
GND REF
MAX1702B
MAX1702B Triple Output Power Management IC for
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13
Functional Diagram
one PWM clock cycle; therefore, small amplitude sub-
harmonic ripple may occur in the output voltage. During
dropout, the high-side P-channel MOSFET turns on, and
the controller enters a low-current consumption mode.
The device remains in this mode until the MAX1702B is
no longer in dropout.
Synchronous Rectication
An N-channel synchronous rectifier eliminates the need
for an external Schottky diode and improves efficiency.
The synchronous rectifier turns on during the second
half of each cycle (off-time). During this time, the voltage
across the inductor is reversed, and the inductor current
falls. The synchronous rectifier is turned off at the end of
the cycle (at which time another on-time begins) or when
the inductor current approaches zero.
Battery Monitoring and
Undervoltage Lockout
The MAX1702B does not operate with input voltages
below the undervoltage lockout (UVLO) threshold of
2.35V (typ). The inputs remain high impedance until the
supply voltage exceeds the UVLO threshold, reducing
battery load under this condition.
The MAX1702B provides a low-battery comparator that
compares the voltage on LBI to the reference voltage. An
open-drain output (LBO) goes low when the LBI voltage
is below 1V. Use a resistive voltage-divider network as
shown in Figure 1 to set the trip voltage to the desired
level. LBO is high impedance in shutdown mode.
The MAX1702B also provides a dead-battery compara-
tor that turns off the IC when the battery has excessively
discharged. When the voltage at DBI is below the 1.235V
threshold, the MAX1702B is turned off and draws only
5μAfromthebattery.Usearesistivevoltagedividernet-
work as shown in Figure 1 to set the trip voltage to the
desired level.
Power-On Sequencing
The MAX1702B starts when the input voltage rises above
the UVLO threshold and the voltage at DBI is greater than
the DBI threshold. When power is initially applied, REG1
starts in soft-start mode. Once OUT1 reaches it is regula-
tion voltage, REG3 ramps to its target in soft-start mode.
Finally, once OUT3 reaches its regulation voltage, REG2
ramps to its target in soft-start mode. The RSO output
holds low during this time and remains low until 65.5ms
after REG2 reaches its target output voltage.
Once all the regulators are running, ON2 turns REG2 on
and off. During startup (before the end of the reset period)
REG2 is enabled and can only be turned off once the
RSO output goes high. When turned off, the REG2 output
voltage is discharged to PG2 through LX2.
REG1 and REG3 Step-Down Converters
REG1 and REG3 are 1MHz PWM, current-mode step-
down converters and generate a 3.3V at up to 900mA
(REG1), and 3.3V, 2.5V, or 1.8V at up to 800mA (REG3).
Internal switches and synchronous rectifiers are integrat-
ed for small size and improved efficiency. Both regulators
remain on while the input voltage is above the UVLO
threshold and DBI is above the DBI threshold. REG1
and REG3 cannot be independently turned on or off. To
turn both regulators off, pull DBI below the DBI threshold
(1.235V typ).
The REG3 output voltage is set through the PGM3 pin.
Connect PGM3 to IN to set the output voltage to 3.3V,
connect it to REF to set it to 2.5V, and connect it to GND
to set the voltage to 1.8V.
REG2 Step-Down Converter
REG2 is a 1MHz, current-mode step-down converter and
generates a 0.7V to VIN output delivering up to 400mA.
An internal switch and synchronous rectifier are used for
small size and improved efficiency. REG2 is turned on
and off through the ON2 input. Drive ON2 low to turn off
the regulator, and high to turn it on. OUTOK goes low
when the REG2 output voltage drops below 92.5% of
the regulation voltage. OUTOK is an open-drain output.
OUTOK can be used to signal the processor that the
REG2 voltage is in regulation allowing the processor to
exit from sleep mode into run mode.
Reset Output
MAX1702B features an active low open-drain reset output
(RSO), RSO holds low during startup or when the manual
reset input MR is held low. RSO goes high impedance
65.5ms after REG2 reaches its target value and the MR
input goes high. (see Power-On Sequencing section).
Note that RSO remains high when REG2 is turned off.
Applications Information
Setting the Output Voltages
The REG1 output voltage is fixed at 3.3V and cannot be
changed. The REG3 output voltage can be set by the
PGM3 input to either 3.3V (connect PGM3 to IN), 2.5V
(connect PGM3 to REF), or 1.8V (connect PGM3 to
GND). The REG2 output voltage is set between 0.70V
and VIN through a resistive voltage divider from the
REG2 output voltage to FB2 (Figure 1). Select feedback
MAX1702B Triple Output Power Management IC for
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14
resistor R5 to be less than be less than 14kW. R4 is then
given by:
OUT
FB 2
V
R 4 R 5 1
V

=


where VFB2 = 0.70V and VOUT is the REG2 output volt-
age.
Compensation and Stability
Compensate each regulator by placing a resistor and a
capacitor in series, from COMP_ to GND and connect a
33pF capacitor from COMP_ to GND for improve noise
immunity (Figure 1). The capacitor integrates the current
from the transconductance amplifier, averaging output
voltage ripple. This sets the device speed for transient
responses and allows the use of small ceramic output
capacitors. The resistor sets the proportional gain of the
output error voltage by a factor gm x RC. Increasing this
resistor also increases the sensitivity of the control loop to
the output voltage ripple.
This resistor and capacitor set a compensation zero that
defines the system’s transient response. The load pole is
a dynamic pole, shifting frequency with changes in load.
As the load decreases, the pole frequency will shift lower.
System stability requires that the compensation zero must
be placed properly to ensure adequate phase margin (at
least 30°). The following is a design procedure for the
compensation network:
1) Select an appropriate converter bandwidth (fC) to sta-
bilize the system while maximizing transient response.
This bandwidth should not exceed 1/5 of the switching
frequency. Use 100kHz as a reasonable starting point.
2) Calculate the compensation capacitor, COMP_, based
on this bandwidth. Calculate COMP1 and COMP3 with
the following equation
OUT ( MAX )
COMP 1/ 3 m
OUT ( MAX ) CS
V11
Cg
I R 2f




=


×π×



where RCS is the regulator’s current-sense transresi
tance and gm is the regulators error amplifier transcon-
ductance. Calculate COMP2 with the following equation:
OUT ( MAX )
COMP 2 m
OUT ( MAX ) CS
V1 1 R5
Cg
I R 2 f R4 R5




= ×



×π× +



where RCS is REG2’s current-sense transresistance and
gm is REG2’s error-amplifier transconductance.
Calculate the equivalent load impedance, RL, by:
OUT ( MIN )
LOUT ( MAX )
V
RI
=
where VOUT(MIN) equals the minimum output voltage.
IOUT(MAX) equals the maximum load current.
Choose the output capacitor, COUT (see the Output
Capacitor Selection section).
Calculate the compensation resistance (RC) value to can-
cel out the dominant pole created by the output load and
the output capacitance:
L OUT COMP_
11
2RC 2RCC
=
×π× × ×π× ×
Solving for RC gives:
L OUT
CCOMP_
RC
RC
×
=
To find CCOMPHF_ calculate the high-frequency com-
pensation pole to cancel the zero created by the output
capacitor’s equivalent series resistance (ESR):
ESR OUT C COMPHF_
11
2R C 2RC
=
×π× × ×π× ×
Solving for CCOMPHF_ gives:
ESR OUT
COMPHF_ C
RC
C ,but not less than 33pF
R
×
=
If low-ESR ceramic capacitors are used, the CCOMPHF_
equation may yield a very small capacitance value. In
such cases, do not use less than 33pF to maintain noise
immunity.
Inductor Selection
A4.7μHinductorwithasaturationcurrentofatleast1.5A
is recommended for most applications. For best efficien-
cy, use an inductor with low ESR. See Table 1 for recom-
mended inductors and manufacturers. For most designs,
a reasonable inductor value (LIDEAL) can be derived from
the following equation:
OUT IN OUT
IDEAL IN OUT ( MAX ) OSC
V (V V )
LV LIR I f
=×× ×
where LIR is the inductor current ripple as a percent-
age of the load current. LIR should be kept between
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20% and 40% of the maximum load current for best per-
formance and stability. The maximum inductor current is:
LMAX OUT ( MAX )
LIR
I 1 I
2

= +


The inductor current will become discontinuous if IOUT
decreases to LIR/2 from the output current value used to
determine LIDEAL.
Input Capacitor Selection
The input capacitor reduces the current peaks drawn from
the battery or input power source and reduces switching
noise in the IC. The impedance of the input capacitor at
the switching frequency should be less than that of the
input source so high-frequency switching currents do not
pass through the input source but instead are shunted
through the input capacitor.
The input capacitor must meet the ripple-current require-
ment (IRMS) imposed by the switching currents. The input
capacitor RMS current is:
OUT IN OUT
RMS LOAD IN
V (V V )
II V


=


Output Capacitor Selection
The output capacitor is required to keep the output volt-
age ripple small and to ensure regulation control loop
stability. The output capacitor must have low impedance
at the switching frequency. Ceramic capacitors are rec-
ommended. The output ripple is approximately:
RIPPLE OUT ( MAX ) OSC OUT
1
V LIR I ESR 2f C

≈× × +

××

See the Compensation and Stability section for a discus-
sion of the influence of output capacitance and ESR on
regulation control-loop stability.
The capacitor voltage rating must exceed the maximum
applied capacitor voltage. Consult the manufacturer’s
specifications for proper capacitor derating. Avoid Y5V
and Z5U dielectric types due to their huge voltage and
temperature coefficients of capacitance and ESR. X7R
and X5R dielectric types are recommended
Setting the Battery Detectors
The low-battery and dead-battery detector trip points can
be set by adjusting the resistor values of the divider string
(R1, R2, and R3) in Figure 1 according to the following:
1)ChooseR3tobelessthan250kΩ
2) R1 = R3 x VBL x (1 - VTH/VBD)
3) R2 = R3 x (VTH x VBL/VBD - 1)
where VBL is the low-battery voltage, VBD is the deadbat-
tery voltage, and VTH = 1.235V.
PC Board Layout and Routing
High switching frequencies and large peak currents make
PC board layout a very important part of design. Good
design minimizes excessive EMI on the feedback paths
and voltage gradients in the ground plane, both of which
can result in instability or regulation errors. Connect the
inductor, input filter capacitor, and output filter capacitor
as close together as possible, and keep their traces short,
direct, and wide. Connect their ground pins to a single
common power ground plane. The external voltage-
feedback network should be very close to the FB pin,
within 0.2in (5mm). Keep noisy traces (from the LX pin, for
example) away from the voltage-feedback network; also,
keep them separate, using grounded copper. Connect
GND and PG_ pins together at a single point, as close
as possible to the MAX1702B. Refer to the MAX1702B
evaluation kit for a PC board layout example.
Table 1. Suggested Inductors
MANUFACTURER PART NUMBER INDUCTANCE (FH) ESR (mW) SATURATION CURRENT
(A)
DIMENSIONS
(mm)
Coilcraft DO1606 4.7 120 1.2 5.3 x 5.3 x 2
Coilcraft LPT1606-472 4.7 240 (max) 1.2 6.5 x 5.3 x 2.0
Sumida CDRH4D28-4R7 4.7 56 1.32 4.6 x 5 x 3
Sumida CDRH5D18-4R1 4.1 57 1.95 5.5 x 5.5 x 2
Sumida CR43 4.7 108.7 1.15 4.5 x 4 x 3.5
MAX1702B Triple Output Power Management IC for
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16
MAX1702B
V
OUT1
3.3V AT 900mA
4.7µH
COUT1
10µF
CCOMP1
1000pF
RCOMP1
33k
CCOMPHF1
33pF
LX1
PG1
OUT1
COMP1
VOUT2
1.1V AT 400mA
4.7µH
COUT2
10µF
CCOMP2
680pF
RCOMP2
18k
8.06k
14k
CCOMPHF2
33pF
LX2
PG2
FB2
COMP2
VOUT3
3.3V/2.5V/1.8V AT 800mA
4.7µH
COUT3
10µF
CCOMP3
1000pF
RCOMP3
22k
CCOMPHF3
33pF
LX3
PG3
OUT3
COMP3
GND REF
PGM3
R1
162k
R2
53.6k
R3
86.6k
DBI
LBI
INP2IN INP1 INP3
4.7µF 4.7µF
INPUT
2.6V TO 5.5V
100k
100k
OUT1
LBO
OUTOK
100k
RSO
OUT1 ON2
MR
MAX1702B Triple Output Power Management IC for
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17
Typical Operating Circuit
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
36 QFN G3666-1
MAX1702B Triple Output Power Management IC for
Microprocessor-Based Systems
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18
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
Chip Information
TRANSISTOR COUNT: 10,890
PROCESS: BiCMOS
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
MAX1702B Triple Output Power Management IC for
Microprocessor-Based Systems
© 2002 Maxim Integrated Products, Inc.
19
Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 4/02 Initial release
1 4/15 Removed automotive reference 1
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