ECL 10KH High-Speed Emitter-Coupled Logic Family MC10H131 Dual Master-Slave Type D Flip-Flop Features/ Benefits Propagation delay, 1 ns typical Power dissipation, 235 mW typical Noise margin of 150 mV Voltage compensated ECL 10K-compatible Description The MC10H131 is a member of Monolithic Memories ECL family. The MC10H131 is a dual master-siave D-type flip-flop. Asynchronous Set (S) and Reset (R) override Clock (Cc) and Clock Enable (CE) inputs. Each flip-flop may be clocked separately by holding the common clock in the low state and using the enable inputs for the clocking fuction. If the common clock is to be used to clock the flip-flop, the Clock Enable inputs must be in the low state. In this case, the enable inputs perform the function of controlling the common clock. The output states of the flip-flop change on the positive transition of the controlling input(s). A change in the information present at the data (D) input will not affect the data output at any other time due to master slave construction. This ECL 10KH part is a functional/pinout duplication of the standard ECL 10K family part, with 100% improvement in clock speed and propagation delay and no increase in power-supply current. Function Tables R-S TRUTH TABLE H N.D. = Not Defined. CLOCKED TRUTH TABLE c L Ht Ht X= Don't Care. C=CE+Co. 2175 Mission College Bivd. Santa Clara, CA 95054-1592 Tel: (408) 970-9700 TWX: 910-338-2374 Ordering Information PART NUMBER PACKAGE J,N,NL(20) TEMPERATURE MC10H131 Com Logic Diagram MC10H131 Dual Master-Slave Type D Flip-Flop > : denotes edge triggered clock Pin Configurations MC10H131 Dual Master-Slave Type D Flip-Flop rie] Voc2 MC10H131 wt Vee [1 s1 [5] aE iz] $2 ria] ez [8] Cer Di VEE NC CC OD. orf] rig] a2 asia] a ui] &2 ECLIOKH 217] nt [a 3] Re mstype "[16] st D FF s2 5] 4] Dif? fio] 52 Vee] 8 9] Co Portions of this Data Sheet reproduced with the courtesy of Motorola Inc. Momories Fi) 14-39 TWX: 910-338-2376 MC10H131 ee Absolute Maximum Ratings Supply voltage Vege (VOC = 0) oe cece eee eee eee en eee eee eee en en en ne eee eee n eee e eee e Eanes 8.0 to0 Vac Input voltage Vj (VOCE =O). cece cc cnn eee enn e nnn e een eee ene E EERE EE EE EEE EEE EEE EEE REELS 0 Vdc to Veg Output Current: CONTINUOUS 2... cc ee ee een Nee EE ee E EERE EOD EERE EE EEE EERE EEE OSES TERE ree EEE EERE 50 mA SST] [ a 100 mA Operating Conditions SYMBOL PARAMETER COMMERCIAL UNIT MIN TYP MAX VEE Supply voltage ~5.46 -6.2 -4.94 Vv Ta Operating temperature range 0 75 | C Tste Storage temperature range Prastic ee 160 C Ceramic -55 165 Electrical Characteristics Ve_ = -5.2 v +5% (See Note) a 25 75 SYMBOL PARAMETER MIN MAX MIN MAX MIN MAX UNIT le Power supply current _ 62 _ 56 _ 62 mA Pins 6, 11 = 530 = 310 = 310 linH Input current HIGH aa 10 = 2 = = = BA Pins 4, 5, 12, 13 _ 790 _ 465 _ 465 lint Input current LOW 0.5 _ 0.5 _ 0.3 - BA VOH HIGH output voltage -1.02 -0.84 -0,98 -0.81 -0,92 -0.735 | Vde VoL LOW output voltage -1.95 -1.63 -1.95 -1.63 -1.95 ~1.60 | Vde Vin HIGH input voltage -1.17 ~0.84 -1.13 -0.81 -1.07 -0.735 | Vde Vit LOW input voltage ~1.95 -1.48 -1.95 ~1.48 -1.95 -1.45 | Vde Switching Characteristics v_; = -5.2 v, +5% (See Note) o 25 75 SYMBOL PARAMETER UNIT MIN MAX MIN MAX MIN MAX Clock, CE 0.80 16 0.8 17 08 18 tod Propagation delay ns Set, Reset 0.6 1.6 0.7 17 0.7 1.8 ty, t+ Rise time (20%-80%) 06 2.0 0.6 2.0 06 2.2 ns ty. t- Fall time (80%-20%) 06 2.0 0.6 2.0 06 2.2 ns tset Setup time 0.7 _ 0.7 _ 0.7 _ ns thold Hold time 0.8 _ 0.8 _ 0.8 _ ns ttog Toggle frequency 250 _ 250 _ 250 _ MHz Note: Each ECL 10KH series circuit has been designed to meet the dc specifications shown in the test table, after thermai equilibrium has been established. The circuit is in a test socket or mounted ona printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50 2 resistor to -2.0 V. 14-40 Monolithic Rd Memorles MC10H131 Switching Time Comparison ECL 10KH versus ECL 10K CLOCK TO a CLOCK TOQ MC10H131 tod ++ 1.5 MC10H131 +e 1.4ns t t t, FOR MC10H131: 1.4 ns U7 FOR MC10H131: 1.2 ns t, FOR MC10131: 20ns & FOR MC10131: 1.4 ns SET/RESET TO Q SET/RESET TOG MC10H131 tod ++ 1.4 ns MC 10131 +- ns t t t, FOR MC10H131: 1.5 ns t, FOR MC10H131: 1.2 ns t, FOR MC 10131: 2.1 ns t, FOR MC10131: 1.5 ns NOTE: t, and t; measured from the 20% to the 80% level of the autput signal swing. tod ig measured from the 50% level of the input to the 50% level of the output. Monolithio RD Memories 14-41