LV8080LPTELE - ON SEMICONDUCTOR

51914NK/O0213NK /32013NKPC 20130225-S00003 No.A2176-1/16

Semiconductor Components Industries, LLC, 2014

May, 2014

http://onsemi.com

LV52204MU

Overview

The LV52204MU is a high voltage boost driver for LED drive. LED current is set by the external resistor R1 and LED

dimming can be done by changing FB voltage with PWM or 1-Wire.

Features

• Operating Voltage from 2.7V to 5.5V

• Integrated 40V MOSFET

• 1-Wire 32 level digital and PWM dimming

• 600kHz Switching Frequency

Typical Applications

• LED Display Backlight Control

Orderin

numbe

: ENA2176A

Bi-CMOS IC

LED Boost Driver with PWM

and 1-Wire Dimming

BAT

FCAP

GND

VIN

SWIRE

1μF

220nF

1μF

10Ω

22μH

PWM/

1-WIRE

LV52204

ORDERING INFORMATION

See detailed ordering and shipping information on page 16 of this data sheet.

UDFN6 2 × 2 , 0.65P

LV52204MU

No.A2176-2/16

Specifications

Absolute Maximum Ratings at Ta = 25°C

Parameter Symbol Conditions Ratings Unit

Maximum supply voltage VCC max VCC 5.5 V

Maximum pin voltage1 V1 max SW 40 V

Maximum pin voltage2 V2 max Other pin 5.5 V

Allowable power dissipation Pd max Ta = 25°C *1 2.05 W

Operating temperature Topr -30 to +85 °C

Storage temperature Tstg -55 to +125 °C

*1 Mounted on a specified board: 70mm×50mm×1.2mm (4 layer glass epoxy)

Caution 1) Absolute maximum ratings represent the values which cannot be exceeded for any length of time.

Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current,

high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details.

Recommendation Operating Condition at Ta = 25°C

Parameter Symbol Conditions Ratings Unit

Supply voltage range1 VCC op VCC 2.7 to 5.5 V

PWM frequency Fpwm PWM MODE 300 to 100k Hz

Electrical Characteristics Analog bloc k at Ta = 25°C, VCC = 3.6V, unless otherwise specified

Parameter Symbol Conditions

Ratings

Unit

min typ max

Standby current dissipation ICC1 SHUTDOWN 0 5 μA

DC/DC current dissipation ICC2 VOUT = 30V, ILED = 20mA 1 mA

FB voltage Vfb PWM duty 100% 0.19 0.2 0.21 V

FB pin leak current Ifb 1μA

OVP voltage Vovp SW 37 38 39 V

SWOUT ON resistance Ron IL = 100mA 700 mΩ

NMOS switch current limit ILIM Vfb = 200mV 0.7 A

OSC frequency Fosc 600 kHz

High level input voltage VINH SWIRE 1.5 VCC V

Low level input voltage VINL SWIRE 0 0.4 V

Under voltage lockout Vuvlo VIN falling 2.2 V

SWIRE output voltage

for Acknowledge

Vack Rpullup = 15kΩ 0.4 V

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,

damage may occur and reliability may be affected.

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended

Operating Ranges limits may affect device reliability.

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be

indicated by the Electrical Characteristics if operated under different conditions.

LV52204MU

No.A2176-3/16

Recommended SWIRE Timing at Ta = 25°C, VCC = 3.6V, unless otherwise specified

Parameter Symbol Conditions

Ratings

Unit

min typ max

SWIRE setup time1

from shutdown

Ton1 PWM duty more than 2%,

VIN≥3.3V, -30°C to 85°C *2

2 μs

SWIRE setup time2

from shutdown

Ton2 20 μs

SWIRE mode selectable time Tsel 1 2.2 ms

SWIRE delay time to start

digital mode detection

Tw0 100 μs

SWIRE low time to switch to

digital mode

Tw1 260 μs

SWIRE low time to shutdown Toff 8.9 ms

SWIRE start time for digital

mode programming

Tstart 2 μs

SWIRE end time for digital

mode programming

Tend 2 360 μs

SWIRE High time of bit 0 Th0 Bit detection = 0 2 180 μs

SWIRE Low time of bit 0 Tl0 Bit detection = 0 Th0 × 2 360 μs

SWIRE High time of bit 1 Th1 Bit detection = 1 Tl1 × 2 360 μs

SWIRE Low time of bit1 Tl1 Bit detection = 1 2 180 μs

DCDC startup delay Tdel 2 ms

Delay time of Acknowledge Tackd 2μs

Duration of Acknowledge Tack 512 μs

*2 Guaranteed by design

Block Diagram

PWM/

1-Wire

VCC

VREF

VBAT

SWIRE 5

FCAP 2

GND

UVLO

TSD 600kHz PWM

Controler

VREF

CONTROL

OCP OVP

LV52204MU

No.A2176-4/16

Pin Connections

Pin Function

PIN # Pin Name Description

1 FB Feedback pin.

2 FCAP Filtering capacitor terminal for PWM mode.

3 GND Ground

4 SW Switch pin. Drain of the internal power FET.

5 SWIRE 1-wire dimming control and PWM dimming input (active High).

6 VCC Supply voltage.

Expose-pad Connect to GND on PCB.

1.0

2.0 2.05

0.82

3.0

--30 0 906030 120

Pd max -- Ta

Ambient temperature, Ta -- °C

Allowable power dissipation, Pd max -- W

Mounted on a specified board: 70×50×1.2mm

(4 layer glass epoxy)

FCAP

GND

VIN

SWIRE/PWM

Top view

LV52204MU

No.A2176-5/16

LED Current Setting

LED current is set by an external resistor connected between the FB pin and ground.

LED = VFB/RFB.

The VFB can be controled by two dimming modes, PWM Mode or Digital Mode.In PWM mode, PWM input is

converted into a near DC current by the internal resistor R that was equivalent to 60kΩ (±10%) and the external

capacitor CFCAP as a low pass filter with a cut-off frequency fc = 1/2πRFCAP. The VFB can be adjusted by altering

the duty cycle of the PWM signal (See Fig.1).

FB = 200 (mV) × PWM Duty (%)

On the other hand, VFB can be selected one from among 32steps in Digital Mode (See Fig.2).

Fig1. VFB vs. PWM Duty (PWM m ode) Fig2. VFB vs. Data Register Value (Digit al mode)

Dimming Mode Selection

Dimming Mode is selected by a specific pattern of the SWIRE within Tsel (1ms) from the startup of the device every

time. In order to startup the device, the SWIRE must keep high for longer than Ton.

PWM Mode

The dimming mode is set to PWM mode when it is not recognized as a digital mode within Tsel. To enter Digital Mode,

the SWIRE is required keeping in low state for Tw1 (See Fig.4). If the PWM frequency is used faster than 6.6kHz, the

dimming mode is set to PWM mode only. But slower than 6.6kHz, it is necessary to avoid entering the digital mode

condition, such as SWIRE keeps high for longer than Tsel. PWM is enabled after Tdel from Tsel.

Fig3. SWIRE Timing Diagram in PWM m ode

100

120

140

160

180

200

02010 80 907060504030 100

PWM Duty (%)

VFB (mV)

100

120

140

160

180

200

04228302624222018141210 168632

Data

VFB (mV)

SWIRE

(PWM Freq > 6.6kHz)

PWM Enable

Toff

Shutdown

TdelTsel

Ton

SWIRE

(PWM Freq < 6.6kHz)

PWM Enable

Toff

Shutdown

TdelTsel

LV52204MU

No.A2176-6/16

Digital Mode

To enter Digital Mode, SWIRE should be taken high for more than Tw0 (100μs) from the first rising edge and keep low

state for Tw1(260μs) before Tsel(1ms).

Fig4. SWIRE Timing Diagram in Digital m ode

It is required sending the device address byte and the data byte to select VFB. The bit detection is determined by the

ratio of Th and Tl (See Fig6). The start condition for the bit transmission required SWIRE high for at least Tstart. The

end condition is required SWIRE low for at least Tend.When data is not being transferred, SWIRE is set in the “H” state.

These registers are initialized with POR (Power On Reset).

In the LV52204MU, the device address (DA7 to DA0) is specified as “01110010”. D7 is setting for the acknowledge

response. If the device address and the data byte are transferred on D7 = 1, the ACK signal is sent from the receive side

to the send side. The acknowledge signal is issued when SWIRE on the send side is released and SWIRE on the receive

side is set to low state. D6 and D5 need to send 0. D4 to D0 allow to changing the FB voltage.

Device

Address

DA7 7 0

DA6 6 1

DA5 5 1

DA4 4 1

DA3 3 0

DA2 2 0

DA1 1 1

DA0 0 0

Table1. Device Address Description

Data

D7 7

0 = Acknowledge disabled

1 = Acknowledge enabled

D6 6 0

D5 5 0

D4 4 Data bit 4

D3 3 Data bit 3

D2 2 Data bit 2

D1 1 Data bit 1

D0 0 Data bit 0

Table2. Data Description

Fig5. Example of writing data

SWIRE

Digital Mode

Toff

ShutdownShutdown

Tdel

Tsel

Tw0

Tw1

Device Address & data Device Address & data

S 0 1 1 1 0 0 1 0 E S 0 0 0 E

S 0 1 1 1 0 0 1 0 E S 1 0 0 E A

Device Address ACK:Disable

FB Voltage Control

Device Address ACK:Enable

S Start Condition E End Condition A Acknowledge

LV52204MU

No.A2176-7/16

Fig6.Bit detection Diagram

D7 D6 D5 D4 D3 D2 D1 D0 FB voltage (mV)

0 1/0 0 0 0 0 0 0 0 0

1 1/0 0 0 0 0 0 0 1 5

2 1/0 0 0 0 0 0 1 0 8

3 1/0 0 0 0 0 0 1 1 11

4 1/0 0 0 0 0 1 0 0 14

5 1/0 0 0 0 0 1 0 1 17

6 1/0 0 0 0 0 1 1 0 20

7 1/0 0 0 0 0 1 1 1 23

8 1/0 0 0 0 1 0 0 0 26

9 1/0 0 0 0 1 0 0 1 29

10 1/0 0 0 0 1 0 1 0 32

11 1/0 0 0 0 1 0 1 1 35

12 1/0 0 0 0 1 1 0 0 38

13 1/0 0 0 0 1 1 0 1 44

14 1/0 0 0 0 1 1 1 0 50

15 1/0 0 0 0 1 1 1 1 56

16 1/0 0 0 1 0 0 0 0 62

17 1/0 0 0 1 0 0 0 1 68

18 1/0 0 0 1 0 0 1 0 74

19 1/0 0 0 1 0 0 1 1 80

20 1/0 0 0 1 0 1 0 0 86

21 1/0 0 0 1 0 1 0 1 92

22 1/0 0 0 1 0 1 1 0 98

23 1/0 0 0 1 0 1 1 1 104

24 1/0 0 0 1 1 0 0 0 116

25 1/0 0 0 1 1 0 0 1 128

26 1/0 0 0 1 1 0 1 0 140

27 1/0 0 0 1 1 0 1 1 152

28 1/0 0 0 1 1 1 0 0 164

29 1/0 0 0 1 1 1 0 1 176

30 1/0 0 0 1 1 1 1 0 188

31 1/0 0 0 1 1 1 1 1 *200

(*Default)

Table3. Data Register vs. FB Voltage

Device Address

(DA7 to DA0)

start

Tend

DA7

Tstart

D7DA0

Data

(D7 to D0)

Acknowledge : Disable (D7 = D0)

Tend

TI0

Low state (Bit=0)

TI0 > Th0 * 2

Th0

Device Address

(DA7 to DA0)

start

Tend

DA7

Tstart Tack

D7DA0

Data

(D7 to D0)

Acknowledge : Enable (D7 = 1)

Tack

TI1

High state (Bit=1)

TI1 > Th1 * 2

Th1

LV52204MU

No.A2176-8/16

Start up and Shutdown

The device becomes enabled when SWIRE is initially taken high.The dimming mode is determined within Tsel and the

boost converter start up after Tdel. To place the device into shutdown mode, the SWIRE must be held low for Toff.

PWM MODE

Digital MODE

Fig7.Start up and shutdown diagram

SWIRE Toff

Tdel

Device Address & dataDevice Address & data

DCDC_EN

(internal signal)

Shutdown delayProgramed value

VIN

Tw1

Tw0

FCAP

Tsel

SWIRE Toff

Tdel

200m * duty

DCDC_EN

(internal signal)

Shutdown delay

VIN

Tsel

FCAP

LV52204MU

No.A2176-9/16

Open LED Protection

If SW terminal voltage exceeds a threshold Vovp (38V typ) for 8 cycles, boost converter enters shutdown mode. In

order to restart the IC, SWIRE signal is required again.

Over Current Protection

Current limit value for built-in power MOS is around 0.7A. The power MOS is turned off for each switching cycle when

peak current through it exceeds the limit value.

Under Voltage Lock Out (UVLO)

UVLO operation works when VIN terminal voltage is below 2.2V.

Thermal Shutdown

When chip temperature is too high, boost converter is stopped.

Application Circuit Diagram

10LEDs

L1: VLS3012T-220M49 (TDK), VLF504015MT-220M (TDK)

D1: MBR0540T1 (ON semi), NSR05F40 (ONsemi)

C2: GRM21BR71H105K (Murata), C1608X5R1H105K (TDK)

VBAT

FCAP

GND

VIN

SWIRE

1μF

220nF

1μF

10Ω

22μH

PWM/

1-Wire

LV52204MU

No.A2176-10/16

6LEDs

L1: VLS3012T-100M72 (TDK), VLF302512M-100M (TDK)

D1: MBR0540T1 (ON semi), NSR05F40 (ONsemi)

C2: GRM21BR71H105K (Murata), C1608X5R1H105K (TDK)

VBAT

FCAP

GND

VIN

SWIRE

1μF

220nF

1μF

10Ω

10μH

PWM/

1-WIRE

LV52204MU

No.A2176-11/16

Typical Characteristics (VIN = 3.6V, L = 22μH, T = 25°C, unless otherwise specified)

Efficiency -- Output current

100

150

100

150

100

0 5 10 15 5 10 15

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 10 20 30 40 50 60 70 80 90

--15 15 45 7503060 -- 15 15 45 7503060

345 1 10

20 20

LED current -- mA

Efficiency -- Output current

Efficency -- %

Data register

FB voltage -- DATA register

FB voltage --

200

032

PWM duty -- %

FB voltage -- PWM duty

FB voltage -- mV

200

0 100

LED current -- mA

Efficenc

100

Temperature -- °C

FB voltage -- Temperature

FB voltage --

120

140

160

180

200

100

120

140

160

180

200

--30 90

Temperature -- °C

FB voltage -- Temperature

FB voltage -- mV

--30 90

200

400

600

800

VIN -- V

VIN current -- VIN

ICC -- µ A

1000

PWM frequency -- kHz

LED current -- PWM frequency

LED current -- mA

0.1 100

VIN=3.6V

Mode=Digital

DATA=31

DATA=16

DATA=06

Duty=100%

75%

50%

25%

Duty=50%

Duty=10%

Mode=PWM

Mode=Digital Mode=PWM

10LED

4.2V

3.0V

8LED

6LED

3.6V

LV52204MU

No.A2176-12/16

PACKAGE DIMENSIONS

LV52204MU is as follows.

T4 = Device Code

M = Date Code

= Pb-Free Package

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED

BETWEEN 0.15 AND 0.25MM FROM THE TERMINAL TIP.

4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE

TERMINALS.

5. TIE BARS MAY BE VISIBLE IN THIS VIEW AND ARE CONNECTED

TO THE THERMAL PAD.

SEATING

PLANE

0.10 C

UDFN6 2x2, 0.65P

CASE 517AB

ISSUE C

DIM

MIN MAX

MILLIMETERS

0.45 0.55

A1 0.00 0.05

A3 0.127 REF

b 0.25 0.35

D 2.00 BSC

D2 1.50 1.70

0.80 1.00

E2.00 BSC

e 0.65 BSC

--- 0.15

PIN ONE

REFERENCE

0.08 C

0.10 C

66X

GENERIC

MARKING DIAGRAM*

XX = Specific Device Code

M = Date Code

= Pb−Free Package

XXM

BOTTOM VIEW

0.25 0.35

L1 DETAIL A

ALTERNATE TERMINAL

CONSTRUCTIONS

DETAIL B

MOLD CMPDEXPOSED Cu

ALTERNATE

CONSTRUCTIONS

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

2.30

0.65

0.47

DIMENSIONS: MILLIMETERS

0.40

1.70

PITCH

0.95

PACKAGE

OUTLINE

RECOMMENDED

TOP VIEW

SIDE VIEW

DETAIL B

NOTE 4

DET AIL A

END VIEW

0.10 BC

0.05 C

A B

NOTE 5

(Note: Microdot may be in either location)

MARKING DIAGRAM

LV52204MU

No.A2176-13/16

LV52204MU

No.A2176-14/16

LV52204MU

No.A2176-15/16

LV52204MU

PS No.A2176-16/16

RDERING INFORMATION

Device Package Shipping (Qty / Packing)

LV52204MUTBG UDFN6 (2×2)

( Pb-Free ) 3000 / Tape & Reel

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