MIC4606 85V Full-Bridge MOSFET Drivers with Adaptive Dead Time and Shoot-Through Protection Features General Description * * * * * * * * * The MIC4606 is an 85V full-bridge MOSFET driver that features adaptive dead time and shoot-through protection. The adaptive dead time circuitry actively monitors both sides of the full-bridge to minimize the time between high-side and low-side MOSFET transitions, thus maximizing power efficiency. Anti shoot-through circuitry prevents erroneous inputs and noise from turning both MOSFETs of each side of the bridge on at the same time. 5.5V to 16V Gate Drive Supply Voltage Range Advanced Adaptive Dead Time Intelligent Shoot-Through Protection MIC4606-1: 4 Independent TTL Inputs MIC4606-2: 2 PWM Inputs Enable Input for On/Off Control On-Chip Bootstrap Diodes Fast 35 ns Propagation Times Drives 1000 pF Load with 20 ns Rise and Fall Times * Low Power Consumption: 235 A Total Quiescent Current * Separate High- and Low-Side Undervoltage Protection * -40C to +125C Junction Temperature Range The MIC4606 also offers a wide 5.5V to 16V operating supply range to maximize system efficiency. The low 5.5V operating voltage allows longer run times in battery-powered applications. Additionally, the MIC4606's adjustable gate drive sets the gate drive voltage to VDD for optimal MOSFET RDS(ON), which minimizes power loss due to the MOSFET's RDS(ON). The MC4606-1 features four independent inputs while the MIC4606-2 utilizes two PWM inputs, one for each side of the H-bridge. The MIC4606-1 and MIC4606-2 are available in a 16-pin 4 mm x 4 mm QFN and a 16-pin 4 mm x 5 mm TSSOP package with an operating temperature range of -40C to +125C. Applications * * * * * Full-Bridge Motor Drives Power Inverters High Voltage Step-Down Regulators Distributed Power Systems Stepper Motors Typical Application Circuit MIC4606 4x4 QFN (12V Motor Drive Configuration) 12VDC MIC5283 LDO 12V TO 3.3V EN J1 POWER VDD AHB Q1 3.3VDC VDD C I/O AHI I/O ALI I/O BHI I/O BLI AHS M Q3 FWD I/O REV J2 COMMUNICATIONS Q2 MIC4606-1 FULL-BRIDGE AHO DRIVER ALO DC MOTOR 12V 140mA fS=20kHz Q4 VSS I/O VSS 2017-2019 Microchip Technology Inc. BLO BHB BHO BHS DS20005604C-page 1 MIC4606 Package Types 11 10 8 BLO NC NC BPWM 15 14 13 2 11 BHB AHO 3 10 BHO AHS 4 9 BHS BHO BHS EP ALO ALO MIC4606-1 16-pin TSSOP 4 mm x 5 mm BHB EN BHI BLI ALI AHI NC AHB Note: 8 7 VSS AHB BHB 5 6 VDD 5 EN BLO 9 EP 12 7 4 AHS 1 VSS 3 AHO NC 6 BHI 13 2 AHB EN VDD BLI 14 12 APWM ALI 15 1 NC 16 AHI MIC4606-2 16-Pin QFN 4 mm x 4 mm 16 MIC4606-1 16-Pin QFN 4 mm x 4 mm MIC4606-2 16-pin TSSOP 4 mm x 5 mm 1 16 BHO 2 15 BHS 3 14 BLO 4 13 VSS 5 12 VDD 6 11 ALO 7 10 AHS 8 9 AHO BHB EN BPWM NC 1 16 BHO 2 15 BHS 3 14 BLO 4 13 VSS NC APWM NC AHB 5 12 VDD 6 11 ALO 7 10 AHS 8 9 AHO See Table 4-1 through Table 4-4 for pin descriptions. DS20005604C-page 2 2017-2019 Microchip Technology Inc. MIC4606 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings (Note 1) Supply Voltage (VDD, VxHB - VxHS)............................................................................................................ -0.3V to +18V Input Voltage (VxLI, VxHI, VEN) ............................................................................................................-0.3V to VDD +0.3V Voltage on xLO (VxLO) .......................................................................................................................-0.3V to VDD +0.3V Voltage on xHO (VxHO) ..............................................................................................................VHS - 0.3V to VHB +0.3V Voltage on xHS (Continuous)....................................................................................................................... -0.3V to 90V Voltage on xHB .........................................................................................................................................................108V Average Current in VDD to HB Diode ................................................................................................................... 100 mA ESD Protection On All Pins (Note 2)............................................................................................1 kV HBM, 200V MM Operating Ratings Supply Voltage (VDD) [decreasing VDD] ................................................................................................... +5.25V to +16V Supply Voltage (VDD) [increasing VDD] ...................................................................................................... +5.5V to +16V Enable Voltage (VEN) ........................................................................................................................................ 0V to VDD Voltage on xHS .......................................................................................................................................... -0.3V to +85V Voltage on xHS (repetitive transient < 1 s).................................................................................................. -1V to +90V HS Slew Rate........................................................................................................................................................ 50 V/ns Voltage on xHB ............................................................................................................................................... VHS to VDD and/or .................................................................................................................................. VDD -1V to VDD +85V Notice: Exceeding the absolute maximum ratings may damage the device. Notice: The device is not guaranteed to function outside its operating ratings. Note 1: "x" in front of a pin name refers to either A or B. (e.g. xHI can be either AHI or BHI). 2: Devices are ESD sensitive. Handling precautions are recommended. Human body model, 1.5 k in series with 100 pF. ELECTRICAL CHARACTERISTICS Electrical Characteristics: Unless otherwise indicated, VDD = VxHB = 12V; VEN = 5V; VSS = VxHS = 0V; No load on xLO or xHO; TA = +25C. Bold values indicate -40C TJ +125C. Note 1, Note 2. Parameters Symbol Min. Typ. Max. Units VDD Quiescent Current IDD -- 200 350 A -- 2.5 5 VDD Shutdown Current IDDSH -- 40 100 VDD Operating Current IDDO -- 0.35 IHB -- 35 Conditions Supply Current Total xHB Quiescent Current Note 1: 2: 3: 4: 5: xLI = xHI = 0V EN = 0V with xHS = floating A EN = 0V, xLI, xHI = 12V or 0V 0.5 mA fS = 20 kHz 75 A xLI = xHI = 0V or xLI = 0V and xHI =5V Specification for packaged product only. x in front of a pin name refers to either A or B. (e.g. xHI can be either AHI or BHI). VIL(MAX) = maximum positive voltage applied to the input which will be accepted by the device as a logic low. VIH(MIN) = minimum positive voltage applied to the input which will be accepted by the device as a logic high. xLI/xHI mode with inputs non-overlapping, assumes xHS low before xLI goes high and xLO low before xHI goes high. PWM mode (MIC4606-2) or LI/HI mode (MIC4606-1) with overlapping xLI/xHI inputs. 2017-2019 Microchip Technology Inc. DS20005604C-page 3 MIC4606 ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Characteristics: Unless otherwise indicated, VDD = VxHB = 12V; VEN = 5V; VSS = VxHS = 0V; No load on xLO or xHO; TA = +25C. Bold values indicate -40C TJ +125C. Note 1, Note 2. Parameters Symbol Min. Typ. Max. Units Conditions Total xHB Operating Current IHBO -- 30 400 A fS = 20 kHz xHB to VSS Quiescent Current IHBS -- 0. 5 5 A VxHS = VxHB = 90V xHB to VSS Operating Current IHBSO -- 3 10 A fS = 20 kHz Input (TTL: xLI, xHI, EN) (Note 2, Note 3) Low-Level Input Voltage VIL -- -- 0.8 V -- High-Level Input Voltage VIH 2.2 -- -- V -- Input Voltage Hysteresis VHYS -- 0.1 -- V -- 100 300 500 k xHI/xLI inputs 50 150 250 k xPWM inputs Input Pull-Down Resistance RI Undervoltage Protection VDD Falling Threshold VDDR 4.0 4.4 4.9 V -- VDD Threshold Hysteresis VDDH -- 0.25 -- V -- xHB Falling Threshold VHBR 4.0 4.4 4.9 V -- xHB Threshold Hysteresis VHBH -- 0.25 -- V -- Low-Current Forward Voltage VDL -- 0.4 0.70 V IVDD-xHB = 100 A High-Current Forward Voltage VDH 0.7 1.0 V IVDD-xHB = 50 mA Dynamic Resistance RD -- 3 5.0 IVDD-xHB = 50 mA Low-Level Output Voltage VOLL -- 0.3 0.6 V IxLO = 50 mA High-Level Output Voltage VOHL -- 0.5 1.0 V IxLO = 50 mA, VOHL = VDD - VxLO Peak Sink Current IOHL -- 1 -- A VxLO = 0V Peak Source Current IOLL -- 1 -- A VxLO = 12V VOLH -- 0.3 0.6 V IxHO = 50 mA Bootstrap Diode -- LO Gate Driver HO Gate Driver Low-Level Output Voltage Note 1: 2: 3: 4: 5: Specification for packaged product only. x in front of a pin name refers to either A or B. (e.g. xHI can be either AHI or BHI). VIL(MAX) = maximum positive voltage applied to the input which will be accepted by the device as a logic low. VIH(MIN) = minimum positive voltage applied to the input which will be accepted by the device as a logic high. xLI/xHI mode with inputs non-overlapping, assumes xHS low before xLI goes high and xLO low before xHI goes high. PWM mode (MIC4606-2) or LI/HI mode (MIC4606-1) with overlapping xLI/xHI inputs. DS20005604C-page 4 2017-2019 Microchip Technology Inc. MIC4606 ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Characteristics: Unless otherwise indicated, VDD = VxHB = 12V; VEN = 5V; VSS = VxHS = 0V; No load on xLO or xHO; TA = +25C. Bold values indicate -40C TJ +125C. Note 1, Note 2. Parameters Symbol Min. Typ. Max. Units Conditions High-Level Output Voltage VOHH -- 0.5 1.0 V IxHO = 50 mA, VOHH = VxHB - VxHO Peak Sink Current IOHH -- 1 -- A VxHO = 0V Peak Source Current IOLH -- 1 -- A VxLO = 12V Switching Specifications (Note 4) Lower Turn-Off Propagation Delay (xLI Falling to xLO Falling) tLPHL -- 35 75 ns -- Upper Turn-Off Propagation Delay (xHI Falling to xHO Falling) tHPHL -- 35 75 ns -- Lower Turn-On Propagation Delay (xLI Rising to xLO Rising) tLPLH -- 35 75 ns -- Upper Turn-On Propagation Delay (xHI Rising to xHO Rising) tHPLH -- 35 75 ns -- Output Rise/Fall Time tR/tF -- 20 -- ns CL = 1000 pF Output Rise/Fall Time (3V to 9V) tR/tF -- 0.8 -- s CL = 0.1 F Minimum Input Pulse Width that Changes the Output tPW -- 50 -- ns -- Switching Specifications (Note 5) Delay from xPWM High (or xLI Low) to xLO Low tLOOFF -- 35 75 ns -- xLO Output Voltage Threshold for Low-Side FET to be Considered Off VLOOFF -- 1.9 -- V -- Delay from xLO off to xHO High tHOON -- 35 75 ns -- Delay from xPWM Low (or xHI Low) to xHO Low\ tHOOFF -- 35 75 ns -- Note 1: 2: 3: 4: 5: Specification for packaged product only. x in front of a pin name refers to either A or B. (e.g. xHI can be either AHI or BHI). VIL(MAX) = maximum positive voltage applied to the input which will be accepted by the device as a logic low. VIH(MIN) = minimum positive voltage applied to the input which will be accepted by the device as a logic high. xLI/xHI mode with inputs non-overlapping, assumes xHS low before xLI goes high and xLO low before xHI goes high. PWM mode (MIC4606-2) or LI/HI mode (MIC4606-1) with overlapping xLI/xHI inputs. 2017-2019 Microchip Technology Inc. DS20005604C-page 5 MIC4606 ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Characteristics: Unless otherwise indicated, VDD = VxHB = 12V; VEN = 5V; VSS = VxHS = 0V; No load on xLO or xHO; TA = +25C. Bold values indicate -40C TJ +125C. Note 1, Note 2. Parameters Symbol Min. Typ. Max. Units Switch Node Voltage Threshold Signaling xHO is Off VSWTH 1 2.2 4 V -- Delay Between xHO FET being considered Off to xLO Turning On tLOON -- 35 75 ns -- tLOONHI -- 80 150 ns -- tSWTO 100 250 500 ns -- For xHS Low/xLI High, Delay from xPWM/xHI Low to xLO High Force xLO On if VSWTH is Not Detected Note 1: 2: 3: 4: 5: Conditions Specification for packaged product only. x in front of a pin name refers to either A or B. (e.g. xHI can be either AHI or BHI). VIL(MAX) = maximum positive voltage applied to the input which will be accepted by the device as a logic low. VIH(MIN) = minimum positive voltage applied to the input which will be accepted by the device as a logic high. xLI/xHI mode with inputs non-overlapping, assumes xHS low before xLI goes high and xLO low before xHI goes high. PWM mode (MIC4606-2) or LI/HI mode (MIC4606-1) with overlapping xLI/xHI inputs. DS20005604C-page 6 2017-2019 Microchip Technology Inc. MIC4606 TEMPERATURE SPECIFICATIONS (Note 1) Parameters Sym. Min. Typ. Max. Units Conditions Storage Temperature Range TS -60 -- +150 C -- Junction Operating Temperature TJ -40 -- +125 C -- Thermal Resistance, QFN-16 Lead JA -- 51 -- C/W -- Thermal Resistance, TSSOP-16 Lead JA -- 97.5 -- C/W -- Temperature Ranges Package Thermal Resistances Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the maximum allowable power dissipation will cause the device operating junction temperature to exceed the maximum +125C rating. Sustained junction temperatures above +125C can impact the device reliability. 2017-2019 Microchip Technology Inc. DS20005604C-page 7 MIC4606 2.0 TIMING DIAGRAMS 2.1 Non-Overlapping LI/HI Input Mode (MIC4606-1) In LI/HI input mode, external xLI/xHI inputs are delayed to the point that xHS is low before xLI is pulled high and similarly xLO is low before xHI goes high. xHO goes high with a high signal on xHI after a typical delay of 35 ns (tHPLH). xHI going low drives xHO low also with typical delay of 35 ns (tHPHL). Likewise, xLI going high forces xLO high after typical delay of 35 ns (tLPLH) and xLO follows low transition of xLI after typical delay of 35 ns (tLPHL). until xLI is pulled low (off) and xLO falls to < 1.9V. Delay from xLI going low to xLO falling is tLOOFF and delay from xLO < 1.9V to xHO being on is tHOON. xHS tLOON xHO tHOON tHOOFF 1.9V (typ) xLO xHO and xLO output rise and fall times (tR/tF) are typically 20 ns driving 1000 pF capacitive loads. All propagation delays are measured from the 50% voltage level and rise/fall times are measured 10% to 90%. 2.2V (typ) tLOOFF xHI xLI xHS FIGURE 2-2: Separate Overlapping LI/HI Input Mode (MIC4606-1). tF tR 2.3 xHO tHPLH tR tHPHL tF xLO tLPLH tLPHL xHI xLI FIGURE 2-1: Separate Non-Overlapping LI/HI Input Mode (MIC4606-1) 2.2 Overlapping LI/HI Input Mode (MIC4606-1) When xLI/xHI input high conditions overlap, xLO/xHO output states are dominated by the first output to be turned on. If xLI goes high (on) while xHO is high, xHO stays high until xHI goes low. After a delay of tHOOFF and when xHS < 2.2V, xLO goes high with a delay of tLOON. If xHS never trip the aforementioned internal comparator reference (2.2V), a falling xHI edge delayed by a typical 250 ns will set "HS latch" allowing xLO to go high. If xHS falls very fast, xLO will be held low by a 35 ns delay gated by HI going low. Conversely, xHI going high (on) when xLO is high has no effect on outputs DS20005604C-page 8 PWM Input Mode (MIC4606-2) A low xPWM signal applied to the MIC4606-2 causes the xHO to go low, typically to 35 ns (tHOOFF) after the xPWM input goes low. At this point, the switch node xHS, falls (1-2). When the xHS reaches 2.2V (VSWTH), the external high-side MOSFET is deemed off and the xLO goes high, typically within 35 ns (tLOON) (3-4). The xHS falling below 2.2V sets a latch that can only be reset by the xPWM going high. This design prevents ringing on xHS from causing an indeterminate xLO state. Should xHS never trip the aforementioned internal comparator reference (2.2V), a falling xPWM edge delayed by 250 ns will set "HS latch" allowing xLO to go high. An 80 ns delay gated by xPWM going low may determine the time to xLO going high for fast falling HS designs. xPWM going high forces xLO low in typically 35 ns (tLOOFF) (5-6). When xLO reaches 1.9V (VLOOFF), the low-side MOSFET is deemed off and xHO is allowed to go high. The delay between these two points is typically 35 ns (tHOON) (7-8). xHO and xLO output rise and fall times (tR/tF) are typically 20 ns driving 1000 pF capacitive loads. Note: All propagation delays are measured from the 50% voltage level and rise/fall times are measured 10% to 90%. 2017-2019 Microchip Technology Inc. MIC4606 tF tR 2 xHO tHOON tR 4 6 xLO 7 (VLOOFF) tF tLOOFF tLOON 3 (VSWTH) xHS 1 5 xPWM tHOOFF FIGURE 2-3: PWM Mode (MIC4606-2). 2017-2019 Microchip Technology Inc. DS20005604C-page 9 MIC4606 3.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 80 QUIESCENT CURRENT (A) HS = 0V 250 225 200 T = 125C 175 150 T = -40C T = 25C 125 4 6 8 10 12 14 16 VHB OPERATING CURRENT (A) 275 FREQ = 20kHz HS = 0V VHB = VDD 60 T = 25C 40 T = -40C 20 T = 125C 0 4 6 INPUT VOLTAGE (V) FIGURE 3-1: Input Voltage. 8 10 12 14 16 INPUT VOLTAGE (V) VDD Quiescent Current vs. FIGURE 3-4: Input Voltage. VHB Operating Current vs. 80 100 65 T = -40C DELAY (ns) QUIESCENT CURRENT (A) TAMB = 25C HS = 0V 80 60 40 T = 25C 20 tHPHL 50 tLPHL tLPLH 35 tHPLH T = 125C 0 4 6 8 10 12 14 20 16 4 INPUT VOLTAGE (V) FIGURE 3-2: Voltage. 6 8 10 12 14 16 INPUT VOLTAGE (V) Shutdown Current vs. Input FIGURE 3-5: Voltage. Propagation Delay vs. Input 300 700 Freq = 20kHz HS = 0V 275 QUIESCENT CURRENT (A) 600 500 T = 125C 400 T = 25C 300 T = -40C 200 100 VDD = 16V 250 225 VDD = 12V 200 175 VDD = 5.5V 150 125 HS = 0V 100 0 4 6 FIGURE 3-3: Input Voltage. DS20005604C-page 10 8 10 12 14 16 VDD Operating Current vs. -50 -25 0 25 50 75 100 125 TEMPERATURE (C) FIGURE 3-6: Temperature. VDD Quiescent Current vs. 2017-2019 Microchip Technology Inc. MIC4606 . 10 100 8 HS = 0V ILO , IHO = -50mA 6 VDD = 5.5V VDD = 16V VOHL , VOHH () QUIESCENT CURRENT (A) HS = 0V 80 60 VDD = 12V 40 VDD = 5.5V 20 0 -50 -25 0 25 50 75 100 VDD = 12V 4 VDD = 16V 2 0 125 -50 -25 TEMPERATURE (C) FIGURE 3-7: Temperature. Shutdown Current vs. 50 75 100 125 10 FREQ = 20kHz HS = 0V 600 500 400 VDD = 12V 300 VDD = 12V VDD = 5.5V 6 4 VDD = 16V 2 VDD = 5.5V 200 HS = 0V ILO , IHO = 50mA 8 VDD = 16V VOLL , VOLH () VDD OPERATING CURRENT (A) 25 FIGURE 3-10: High Level Output Resistance vs. Temperature. 700 100 0 -50 -25 0 25 50 75 100 125 -50 -25 TEMPERATURE (C) FIGURE 3-8: Temperature. 0 25 50 75 100 125 TEMPERATURE (C) VDD Operating Current vs. FIGURE 3-11: Low Level Output Resistance vs. Temperature. 80 5 FREQ = 20kHz HS = 0V 70 HS = 0V 4.8 VDD Rising 60 50 VHB = 16V UVLO (V) VHB OPERATING CURRENT (A) 0 TEMPERATURE (C) 40 30 4.6 VHB Rising VDD Falling 4.4 VHB = 12V VHB Falling 20 4.2 VHB = 5.5V 10 0 4 -50 -25 0 25 50 75 100 125 -50 TEMPERATURE (C) FIGURE 3-9: Temperature. VHB Operating Current vs. 2017-2019 Microchip Technology Inc. -25 0 25 50 75 100 125 TEMPERATURE (C) FIGURE 3-12: Temperature. UVLO Thresholds vs. DS20005604C-page 11 MIC4606 0.6 HS = 0V 0.5 HYSTERESIS (V) VDD OPERATING CURRENT (mA) 10 0.4 VHB Hysteresis 0.3 0.2 VDD Hysteresis 0.1 HS = 0V VHB = VDD =12V T = -40C 8 6 T = 25C 4 T = 125C 2 0 0 -50 -25 0 25 50 75 100 0 125 200 TEMPERATURE (C) FIGURE 3-13: 400 600 800 1000 FREQUENCY (kHz) FIGURE 3-16: UVLO Hysteresis vs. Temperature. VDD Operating Current vs. Frequency. 2.5 VHB OPERATING CURRENT (mA) 60 MIC4606-1 VDD = VHB = 12V HS = 0V 50 DELAY (ns) tLPLH 40 tLPHL tHPHL 30 tHPLH 20 -50 -25 0 25 50 75 TEMPERATURE (C) FIGURE 3-14: 100 HS = 0V VHB = VDD = 12V 2 T = -40C 1.5 1 T = 25C T = 125C 0.5 0 0 125 200 400 FIGURE 3-17: Propagation Delay vs. 400 800 1000 VHB Operating Current vs. Frequency. Temperature. 600 FREQUENCY (kHz) 1000 MIC4606-2 VDD = VHB = 12V HS = 0V 320 HS = 0V FORCE LO On FORWARD CURRENT (mA) 360 DELAY (ns) 280 240 200 PWM to LO Low 160 PWM Low-to-LO High 120 80 40 PWM Low to HO Low -25 0 25 50 75 TEMPERATURE (C) FIGURE 3-15: Temperature. DS20005604C-page 12 100 T = 125C T = -40C 10 1 0.1 0 -50 T = 25C 100 125 Propagation Delay (PWM) vs. 0.2 FIGURE 3-18: 0.3 0.4 0.5 0.6 0.7 0.8 0.9 FORWARD VOLTAGE (V) 1.0 Bootstrap Diode I-V Characteristics. 2017-2019 Microchip Technology Inc. MIC4606 100 REVERSE CURRENT (A) HS = 0V 10 1 T = 125C 0.1 T = 85C 0.01 0.001 T = 25C 0.0001 0 10 FIGURE 3-19: Current. 20 30 40 50 60 70 80 REVERSE VOLTAGE (V) 90 100 Bootstrap Diode Reverse 2017-2019 Microchip Technology Inc. DS20005604C-page 13 MIC4606 4.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 4-1 through Table 4-4. TABLE 4-1: MIC4606-1 QFN PIN FUNCTION TABLE Pin Number MIC4606-1 4x4 QFN 1 NC 2 AHB Phase A high-side bootstrap supply. An external bootstrap capacitor is required. Connect the bootstrap capacitor between this pin and AHS. An on-chip bootstrap diode is connected from VDD to AHB. 3 AHO Phase A high-side drive output. Connect to the external high-side power MOSFET gate. 4 AHS Phase A high-side drive reference connection. Connect to the external high-side power MOSFET source terminal. Connect a bootstrap capacitor between this pin and AHB. 5 ALO Phase A low-side drive output. Connect to the external low-side power MOSFET gate. 6 VDD Input supply for gate drivers. Decouple this pin to VSS with a >1.0 F capacitor. 7 VSS Driver reference supply input. Connect to the power ground of the external circuitry. 8 BLO Phase B low-side drive output. Connect to the external low-side power MOSFET gate. 9 BHS Phase B high-side drive reference connection. Connect to the external high-side power MOSFET source terminal. Connect a bootstrap capacitor between this pin and BHB. 10 BHO Phase B high-side drive output. Connect to the external high-side power MOSFET gate. 11 BHB Phase B high-side bootstrap supply. An external bootstrap capacitor is required. Connect the bootstrap capacitor between this pin and BHS. An on-chip bootstrap diode is connected from VDD to BHB. 12 EN Enable input. A logic high on the enable pin results in normal operation. A logic low disables all outputs and places the driver into a low current shutdown mode. Do not leave this pin floating. 13 BHI Phase B high-side drive input 14 BLI Phase B low-side drive input Description No Connect 15 ALI Phase A low-side drive input 16 AHI Phase A high-side drive input EP ePad DS20005604C-page 14 Exposed thermal pad. Connect to VSS. A connection to the ground plane is necessary for optimum thermal performance. 2017-2019 Microchip Technology Inc. MIC4606 TABLE 4-2: MIC4606-2 QFN PIN FUNCTION TABLE Pin Number MIC4606-2 4x4 QFN 1 NC 2 AHB Phase A high-side bootstrap supply. An external bootstrap capacitor is required. Connect the bootstrap capacitor between this pin and AHS. An on-chip bootstrap diode is connected from VDD to AHB. 3 AHO Phase A high-side drive output. Connect to the external high-side power MOSFET gate. 4 AHS Phase A high-side drive reference connection. Connect to the external high-side power MOSFET source terminal. Connect a bootstrap capacitor between this pin and AHB. 5 ALO Phase A low-side drive output. Connect to the external low-side power MOSFET gate. 6 VDD Input supply for gate drivers. Decouple this pin to VSS with a >1.0 F capacitor. 7 VSS Driver reference supply input. Connect to the power ground of the external circuitry. 8 BLO Phase B low-side drive output. Connect to the external low-side power MOSFET gate. 9 BHS Phase B high-side drive reference connection. Connect to the external high-side power MOSFET source terminal. Connect a bootstrap capacitor between this pin and BHB. 10 BHO Phase B high-side drive output. Connect to the external high-side power MOSFET gate. 11 BHB Phase B high-side bootstrap supply. An external bootstrap capacitor is required. Connect the bootstrap capacitor between this pin and BHS. An on-chip bootstrap diode is connected from VDD to BHB. 12 EN Enable input. A logic high on the enable pin results in normal operation. A logic low disables all outputs and places the driver into a low current shutdown mode. Do not leave this pin floating. 13 BPWM 14 NC No connect 15 NC No connect 16 APWM EP ePad Description No Connect Phase B PWM input for single input signal drive Phase A PWM input for single input signal drive Exposed thermal pad. Connect to VSS. A connection to the ground plane is necessary for optimum thermal performance. 2017-2019 Microchip Technology Inc. DS20005604C-page 15 MIC4606 TABLE 4-3: MIC4606-1 TSSOP PIN FUNCTION TABLE Pin Number MIC4606-1 TSSOP Description 1 BHB Phase B high-side bootstrap supply. An external bootstrap capacitor is required. Connect the bootstrap capacitor between this pin and BHS. An on-chip bootstrap diode is connected from VDD to BHB. 2 EN Enable input. A logic high on the enable pin results in normal operation. A logic low disables all outputs and places the driver into a low current shutdown mode. Do not leave this pin floating. 3 BHI Phase B high-side drive input 4 BLI Phase B low-side drive input 5 ALI Phase A low-side drive input 6 AHI Phase A high-side drive input 7 NC No Connect 8 AHB Phase A high-side bootstrap supply. An external bootstrap capacitor is required. Connect the bootstrap capacitor between this pin and AHS. An on-chip bootstrap diode is connected from VDD to AHB. 9 AHO Phase A high-side drive output. Connect to the external high-side power MOSFET gate. 10 AHS Phase A high-side drive reference connection. Connect to the external high-side power MOSFET source terminal. Connect a bootstrap capacitor between this pin and AHB. 11 ALO Phase A low-side drive output. Connect to the external low-side power MOSFET gate. 12 VDD Input supply for gate drivers. Decouple this pin to VSS with a >1.0 F capacitor. 13 VSS Driver reference supply input. Connect to the power ground of the external circuitry. 14 BLO Phase B low-side drive output. Connect to the external low-side power MOSFET gate. 15 BHS Phase B high-side drive reference connection. Connect to the external high-side power MOSFET source terminal. Connect a bootstrap capacitor between this pin and BHB. 16 BHO Phase B high-side drive output. Connect to the external high-side power MOSFET gate. DS20005604C-page 16 2017-2019 Microchip Technology Inc. MIC4606 TABLE 4-4: MIC4606-2 TSSOP PIN FUNCTION TABLE Pin Number MIC4606-2 TSSOP Description 1 BHB Phase B high-side bootstrap supply. An external bootstrap capacitor is required. Connect the bootstrap capacitor between this pin and BHS. An on-chip bootstrap diode is connected from VDD to BHB. 2 EN Enable input. A logic high on the enable pin results in normal operation. A logic low disables all outputs and places the driver into a low current shutdown mode. Do not leave this pin floating. 3 BPWM 4 NC No connect 5 NC No connect 6 APWM 7 NC 8 AHB Phase A high-side bootstrap supply. An external bootstrap capacitor is required. Connect the bootstrap capacitor between this pin and AHS. An on-chip bootstrap diode is connected from VDD to AHB. 9 AHO Phase A high-side drive output. Connect to the external high-side power MOSFET gate. 10 AHS Phase A high-side drive reference connection. Connect to the external high-side power MOSFET source terminal. Connect a bootstrap capacitor between this pin and AHB. 11 ALO Phase A low-side drive output. Connect to the external low-side power MOSFET gate. 12 VDD Input supply for gate drivers. Decouple this pin to VSS with a >1.0 F capacitor. 13 VSS Driver reference supply input. Connect to the power ground of the external circuitry. 14 BLO Phase B low-side drive output. Connect to the external low-side power MOSFET gate. 15 BHS Phase B high-side drive reference connection. Connect to the external high-side power MOSFET source terminal. Connect a bootstrap capacitor between this pin and BHB. 16 BHO Phase B high-side drive output. Connect to the external high-side power MOSFET gate. Phase B PWM input for single input signal drive Phase A PWM input for single input signal drive No Connect 2017-2019 Microchip Technology Inc. DS20005604C-page 17 MIC4606 5.0 FUNCTIONAL DIAGRAM The latch is set by the quicker of either the falling edge of xHS or xLI gated delay of 250 ns. The latch is present to lockout xLO bounce due to ringing on xHS. If xHS never adequately falls due to the absence of or the presence of a very weak external pull-down on xHS, the gated delay of 250 ns at xLI will set the latch allowing xLO to transition high. This in turn allows the xLI startup pulse to charge the bootstrap capacitor if the load inductor current is very low and xHS is uncontrolled. The latch is reset by the xLI falling edge. For xHO to be high, the xHI must be high and the xLO must be low. xHO going high is delayed by xLO falling below 1.9V. The xHI and xLI inputs must not rise at the same time to prevent a glitch from occurring on the output. A minimum 50 ns delay between both inputs is recommended. xLO is turned off very quickly on the xLI falling edge. xLO going high is delayed by the longer of 35 ns delay of xHO control signal going "off" or the RS latch being set. There is one external enable pin that controls both phases. VDD xHB *COMMON TO BOTH PHASES * EN BIAS REF VDD UVLO HB UVLO xHO LEVEL SHIFT -2 ONLY -1 HI -2 PWM -1 LI -2 NC xHS OR EDGE INPUT LOGIC ( SEE DIAGRAM BELOW) S R _ Q xLO -1 ONLY FIGURE 5-1: MIC4606 xPhase Top Level Block Diagram. AE HO SECTION AND INPUT 1.9V LO 35ns DELAY HI LI R 250ns DELAY S 2.2V HS FIGURE 5-2: DS20005604C-page 18 _ Q AE LO SECTION FF RESET Input Logic Block in Figure 5-1. 2017-2019 Microchip Technology Inc. MIC4606 6.0 FUNCTIONAL DESCRIPTION The MIC4606 is a noninverting, 85V full-bridge MOSFET driver designed to independently drive all four N-Channel MOSFETs in the bridge. The MIC4606 offers a wide 5.5V to 16V operating supply range with either four independent TTL inputs (MIC4606-1) or two PWM inputs, one for each phase (MIC4606-2). Refer to Figure 5-1. A high level applied to xLI pin causes VDD to be applied to the gate of the external MOSFET. A low level on the xLI pin grounds the gate of the external MOSFET. VDD The drivers contain input buffers with hysteresis, three independent UVLO circuits (two high side and one low side), and four output drivers. The high-side output drivers utilize a high-speed level-shifting circuit that is referenced to its HS pin. Each phase has an internal diode that is used by the bootstrap circuits to provide the drive voltages for each of the two high-side outputs. 6.1 Enable Inputs There is one external enable pin that controls both phases. A logic high on the enable pin (EN) allows for startup of both phases and normal operation. Conversely, when a logic low is applied on the enable pin, both phases turn-off and the device enters a low current shutdown mode. All outputs (xHO and xLO) are pulled low when EN is low. Do not leave the EN pin floating. 6.3 Input Stage All input pins (xLI and xHI) are referenced to the VSS pin. The MIC4606 has a TTL-compatible input range and can be used with input signals with amplitude less than the supply voltage. The threshold level is independent of the VDD supply voltage and there is no dependence between IVDD and the input signal amplitude. This feature makes the MIC4606 an excellent level translator that will drive high level gate threshold MOSFETs from a low-voltage PWM IC. 6.4 LO MIC4606 Startup and UVLO The UVLO circuits force the driver's outputs low until the supply voltage exceeds the UVLO threshold. The low-side UVLO circuit monitors the voltage between the VDD and VSS pins. The high-side UVLO circuits monitor the voltage between the xHB and xHS pins. Hysteresis in the UVLO circuits prevent noise and finite circuit impedance from causing chatter during turn-on. 6.2 EXTERNAL FET Low-Side Driver A block diagram of the low-side driver is shown in Figure 6-1. It drives a ground (VSS pin) referenced N-channel MOSFET. Low impedances in the driver allow the external MOSFET to be turned on and off quickly. The rail-to-rail drive capability of the output ensures high noise immunity and a low RDS(ON) from the external MOSFET. 2017-2019 Microchip Technology Inc. VSS FIGURE 6-1: Diagram. 6.5 Low-Side Driver Block High-Side Driver and Bootstrap Circuit A block diagram of the high-side driver and bootstrap circuit is shown in Figure 6-2. This driver is designed to drive a floating N-channel MOSFET, whose source terminal is referenced to the HS pin. xHB VDD EXTERNAL FET CB xHO LEVEL SHIFT MIC4606 xHS FIGURE 6-2: High-Side Driver and Bootstrap Circuit Block Diagram. A low-power, high-speed, level-shifting circuit isolates the low side (VSS pin) referenced circuitry from the high-side (xHS pin) referenced driver. Power to the high-side driver and UVLO circuit is supplied by the bootstrap capacitor (CB) while the voltage level of the xHS pin is shifted high. The bootstrap circuit consists of an internal diode and external capacitor, CB. In a typical application, such as the motor driver shown in Figure 6-3 (only Phase A illustrated), the AHS pin is at ground potential while the DS20005604C-page 19 MIC4606 low-side MOSFET is on. The internal diode allows capacitor CB to charge up to VDD - VF during this time (where VF is the forward voltage drop of the internal diode). After the low-side MOSFET is turned off and the AHO pin turns on, the voltage across capacitor CB is applied to the gate of the high-side external MOSFET. As the high-side MOSFET turns on, voltage on the AHS pin rises with the source of the high-side MOSFET until it reaches VIN. As the AHS and AHB pins rise, the internal diode is reverse biased, preventing capacitor CB from discharging. VIN CB AHB VDD CVDD AHI Q1 AHO LEVEL SHIFT PHASE A AHS ALI M PHASE B ALO Q2 PHASE A MIC4606 VSS FIGURE 6-3: 6.6 MIC4606 Motor Driver Example. Programmable Gate Drive DS20005604C-page 20 RDS(on), DRAIN-TO-SOURCE RESISTANCE () 1.1E-02 The MIC4606 offers programmable gate drive, which means the MOSFET gate drive (gate-to-source voltage) equals the VDD voltage. This feature offers designers flexibility in driving the MOSFETs. Different MOSFETs require different VGS characteristics for optimum RDS(ON) performance. Typically, the higher the gate voltage (up to 16V), the lower the RDS(ON) achieved. For example, a NTMSF4899NF MOSFET can be driven to the ON state with a gate voltage of 5.5V but RDS(ON) is 5.2 m. If driven to 10V, RDS(ON) is 4.1 m--a decrease of 20%. In low-current applications, the losses due to RDS(ON) are minimal, but in battery-powered high-current motor drive applications such as power tools, the difference in RDS(ON) can cut into the efficiency budget, reducing run time. ID = 30A TJ = 25C 1E-02 9E-03 8E-03 7E-03 6E-03 5E-03 4E-03 3E-03 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 VGS, GATE-TO-SOURCE VOLTAGE (V) FIGURE 6-4: MOSFET RDS(ON) vs. VGS. 2017-2019 Microchip Technology Inc. MIC4606 7.0 APPLICATION INFORMATION 7.1 Adaptive Dead Time The door lock/unlock circuit diagram shown in Figure 7-2 is used to illustrate the importance of the adaptive dead time feature of the MIC4606. For each phase, it is important that both MOSFETs are not conducting at the same time or VIN will be shorted to ground and current will "shoot through" the MOSFETs. Excessive shoot-through causes higher power dissipation in the MOSFETs, voltage spikes and ringing. The high switching current and voltage ringing generate conducted and radiated EMI. EXTERNAL FET xHB VDD CGD RON CB xHO RG RG_FET CGS ROFF MIC4606 xHS Minimizing shoot-through can be done passively, actively or through a combination of both. Passive shoot-through protection can be achieved by implementing delays between the high and low gate drivers to prevent both MOSFETs from being on at the same time. These delays can be adjusted for different applications. Although simple, the disadvantage of this approach is that it requires long delays to account for process and temperature variations in the MOSFET and MOSFET driver. FIGURE 7-1: MIC4606 Driving an External MOSFET. The internal gate resistance (RG_FET) and any external damping resistor (RG) isolate the MOSFET's gate from the driver output. There is a delay between when the driver output goes low and the MOSFET turns off. This turn-off delay is usually specified in the MOSFET data sheet. This delay increases when an external damping resistor is used. Adaptive dead time monitors voltages on the gate drive outputs and switch node to determine when to switch the MOSFETs on and off. This active approach adjusts the delays to account for some of the variations, but it too has its disadvantages. High currents and fast switching voltages in the gate drive and return paths can cause parasitic ringing to turn the MOSFETs back on even while the gate driver output is low. Another disadvantage is that the driver cannot monitor the gate voltage inside the MOSFET. Figure 7-1 shows an equivalent circuit of the high-side gate drive, including parasitic. 12VDC 2.2F 1F 16V MIC5283 LDO 12V TO 3.3V AHB Q1 3.3VDC 2.2F 10V MIC4606-1 FULL-BRIDGE DRIVER VDD C Unlock I/O Lock J2 COMMUNICATIONS FIGURE 7-2: VDD EN J1 POWER I/O AHI I/O ALI I/O BHI I/O BLI Q2 1F 1F AHO AHS M ALO DC MOTOR 12V 140mA fS=20kHz VSS I/O VSS BLO BHB BHO BHS Door Lock/Unlock Circuit. 2017-2019 Microchip Technology Inc. DS20005604C-page 21 MIC4606 1.9V LO AE HO SECTION AND INPUT Care must be taken to ensure that the input signal pulse width is greater than the minimum specified pulse width. An input signal that is less than the minimum pulse width may result in no output pulse or an output pulse whose width is significantly less than the input. AE LO SECTION FF RESET The maximum duty cycle (ratio of high side on-time to switching period) is determined by the time required for the CB capacitor to charge during the off-time. Adequate time must be allowed for the CB capacitor to charge up before the high-side driver is turned back on. 35ns DELAY HI LI R 250ns DELAY 2.2V HS FIGURE 7-3: Diagram. S _ Q Adaptive Dead-Time Logic The MIC4606 uses a combination of active sensing and passive delay to ensure that both MOSFETs are not on at the same time. Figure 7-3 illustrates how the adaptive dead time circuitry works. For the MIC4606-2, a high level on the xPWM pin causes /HI to go high and /LI to go low. This causes the xLO pin to go low. The MIC4606 monitors the xLO pin voltage and prevents the xHO pin from turning on until the voltage on the xLO pin reaches the VLOOFF threshold. After a short delay, the MIC4606 drives the xHO pin high. Monitoring the xLO voltage eliminates any excessive delay due to the MOSFET drivers turn-off time and the short delay accounts for the MOSFET turn-off delay as well as letting the xLO pin voltage settle out. An external resistor between the xLO output and the MOSFET may affect the performance of the xLO pin monitoring circuit and is not recommended. A low on the xPWM pin causes /HI to go low and /LI to go high. This causes the xHO pin to go low after a short delay (tHOOFF). Before the xLO pin can go high, the voltage on the switching node (xHS pin) must have dropped to 2.2V. Monitoring the switch voltage instead of the xHO pin voltage eliminates timing variations and excessive delays due to the high side MOSFET turn-off. The xLO driver turns on after a short delay (tLOON). Once the xLO driver is turned on, it is latched on until the xPWM signal goes high. This prevents any ringing or oscillations on the switch node or xHS pin from turning off the xLO driver. If the xPWM pin goes low and the voltage on the xHS pin does not cross the VSWTH threshold, the xLO pin will be forced high after a short delay (tSWTO), insuring proper operation. The internal logic circuits also insure a "first on" priority at the inputs. If the xHO output is high, the xLI pin is inhibited. A high signal or noise glitch on the xLI pin has no effect on the xHO or xLO outputs until the xHI pin goes low. Similarly, the xLO being high holds xHO low until xLI and xLO are low. Fast propagation delay between the input and output drive waveform is desirable. It improves overcurrent protection by decreasing the response time between the control signal and the MOSFET gate drive. Minimizing propagation delay also minimizes phase shift errors in power supplies with wide bandwidth control loops. DS20005604C-page 22 Although the adaptive dead time circuit in the MIC4606 prevents the driver from turning both MOSFETs on at the same time, other factors outside of the anti shoot-through circuit's control can cause shoot-through. Other factors include ringing on the gate drive node and capacitive coupling of the switching node voltage on the gate of the low-side MOSFET. The scope photo in Figure 7-4 shows the dead time (<20 ns) between the high and low-side MOSFET transitions as the low-side driver switches off while the high-side driver transitions from off to on. FIGURE 7-4: Adaptive Dead Time LO (low) to HO (high). Table 7-1 contains truth tables for the MIC4606-1 (Independent TTL inputs) and Table 7-2 is for the MIC4606-2 (PWM inputs) that details the "first on" priority as well as the failsafe delay (tSWTO). TABLE 7-1: MIC4606-1 TRUTH TABLE xLI xHI xLO xHO Comments 0 0 0 0 Both outputs off. 0 1 0 1 xHO will not go high until xLO falls below 1.9V. 1 0 1 0 xLO will be delayed an extra 250 ns if xHS never falls below 2.2V. 1 1 X X First ON stays on until input of same goes low. 2017-2019 Microchip Technology Inc. MIC4606 TABLE 7-2: xPWM 0 1 xLO 1 0 MIC4606-2 TRUTH TABLE xHO Comments 0 xLO will be delayed an extra 250 ns if xHS never falls below 2.2V. 1 VIN CB AHB VDD DBST CVDD AHI AHO Level Shift RG RHS AHS xHO will not go high until xLO falls below 1.9V. DCLAMP Phase A M ALO ALI VNEG RG 7.2 HS Pin Clamp Phase B MIC4606 A resistor/diode clamp between the motor phase node and the xHS pin is necessary to clamp large negative glitches or pulses on the xHS pin. Figure 7-5 shows the Phase A section high-side and low-side MOSFETs connected to one phase of the motor. There is a brief period of time (dead time) between switching to prevent both MOSFETs from being on at the same time. When the high-side MOSFET is conducting during the on-time state, current flows into the motor. After the high-side MOSFET turns off, but before the low-side MOSFET turns on, current from the motor flows through the body diode in parallel with the low-side MOSFET. Depending upon the turn-on time of the body diode, the motor current, and circuit parasitics, the initial negative voltage on the switch node can be several volts or more. The forward voltage drop of the body diode can be several volts, depending on the body diode characteristics and motor current. Even though the xHS pins are rated for negative voltage, it is good practice to clamp the negative voltage on the xHS pin with a resistor and diode to prevent excessive negative voltage from damaging the driver. Depending upon the application and amount of negative voltage on the switch node, a 3 resistor is recommended. If the xHS pin voltage exceeds 0.7V, a diode between the xHS pin and ground is recommended. The diode reverse voltage rating must be greater than the high-voltage input supply (VIN). Larger values of resistance can be used if necessary. Adding a series resistor in the switch node limits the peak high-side driver current during turn-off, which affects the switching speed of the high-side driver. The resistor in series with the HO pin may be reduced to help compensate for the extra HS pin resistance. VSS FIGURE 7-5: 7.3 Negative HS Pin Voltage. Power Dissipation Considerations Power dissipation in the driver can be separated into three areas: * Internal diode dissipation in the bootstrap circuit * Internal driver dissipation * Quiescent current dissipation used to supply the internal logic and control functions. 7.4 Bootstrap Circuit Power Dissipation Power dissipation of the internal bootstrap diode primarily comes from the average charging current of the bootstrap capacitor (CB) multiplied by the forward voltage drop of the diode. Secondary sources of diode power dissipation are the reverse leakage current and reverse recovery effects of the diode. The average current drawn by repeated charging of the high-side MOSFET is calculated by: EQUATION 7-1: I F AVE = Q GATE fS Where: QGATE Total gate charge at VHB fS Gate drive switching frequency The average power dissipated by the forward voltage drop of the diode equals: EQUATION 7-2: P DIODEfwd = I F AVE VF Where: VF 2017-2019 Microchip Technology Inc. Diode forward voltage drop DS20005604C-page 23 MIC4606 There are two phases in the MIC4606. The power dissipation for each of the bootstrap diodes must be calculated and summed to obtain the total bootstrap diode power dissipation for the package. The value of VF should be taken at the peak current through the diode; however, this current is difficult to calculate because of differences in source impedances. The peak current can either be measured or the value of VF at the average current can be used, which will yield a good approximation of diode power dissipation. The reverse leakage current of the internal bootstrap diode is typically 3 A at a reverse voltage of 85V at 125C. Power dissipation due to reverse leakage is typically much less than 1 mW and can be ignored. An optional external bootstrap diode may be used instead of the internal diode (Figure 7-6). An external diode may be useful if high gate charge MOSFETs are being driven and the power dissipation of the internal diode is contributing to excessive die temperatures. The voltage drop of the external diode must be less than the internal diode for this option to work. The reverse voltage across the diode will be equal to the input voltage minus the VDD supply voltage. The above equations can be used to calculate power dissipation in the external diode; however, if the external diode has significant reverse leakage current, the power dissipated in that diode due to reverse leakage can be calculated as: EXTERNAL DIODE CB xHB VDD HI VIN xHO LEVEL SHIFT xHS LI xLO MIC4606 VSS FIGURE 7-6: 7.5 Optional Bootstrap Diode. Gate Driver Power Dissipation Power dissipation in the output driver stage is mainly caused by charging and discharging the gate to source and gate to drain capacitance of the external MOSFET. Figure 7-7 shows a simplified equivalent circuit of the MIC4606 driving an external high-side MOSFET. EQUATION 7-3: PDIODErev = I R V REV 1 - D VREV D CGD RON Where: IR EXTERNAL FET xHB VDD CB Reverse current flow at VREV and TJ xHO Diode reverse voltage RG Duty cycle (tON x fS) The on-time is the time the high-side switch is conducting. In most topologies, the diode is reverse biased during the switching cycle off-time. DS20005604C-page 24 ROFF RG_FET CGS MIC4606 xHS FIGURE 7-7: MIC4606 Driving an External High-Side MOSFET. 2017-2019 Microchip Technology Inc. MIC4606 7.6 Dissipation During the External MOSFET Turn-On The effective capacitances of CGD and CGS are difficult to calculate because they vary nonlinearly with ID, VGS, and VDS. Fortunately, most power MOSFET specifications include a typical graph of total gate charge versus VGS. Figure 7-8 shows a typical gate charge curve for an arbitrary power MOSFET. This chart shows that for a gate voltage of 10V, the MOSFET requires about 23.5 nC of charge. The energy dissipated by the resistive components of the gate drive circuit during turn-on is calculated as: EQUATION 7-4: Where: CISS VGS - GATE-TO-SOURCE VOLTAGE (V) Energy from capacitor CB is used to charge up the input capacitance of the MOSFET (CGD and CGS). The energy delivered to the MOSFET is dissipated in the three resistive components, RON, RG and RG_FET. RON is the on resistance of the upper driver MOSFET in the MIC4606. RG is the series resistor (if any) between the driver and the MOSFET. RG_FET is the gate resistance of the MOSFET. RG_FET is usually listed in the power MOSFET's specifications. The ESR of capacitor CB and the resistance of the connecting etch can be ignored since they are much less than RON and RG_FET. QG - TOTAL GATE CHARGE (nC) FIGURE 7-8: VGS. Typical Gate Charge vs. The same energy is dissipated by ROFF, RG, and RG_FET when the driver IC turns the MOSFET off. Assuming RON is approximately equal to ROFF, the total energy and power dissipated by the resistive drive elements is: EQUATION 7-7: 2 1 E = --- CISS VGS 2 Total gate capacitance of the MOSFET E DRIVER = Q G V GS Where: EDRIVER but EQUATION 7-5: Energy dissipated per switching cycle and EQUATION 7-8: Q = CV P DRIVER = Q G VGS fS Where: so EQUATION 7-6: 1 E = --- Q G V GS 2 PDRIVER Power dissipated per switching cycle QG Total gate charge at VGS VGS Gate-to-source voltage on the MOSFET fS Switching frequency of the gate drive circuit The power dissipated in the driver equals the ratio of RON and ROFF to the external resistive losses in RG and RG_FET. Letting RON = ROFF, the power dissipated in the driver due to driving the external MOSFET is: 2017-2019 Microchip Technology Inc. DS20005604C-page 25 MIC4606 EQUATION 7-9: EQUATION 7-11: RON Pdiss driver = P DRIVER ------------------------------------------------R ON + RG + R G_FET There are four MOSFETs driven by the MIC4606. The power dissipation for each of the drivers must be calculated and summed to obtain the total driver diode power dissipation for the package. In some cases, the high-side FET of one phase may be pulsed at a frequency, fS, while the low-side FET of the other phase is kept continuously on. Since the MOSFET gate is capacitive, there is no driver power if the FET is not switched. The operation of each of the four drivers must be considered to accurately calculate power dissipation. 7.7 The die temperature can be calculated after the total power dissipation is known. EQUATION 7-12: T J = T A + PDISStotal JA Where: Supply Current Power Dissipation Power is dissipated in the input and control sections of the MIC4606, even if there is no external load. Current is still drawn from the VDD and HB pins for the internal circuitry, the level shifting circuitry, and shoot-through current in the output drivers. The VDD and HB currents are proportional to operating frequency and the VDD and VHB voltages. The typical characteristic graphs show how supply current varies with switching frequency and supply voltage. The power dissipated by the MIC4606 due to supply current is: EQUATION 7-10: Pdiss supply = VDD I DD + V HB IHB Values for IDD and IHB are found in the Electrical Characteristics tables and the Typical Performance Curves graphs. 7.8 Pdiss total = Pdiss supply + Pdiss drive + P DIODE Total Power Dissipation and Thermal Considerations Total power dissipation in the MIC4606 is equal to the power dissipation caused by driving the external MOSFETs, the supply currents and the internal bootstrap diodes. DS20005604C-page 26 TA Maximum ambient temperature TJ Junction temperature PDISStotal JA 7.9 Total power dissipation Thermal resistance from junction to ambient air Other Timing Considerations Make sure the input signal pulse width is greater than the minimum specified pulse width. An input signal that is less than the minimum pulse width may result in no output pulse or an output pulse whose width is significantly less than the input. The maximum duty cycle (ratio of high side on-time to switching period) is controlled by the minimum pulse width of the low side and by the time required for the CB capacitor to charge during the off-time. Adequate time must be allowed for the CB capacitor to charge up before the high-side driver is turned on. 7.10 Decoupling and Bootstrap Capacitor Selection Decoupling capacitors are required for both the low side (VDD) and high side (HB) supply pins. These capacitors supply the charge necessary to drive the external MOSFETs and also minimize the voltage ripple on these pins. The capacitor from HB to HS has two functions: it provides decoupling for the high-side circuitry and also provides current to the high-side circuit while the high-side external MOSFET is on. Ceramic capacitors are recommended because of their low impedance and small size. Z5U type ceramic capacitor dielectrics are not recommended because of the large change in capacitance over temperature and voltage. A minimum value of 0.1 F is required for CB (HB to HS capacitors) and 1 F for the VDD capacitor, regardless of the MOSFETs being driven. Larger MOSFETs may require larger capacitance values for proper operation. The voltage rating of the capacitors 2017-2019 Microchip Technology Inc. MIC4606 depends on the supply voltage, ambient temperature and the voltage derating used for reliability. 25V rated X5R or X7R ceramic capacitors are recommended for most applications. The minimum capacitance value should be increased if low voltage capacitors are used because even good quality dielectric capacitors, such as X5R, will lose 40% to 70% of their capacitance value at the rated voltage. Placement of the decoupling capacitors is critical. The bypass capacitor for VDD should be placed as close as possible between the VDD and VSS pins. The bypass capacitor (CB) for the HB supply pin must be located as close as possible between the HB and HS pins. The etch connections must be short, wide, and direct. The use of a ground plane to minimize connection impedance is recommended. Refer to Section 7.13 "Grounding, Component Placement and Circuit Layout" for more information. The voltage on the bootstrap capacitor drops each time it delivers charge to turn on the MOSFET. The voltage drop depends on the gate charge required by the MOSFET. Most MOSFET specifications specify gate charge versus VGS voltage. Based on this information, and a recommended VHB of less than 0.1V, the minimum value of bootstrap capacitance is calculated as: 7.11 DC Motor Applications MIC4606 MOSFET drivers are widely used in DC motor applications. They address both stepper and brushed motors in full-bridge topologies. As shown in Figure 7-9 and Figure 7-10, the driver switches the MOSFETs at variable duty cycles that modulate the voltage to control motor speed. The full-bridge topology allows for bi-directional control. The MIC4606's 85V operating voltage offers ample operating voltage margin to protect against voltage spikes in the motor drive circuitry. It is good practice to have at least twice the HV voltage of the motor supply. The MIC4606's 85V operating voltage allows sufficient margin for 12V, 24V, and 40V motors. The MIC4606 is offered in a small 4 mm x 4 mm QFN 16-lead package for applications that are space constrained. The motor trend is to put the motor control circuit inside the motor casing, which requires small packaging because of the size of the motor. The MIC4606 offers low UVLO threshold and programmable gate drive, which allows for longer operation time in battery operated motors such as power hand tools. EQUATION 7-13: Q GATE C B ----------------V HB Where: QGATE Total gate charge at VHB VHB Voltage drop at the HB pin If the high-side MOSFET is not switched but held in an on state, the voltage in the bootstrap capacitor will drop due to leakage current that flows from the HB pin to ground. This current is specified in the Electrical Characteristics table. In this case, the value of CB is calculated as: EQUATION 7-14: IHBS tON C B -------------------------V HB Where: IHBS Maximum HB pin leakage current tON Maximum high-side FET on-time The larger value of CB from Equation 7-13 or 7-14 should be used. 2017-2019 Microchip Technology Inc. DS20005604C-page 27 MIC4606 12VDC 5VDC MIC2290 5V to 12V Boost 22F 16V MIC5283 LDO 12V to 3.3V 2.2F 10V VDD EN AHB MIC4606-1 FULL-BRIDGE AHO DRIVER 3.3VDC Q1 Q3 Q2 Q4 VDD I/O AHI I/O I/O ALI I/O I/O BHI I/O I/O BLI I/O C AHS ALO VSS BLO BHB BHO BHS VSS M 12VDC 22F 16V EN VDD AHB MIC4606-1 FULL-BRIDGE AHO DRIVER AHI BLI Q7 Q6 Q8 AHS ALI BHI Q5 ALO VSS BLO BHB BHO BHS FIGURE 7-9: DS20005604C-page 28 Stepper Motor Driver. 2017-2019 Microchip Technology Inc. MIC4606 MIC2290 5V TO 12V Boost 5VDC 12VDC HV MIC5235 LDO 5V to 3.3V VDD 3.3VDC AHB EN VCC MIC4606-1 N1 AHI C1 C2 N3 AHO C ALI AHS M BHI N2 BLI N4 ALO VSS BLO BHB BHO BHS FIGURE 7-10: 7.12 Full-Bridge DC Motor. Power Inverter Power inverters are used to supply AC loads from a DC operated battery system, mainly during power failure. The battery voltage can be 12 VDC, 24 VDC, or up to 36 VDC, depending on the power requirements. There two popular conversion methods, Type I and Type II, that convert the battery energy to AC line voltage (110 VAC or 230 VAC). BOOST TRANSFORMER 50Hz GENERATOR RECTIFIER REGULATOR INPUT AC TRANSFORMER BYPASS PATH OUTPUT AC POWER SWITCHES FROM INPUT AC TO DC/AC SUPPLY DURING POWER OUTAGE BATTERY FIGURE 7-11: Type I Inverter Topology. As shown in Figure 7-11, Type I is a dual-stage topology where line voltage is converted to DC through a transformer to charge the storage batteries. When a power failure is detected, the stored DC energy is converted to AC through another transformer to drive the AC loads connected to the inverter output. This method is simplest to design but tends to be bulky and expensive because it uses two transformers. Type II is a single-stage topology that uses only one transformer to charge the bank of batteries to store the energy. During a power outage, the same transformer 2017-2019 Microchip Technology Inc. is used to power the line voltage. The Type II topology switches at a higher frequency compared to the Type I topology to maintain a small transformer size. Both types use a full bridge topology to invert DC to AC. The MIC4606's operating voltage offers enough of a margin to address all of the available banks of batteries commonly used in inverter applications. The 85V operating voltage allows designers to increase the bank of batteries up to 72V, if desired. The MIC4606 can sink as much as 1A, which is sufficient to drive the MOSFET's gate capacitance while switching the MOSFET up to 50 kHz. This makes the MIC4606 an ideal solution for single phase inverter applications. 7.13 Grounding, Component Placement and Circuit Layout Nanosecond switching speeds and ampere peak currents in and around the MIC4606 driver require proper placement and trace routing of all components. Improper placement may cause degraded noise immunity, false switching, excessive ringing, or circuit latch-up. Figure 7-12 shows the critical current paths of the high and low-side driver when their outputs go high and turn on the external MOSFETs. It also helps demonstrate the need for a low impedance ground plane. Charge needed to turn-on the MOSFET gates comes from the decoupling capacitors CVDD and CB. Current in the low-side gate driver flows from CVDD through the internal driver, into the MOSFET gate, and out the DS20005604C-page 29 MIC4606 source. The return connection back to the decoupling capacitor is made through the ground plane. Any inductance or resistance in the ground return path causes a voltage spike or ringing to appear on the source of the MOSFET. This voltage works against the gate drive voltage and can either slow down or turn off the MOSFET during the period when it should be turned on. Current in the high-side driver is sourced from capacitor CB and flows into the xHB pin and out the xHO pin, into the gate of the high side MOSFET. The return path for the current is from the source of the MOSFET and back to capacitor CB. The high-side circuit return path usually does not have a low-impedance ground plane so the etch connections in this critical path should be short and wide to minimize parasitic inductance. As with the low-side circuit, impedance between the MOSFET source and the decoupling capacitor causes negative voltage feedback that fights the turn-on of the MOSFET. It is important to note that capacitor CB must be placed close to the xHB and xHS pins. This capacitor not only provides all the energy for turn-on but it must also keep xHB pin noise and ripple low for proper operation of the high-side drive circuitry. Figure 7-13 shows the critical current paths when the driver outputs go low and turn off the external MOSFETs. Short, low-impedance connections are important during turn-off for the same reasons given in the turn-on explanation. Current flowing through the internal diode replenishes charge in the bootstrap capacitor, CB. LOW-SIDE DRIVE TURN-OFF CURRENT PATH xLO VDD CVDD xHB VSS xLI CB xHO LEVEL SHIFT xHI xHS HIGH-SIDE DRIVE TURN-OFF CURRENT PATH FIGURE 7-13: Turn-Off Current Paths. LOW-SIDE DRIVE TURNON CURRENT PATH GND PLANE VDD xLO xHB VSS CVDD xLI xHO CB xHS LEVEL SHIFT GND PLANE xHI HIGH-SIDE DRIVE TURN-ON CURRENT PATH FIGURE 7-12: DS20005604C-page 30 Turn-On Current Paths. 2017-2019 Microchip Technology Inc. MIC4606 8.0 PACKAGING INFORMATION 8.1 Package Marking Information 16-lead QFN* XXXX -XXXX WNNN 16-lead TSSOP* XXXX -XXXX WNNN Legend: XX...X Y YY WW NNN e3 * Example 4606 -1YML 1215 Example 4606 -1YTS 6943 Product code or customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC(R) designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. , , Pin one index is identified by a dot, delta up, or delta down (triangle mark). Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. Package may or may not include the corporate logo. Underbar (_) and/or Overbar () symbol may not be to scale. 2017-2019 Microchip Technology Inc. DS20005604C-page 31 MIC4606 16-Lead QFN 4 mm x 4 mm Package Outline and Recommended Land Pattern Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging. DS20005604C-page 32 2017-2019 Microchip Technology Inc. MIC4606 16-Lead TSSOP Package Outline and Recommended Land Pattern Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging. 2017-2019 Microchip Technology Inc. DS20005604C-page 33 MIC4606 NOTES: DS20005604C-page 34 2017-2019 Microchip Technology Inc. MIC4606 APPENDIX A: REVISION HISTORY Revision C (June 2019) * Updated Section "Operating Ratings ". Revision B (January 2018) * Replaced Figure 7-5 with the correct image. Revision A (February 2017) * Converted Micrel document MIC4606 to Microchip data sheet template DS20005604A. * Minor text changes throughout. 2017-2019 Microchip Technology Inc. DS20005604C-page 35 MIC4606 NOTES: DS20005604C-page 36 2017-2019 Microchip Technology Inc. MIC4606 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office. PART NO. Device X -X Input Option Junction Temperature Range XX - Package XX a) MIC4606-1YML: b) MIC4606-1YML-T5: c) MIC4606-1YML-TR: d) MIC4606-1YTS-T5: e) MIC4606-1YTS-TR f) MIC4606-2YML-T5: g) MIC4606-2YML-TR: Media Type Device: MIC4606: Input Option: -1 -2 = = Dual inputs Single PWM input Junction Temperature Range: Y = -40C to +125C (RoHS Compliant) Package: ML TS = = 16-Lead QFN 16-Lead TSSOP Media Type T5 TR = = = <blank>= Examples: 85V Full-Bridge MOSFET Drivers with Adaptive Dead Time and Shoot-Through Protection 500/Reel 5000/Reel QFN (ML) Package 2500/Reel TSSOP (TS) Package 75/Tube QFN (-1YML) Package 2017-2019 Microchip Technology Inc. 85V Full-Bridge MOSFET Driver with Adaptive Dead Time and ShootThrough Protection, Dual Inputs, -40C to +125C Junction Temperature Range, 16-Pin QFN, 75/ Tube 85V Full-Bridge MOSFET Driver with Adaptive Dead Time and ShootThrough Protection, Dual Inputs, -40C to +125C Junction Temperature Range, 16-Pin QFN, 500/ Reel 85V Full-Bridge MOSFET Drivers with Adaptive Dead Time and ShootThrough Protection, Dual Inputs, -40C to +125C Junction Temperature Range, 16-Pin TSSOP, 5000/Reel 85V Full-Bridge MOSFET Driver with Adaptive Dead Time and ShootThrough Protection, Dual Inputs, -40C to +125C Junction Temperature Range, 16-Pin TSSOP, 500/Reel 85V Full-Bridge MOSFET Driver with Adaptive Dead Time and ShootThrough Protection, Dual Inputs, -40C to +125C Junction Temperature Range, 16-Pin TSSOP, 2500/Reel 85V Full-Bridge MOSFET Driver with Adaptive Dead Time and ShootThrough Protection, Dual Inputs, -40C to +125C Junction Temperature Range, 16-Pin QFN, 500/ Reel 85V Full-Bridge MOSFET Driver with Adaptive Dead Time and ShootThrough Protection, Single PWM Input, -40C to +125C Junction Temperature Range, 16-Pin QFN, 500/Reel. DS20005604C-page 37 MIC4606 NOTES: DS20005604C-page 38 2017-2019 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: * Microchip products meet the specification contained in their particular Microchip Data Sheet. * Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. * There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. * Microchip is willing to work with the customer who is concerned about the integrity of their code. * Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, Adaptec, AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT, chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PackeTime, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon, TempTrackr, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, FlashTec, Hyper Speed Control, HyperLight Load, IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub, TimePictra, TimeProvider, Vite, WinPath, and ZL are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BlueSky, BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, INICnet, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, memBrain, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. The Adaptec logo, Frequency on Demand, Silicon Storage Technology, and Symmcom are registered trademarks of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. (c) 2019, Microchip Technology Incorporated, All Rights Reserved. For information regarding Microchip's Quality Management Systems, please visit www.microchip.com/quality. 2017-2019 Microchip Technology Inc. ISBN: 978-1-5224-4595-1 DS20005604C-page 39 Worldwide Sales and Service AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://www.microchip.com/ support Web Address: www.microchip.com Australia - Sydney Tel: 61-2-9868-6733 India - Bangalore Tel: 91-80-3090-4444 China - Beijing Tel: 86-10-8569-7000 India - New Delhi Tel: 91-11-4160-8631 Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 China - Chengdu Tel: 86-28-8665-5511 India - Pune Tel: 91-20-4121-0141 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 China - Chongqing Tel: 86-23-8980-9588 Japan - Osaka Tel: 81-6-6152-7160 Finland - Espoo Tel: 358-9-4520-820 China - Dongguan Tel: 86-769-8702-9880 Japan - Tokyo Tel: 81-3-6880- 3770 China - Guangzhou Tel: 86-20-8755-8029 Korea - Daegu Tel: 82-53-744-4301 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 China - Hangzhou Tel: 86-571-8792-8115 Korea - Seoul Tel: 82-2-554-7200 China - Hong Kong SAR Tel: 852-2943-5100 Malaysia - Kuala Lumpur Tel: 60-3-7651-7906 China - Nanjing Tel: 86-25-8473-2460 Malaysia - Penang Tel: 60-4-227-8870 China - Qingdao Tel: 86-532-8502-7355 Philippines - Manila Tel: 63-2-634-9065 China - Shanghai Tel: 86-21-3326-8000 Singapore Tel: 65-6334-8870 China - Shenyang Tel: 86-24-2334-2829 Taiwan - Hsin Chu Tel: 886-3-577-8366 China - Shenzhen Tel: 86-755-8864-2200 Taiwan - Kaohsiung Tel: 886-7-213-7830 China - Suzhou Tel: 86-186-6233-1526 Taiwan - Taipei Tel: 886-2-2508-8600 China - Wuhan Tel: 86-27-5980-5300 Thailand - Bangkok Tel: 66-2-694-1351 China - Xian Tel: 86-29-8833-7252 Vietnam - Ho Chi Minh Tel: 84-28-5448-2100 Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Austin, TX Tel: 512-257-3370 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Novi, MI Tel: 248-848-4000 Houston, TX Tel: 281-894-5983 Indianapolis Noblesville, IN Tel: 317-773-8323 Fax: 317-773-5453 Tel: 317-536-2380 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Tel: 951-273-7800 Raleigh, NC Tel: 919-844-7510 New York, NY Tel: 631-435-6000 San Jose, CA Tel: 408-735-9110 Tel: 408-436-4270 Canada - Toronto Tel: 905-695-1980 Fax: 905-695-2078 DS20005604C-page 40 China - Xiamen Tel: 86-592-2388138 China - Zhuhai Tel: 86-756-3210040 Germany - Garching Tel: 49-8931-9700 Germany - Haan Tel: 49-2129-3766400 Germany - Heilbronn Tel: 49-7131-72400 Germany - Karlsruhe Tel: 49-721-625370 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Germany - Rosenheim Tel: 49-8031-354-560 Israel - Ra'anana Tel: 972-9-744-7705 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Italy - Padova Tel: 39-049-7625286 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Norway - Trondheim Tel: 47-7288-4388 Poland - Warsaw Tel: 48-22-3325737 Romania - Bucharest Tel: 40-21-407-87-50 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 Sweden - Gothenberg Tel: 46-31-704-60-40 Sweden - Stockholm Tel: 46-8-5090-4654 UK - Wokingham Tel: 44-118-921-5800 Fax: 44-118-921-5820 2017-2019 Microchip Technology Inc. 05/14/19