1
TN2435
08/02/99
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For complete liability information covering this and
other Supertex products, refer to the Supertex 1998 Databook.
TN2435
Features
High input impedance
Low input capacitance
Fast switching speeds
Free from secondary breakdown
Low input and output leakage
Complementary N- and P-channel devices
Low Threshold DMOS Technology
These low threshold enhancement-mode (normally-off) transis-
tors utilize a vertical DMOS structure and Supertex's well-proven
silicon-gate manufacturing process. This combination produces
devices with the power handling capabilities of bipolar transis-
tors and with the high input impedance and positive temperature
coefficient inherent in MOS devices. Characteristic of all MOS
structures, these devices are free from thermal runaway and
thermally induced secondary breakdown.
Supertex vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where very low threshold
voltage, high breakdown voltage, high input impedance, low input
capacitance, and fast switching speeds are desired.
Package Options
N-Channel Enhancement-Mode
Vertical DMOS FETs
Applications
Logic level interfaces
Solid state relays
Power Management
Analog switches
Ringers
Telecom switches
Note: See Package Outline section for dimensions.
TO-243AA
(SOT-89)
G D
S
D
*Same as SOT-89. Product supplied on 2000 piece carrier tape reels.
** Die in wafer form.
Order Number / Package
BVDSS /R
DS(ON) ID(ON)
BVDGS (max) (min) TO-243AA* Die**
350V 6.01.0A TN2435N8 TN2435NW
Ordering Information
Absolute Maximum Ratings
Drain-to-Source Voltage BVDSS
Drain-to-Gate Voltage BVDGS
Gate-to-Source Voltage ± 20V
Operating and Storage Temperature -55°C to +150°C
Soldering Temperature* 300°C
* Distance of 1.6 mm from case for 10 seconds.
Low Threshold
2
TN2435
Thermal Characteristics
90%
10%
90% 90%
10%
10%
PULSE
GENERATOR
V
DD
R
L
OUTPUT
D.U.T.
t
(ON)
t
d(ON)
t
(OFF)
t
d(OFF)
t
F
t
r
INPUT
INPUT
OUTPUT
10V
V
DD
R
gen
0V
0V
Switching Waveforms and Test Circuit
Symbol Parameter Min Typ Max Unit Conditions
BVDSS Drain-to-Source Breakdown Voltage 350 V VGS = 0V, ID = 250µA
VGS(th) Gate Threshold Voltage 0.8 V VGS = VDS, ID= 1.0mA
VGS(th) Change in VGS(th) with Temperature -5.5 mV/°CV
GS = VDS, ID= 1.0mA
IGSS Gate Body Leakage 100 nA VGS = ± 20V, VDS = 0V
IDSS Zero Gate Voltage Drain Current 10 µAV
GS = 0V, VDS = Max Rating
1.0 mA VGS = 0V, VDS = 0.8 Max Rating
TA = 125°C
ID(ON) ON-State Drain Current 0.5 AVGS = 4.5V, VDS = 25V
1.0 VGS = 10V, VDS = 25V
RDS(ON) Static Drain-to Source ON-State 15.0 VGS = 3.0V, ID = 150mA
Resistance 10.0 VGS = 4.5V, ID = 250mA
6.0 VGS = 10V, ID = 750mA
RDS(ON) Change in RDS(ON) with Temperature 1.7 %/°CV
GS = 10V, ID = 750mA
GFS Forward Transconductance 125 m VDS = 25V, ID = 350mA
CISS Input Capacitance 125 200 VGS = 0V, VDS = 25V
COSS Common Source Output Capacitance 25 70 pF f = 1.0MHz
CRSS Reverse Transfer Capacitance 8 25
td(ON) Turn-ON Delay Time 5 20
trRise Time 10 20 ns
td(OFF) Turn-OFF Delay Time 28 40
tfFall Time 10 30
VSD Diode Forward Voltage Drop 1.5 V VGS = 0V, ISD = 750mA
trr Reverse Recovery Time 300 ns VGS = 0V, ISD = 750mA
Notes:
1.All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2.All A.C. parameters sample tested.
Electrical Characteristics (@ 25°C unless otherwise specified)
VDD = 25V,
ID = 750mA
RGEN = 25
Package ID (continuous)* ID (pulsed) Power Dissipation
θ
jc
θ
ja IDR*I
DRM
@ TA = 25°C°C/W °C/W
TO-243AA 365mA 1.8A 1.6W15 78365mA 1.8A
* ID (continuous) is limited by max rated Tj.
Mounted on FR5 board, 25mm x 25mm x 1.57mm. Significant PD increase possible on ceramic substrate.
3
TN2435
Typical Performance Curves
0.0 0.5 1.0 1.5 2.0
0.0
0.2
0.4
0.6
0.8
1.0 VDS=15V
TA=125°C
TA=25°C
TA=-55°C
0 25 50 75 100 125 150
0.0
0.5
1.0
1.5
2.0
ID (Amperes)
VDS (Volts)
VGS = 10V
Output Characteristics
6V
5V
4V
3V
2.5V
Saturation Characteristics
ID (Amperes)
VDS (Volts)
VGS = 10V
8V
6V
4V
3V
2.5V
GFS (siemens)
ID (Amperes)
Transconductance vs. Drain Current Power Dissipation vs. Case Temperature
PD (Watts)
TC (°C)
Maximum Rated Safe Operating Area
ID (amperes)
VDS (Volts)
Thermal Response Characteristics
Thermal Resistance (normalized)
tp (seconds)
8V 5V
1 100010010
10
1.0
0.1
0.01
0.001
TO-243AA (DC)
TO-243AA (pulsed)
1.0
0.8
0.6
0.4
0.2
0.001 100.01 0.1 1.0
TO-243AA
PD = 1.6W
TC = 25°C
0
0 1020304050
0
1.0
2.0
3.0
2.5
1.5
0.5
0246810
0.0
0.4
0.8
1.2
1.6
2.0
TO-243AA
TA=25°C
4
TN2435
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 FAX: (408) 222-4895
www.supertex.com
08/02/99
Typical Performance Curves
RDS(ON) (ohms)
ID (Amperes)
On Resistance vs. Drain Current
VGS(TH) and RDS(ON) w/ Temperature
VGS(th) (normalized)
TJ (
°
C)
RDS(ON) (normalized)
Transfer Characteristics
ID (Amperes)
VGS (Volts)
-50 0 50 100 150
0.8
0.9
1.0
1.1
1.2
BV @ 250µA
0.0 0.5 1.0 1.5 2.0 2.5 3.0
0
4
8
12
16
20
0246810
0.0
0.4
0.8
1.2
1.6
2.0
TA = -55°C
TA = 150°C
TA = 25°C
VDS = 25V
0.4
0.6
0.8
1.0
1.2
1.4
-50 0 50 100 150
0.4
0.8
1.2
1.6
2.0
2.4
RDS(ON) @ 10V, 0.75A
VGS(th) @ 1mA
0 1020304050
0
75
150
225
300
CRSS
COSS
CISS
f = 1MHz
0.0 1.0 2.0 3.0 4.0 5.0
0
2
4
6
8
10
VDS=10V
VDS=40V
ID = 365mA
BVDSS (Normalized)
TJ (
°
C)
BVDSS V ariation with Temperature
Capacitance vs. Drain Source Voltage
C (picofarads)
VDS (Volts)
525pF
150pF
Gate Drive Dynamic Characteristics
Q (nanocoulombs)
G
VGS (volts)
VGS =
4.5V
VGS = 10V
VGS = 3V
Die Specifications
Dimensions Bonding Pads3Recommended Assembly Material
Die Backside2
Geometry Length1Width Thickness Metal Material Size Wire4Wire Size4Preform5
All dimensions in mils.
VF24
S
G
VF24
Backside: Drain
Notes:
1. Maximum values
2. Standard Au back is alloyed for optimum eutectic die attach. Ag backing is optional.
3. Al-Cu-Si is used for higher operating current densities. Bond pad size represents smaller gate pad.
4. Bond wire size and material depends on AuTCB, TSB or Al USB.
5. Soft solder or organic die attach methods may be used with appropriate backmetal option.
VF24 55 55 11 ± 1.5 Au Al-Si 5 x 7 Au 1.5 Epoxy
Device
Number BVDSS
min (V) RDS(ON)
max ()CISS
typ (pf) VGS(th)
max (V) SOT-23
K1 TO-39
N2 TO-92
N3 Quad1SOT-89
N8 Die
ND
TN2501 18 2.5 70 1.0 VF25
TN0702 20 1.3 130 1.0
TN0604 40 0.75 140 1.6 6
TN2504 40 1.0 70 1.6 VF25
TN0104 40 1.8 50 1.6 6VF01
TN0606 60 1.5 100 2.0 VF06
TN0606 60 1.5 100 2.0
TN2106 60 2.5 45 2.0 VF21
2N6660 60 3.0 50 2.0 2
TN0106 60 3.0 50 2.0
VN0606 60 3.0 50 2.0 3
VN0808 80 4.0 50 2.0 3
2N6661 90 4.0 50 2.0 2
TN0610 100 1.5 100 2.0 VF06
TN2510 100 1.5 70 1.6 VF25
TN0110 100 3.0 50 2.0 VF01
VN1206 120 6.0 125 2.0 3
TN0620 200 6.0 110 1.6
TN2524 240 6.0 65 2.0 VF25
VN2406 240 6.0 125 2.0 3
TN2124 240 10.0 38 1.8
VN2410 240 10.0 125 2.0 3
TN2425 250 3.5 105 0.8 VF24
TN5325 250 7.0 70 2.0
TN2130 300 25.0 35 2.4 VF21
TN5335 350 15.0 65 2.0
VN3515 350 15.0 110 1.8 3
TN2435 350 6.0 20040.85 VF24
TN2535 350 10.0 125 2.0 VF25
TN2640 400 5.0 180 2.0 2VF26
TN2540 400 12.0 95 2.0 VF25
VN4012 400 12.0 110 1.8 3
CH06F
http://www.supertex.com/Products/Selector_Guides/CH06A_Table/ch06a_table.htm (1 of 2) [7/20/2001 12:41:17 PM]
Add package suffix for complete part number, e.g., TN2640N3 is TN2640 in a TO-92 package.
Notes:
1. Package options are defined on individual data sheets.
2. No package suffix required.
3. Use package suffix "L" instead of N3.
4. Rated at Maximum Value.
5. Rated at Minimum Value.
6. Not recommended for new designs.
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CH06F
http://www.supertex.com/Products/Selector_Guides/CH06A_Table/ch06a_table.htm (2 of 2) [7/20/2001 12:41:17 PM]