VBUS03B1-SD0HG4-08 - VISHAY

VBUS03B1-SD0

www.vishay.com Vishay Semiconductors

Rev. 1.6, 03-Jan-2019 1Document Number: 85908

For technical questions, contact: ESDprotection@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Ultra Low Capacitance Bidirectional Symmetrical (BiSy) Single Line

ESD Protection Diode in Silicon Package

MARKING (example only)

1 = year code

Open circle = month code and pin 1

XY = type code

DESIGN SUPPORT TOOLS

FEATURES

• Ultra compact CLP0603 package

• Low package height < 0.3 mm

• 1-line ESD protection

• AEC-Q101 qualified available

• Working range ± 3.3 V

• Low leakage current < 0.05 μA

• Ultra low load capacitance CD = 0.29 pF typ.

• ESD immunity acc. IEC 61000-4-2

± 16 kV contact discharge

± 16 kV air discharge

• Lead plating: Au (e4)

• Lead material: Ni

• Backside coating

• Material categorization: for definitions of compliance

please see www.vishay.com/doc?99912



0.3

0.27

0.6

22544

22543

22454

click logo to get started

Available

Models

ORDERING INFORMATION

PART NUMBER

(EXAMPLE)

ENVIRONMENTAL AND QUALITY CODE PACKAGING CODE

ORDERING CODE

(EXAMPLE)

AEC-Q101

QUALIFIED

RoHS-COMPLIANT +

LEAD (Pb)-FREE TERMINATIONS GOLD

PLATED

15K PER 7" REEL

(8 mm TAPE)

15K/BOX = MOQ

GREEN

VBUS03B1-SD0 - G 4 -08 VBUS03B1-SD0-G4-08

VBUS03B1-SD0 H G 4 -08 VBUS03B1-SD0HG4-08

PACKAGE DATA

DEVICE NAME PACKAGE NAME TYPE CODE WEIGHT SOLDERING CONDITIONS

VBUS03B1-SD0 CLP0603-2L 3B 0.12 mg Peak temperature max. 260 °C

Reflow soldering according JEDEC® STD-020

ABSOLUTE MAXIMUM RATINGS

PARAMETER TEST CONDITIONS SYMBOL VALUE UNIT

Peak pulse current acc. IEC 61000-4-5, 8/20 μs/single shot IPPM 2.5 A

Peak pulse power Pin 1 to pin 2

acc. IEC 61000-4-5; tp = 8/20 μs; single shot PPP 45 W

ESD immunity Contact discharge acc. IEC 61000-4-2; 10 pulses VESD

± 16 kV

Air discharge acc. IEC 61000-4-2; 10 pulses ± 16

Operating temperature Junction temperature TJ-55 to +150 °C

Storage temperature Tstg -55 to +150 °C

VBUS03B1-SD0

www.vishay.com Vishay Semiconductors

Rev. 1.6, 03-Jan-2019 2Document Number: 85908

For technical questions, contact: ESDprotection@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

ESD PROTECTION FOR HIGH-SPEED SIGNAL OR DATA LINES

The VBUS03B1-SD0 is a Bidirectional and Symmetrical (BiSy) ESD protection device which clamps positive and negative

overvoltage transients to ground. Connected between the signal or data line and the ground the VBUS03B1-SD0 offers a high

isolation (low leakage current, low capacitance) within the specified working range. Due to the short leads and small package

size of the tiny CLP0603 package the line inductance is very low, so that fast transients like and ESD strike can be clamped with

minimal over- or undershoots. Due to the very low capacitance the VBUS03B1-SD0 can be used for high speed data ports like

HDMI, USB 3.0 or Thunderbolt.

Note

(1) Defined by design. Such a low leakage current is too low for a 100 % final test verification

ELECTRICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)

PARAMETER TEST CONDITIONS/REMARKS SYMBOL MIN. TYP. MAX. UNIT

Protection paths Number of lines which can be protected Nchannel - - 1 lines

Reverse stand-off voltage Max. reverse working voltage VRWM --3.3V

Reverse voltage at IR = 0.05 μA VR3.3 - - V

Reverse current at VRWM = 3.3 V IR- < 0.0009 (1) 0.05 μA

Reverse breakdown voltage at IR = 1 mA VBR 6.0 8.5 10 V

Reverse clamping voltage at IPP = 1 A VC-1214V

at IPP = IPPM = 2.5 A VC-1518V

Capacitance at VR = 0 V; f = 1 MHz CD- 0.29 0.4 pF

at VR = 3.3 V; f = 1 MHz CD-0.29-pF

Clamping voltage

Transmission Line Pulse (TLP); tp = 100 ns

ITLP = 8 A VC-TLP

-20-

Transmission Line Pulse (TLP); tp = 100 ns

ITLP = 16 A -29-

Dynamic resistance Transmission Line Pulse (TLP); tp = 100 ns RDYN -1.14- 

VBUS03B1-SD0

www.vishay.com Vishay Semiconductors

Rev. 1.6, 03-Jan-2019 3Document Number: 85908

For technical questions, contact: ESDprotection@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

TYPICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)

Fig. 1 - ESD Discharge Current Wave Form

acc. IEC 61000-4-2 (330 /150 pF)

Fig. 2 - 8/20 μs Peak Pulse Current Wave Form

acc. IEC 61000-4-5

Fig. 3 - Typical Reverse Voltage VR vs. Reverse Current IR

Fig. 4 - Typical Peak Clamping Voltage VC vs.

Peak Pulse Current IPP

Fig. 5 - Typical Peak Clamping Voltage VC vs.

Peak Pulse Current IPP

Fig. 6 - Typical Insertion Loss (IL) vs. Frequency

100

1000

10000

100

120

-10 0 10 20 30 40 50 60 70 80 90 100

Axis Title

1st line

2nd line

IESD (%)

t (ns)

2nd line

Rise time = 0.7 ns to 1 ns

20557

100

1000

10000

100

010203040

Axis Title

1st line

2nd line

IPPM (%)

t (µs)

2nd line

20 µs to 50 %

8 µs to 100 %

20548

1E-09 1E-08 1E-07 1E-06 1E-05 1E-04 1E-03

VR in (V)

22749

IR in A

01234

Measured acc. IEC 61000-4-5

(8/20 µs - wave form)

IPP in A

VC in V

22750

0 5 10 15 20 25

Transmission Line Pulse (TLP)

tp = 100 ns

(Average between 55 ns and 95 ns)

VC = 1.14 V/A x Ipp + 10 V

IPP in A

VC in V

22755

22939

2nd line

1 10 100 1000 10000

f (MHz)

2nd line

Insertion Loss

IL = 20 x log10 (/S11/) [dB]

VBUS03B1-SD0

www.vishay.com Vishay Semiconductors

Rev. 1.6, 03-Jan-2019 4Document Number: 85908

For technical questions, contact: ESDprotection@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

PACKAGE DIMENSIONS in millimeters (mils): CLP0603-2L



Footprint and soldering recommendation:

please see Application Note: www.vishay.com/doc?85917

Package = chip dimensions in mm [mils]

Millimeters

min. nom. max. min. nom. max.

0.25

0.01 0.01

0.24

0.22

0.27

0.28

0.27

0.25

0.30

0.60

0.30

0.02 0.39 0.39

0.28

0.33

mils

9.84

9.45

8.66

10.62

11.02

10.63

9.84

11.81

23.62

11.81

0.79

11.02

12.99

0.57 0.63 22.44 24.80

0.25 9.84

0.12 0.15 0.18 4.72 5.91 7.09

0.40 15.75

Created - Date: 22. Nov. 2010

Document no.: S8-V-3906.04-023 (4)

2 terminal leadless package (CLP)

Rev.8 - Date: 11. Nov. 2016

22941

Le1

VBUS03B1-SD0

www.vishay.com Vishay Semiconductors

Rev. 1.6, 03-Jan-2019 5Document Number: 85908

For technical questions, contact: ESDprotection@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

CARRIER TAPE in millimeters: CLP0603-2L

ORIENTATION IN CARRIER CLP0603-2L

A-A Section

A4 ± 0.1

2 ± 0.05

1.75

± 0.1

+ 0.3

- 0.1

B-B Section

0.37 ± 0.03

0.67

±0.03

5°

max. 2°

0.33 ± 0.03

0.2 ± 0.02

Ø 0.2 ± 0.05

Ø 1.55 ± 0.05

3.5

± 0.05

Cummulative tolerances of 10 sprocket holes is +/-0.2mm

22591

Document no. S8-V-3906.04-0025 (4)

Created - Date: 22. Nov. 2010

CLP0603

Top view

Unreeling direction

Pin 1

DETAIL A

50:1

22607

Orientation in Carrier Tape (CLP0603)

S8-V-3906.04-026 (4)

22.10.2010

Legal Disclaimer Notice

www.vishay.com Vishay

Revision: 01-Jan-2019 1Document Number: 91000

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