IRU3038
1
Rev. 2.0
09/12/02 www.irf.com
TYPICAL APPLICATION
DESCRIPTION
The IRU3038 controller IC is designed to provide a low
cost synchronous Buck regulator for voltage tracking
applications such DDR memory and general purpose
on-board DC to DC converter. Modern micro processors
combined with DDR memory, need high-speed bandwidth
data bus which requires a particular bus termination volt-
age. This voltage will be tightly regulated to track the
half of chipset voltage for best performance. The IRU3038
together with dual N-channel MOSFETs such as IRF7313,
provide a low cost solution for such applications. This
device features a programmable frequency set from
200KHz to 400KHz, under-voltage lockout for both Vcc
and Vc supplies, an external programmable soft-start
function as well as output under-voltage detection that
latches off the device when an output short is detected.
Synchronous Controller in 14-Pin Package
Operating with single 5V or 12V supply voltage
200KHz to 400KHz operation set by an external
resistor
Soft-Start Function
Fixed Frequency Voltage Mode
500mA Peak Output Drive Capability
Uncommitted Error Amplifier available for DDR
voltage tracking application
1.25V Reference Voltage
Protects the output when control FET is shorted
PACKAGE ORDER INFORMATION
FEATURES
SYNCHRONOUS PWM CONTROLLER
FOR TERMINATION POWER SUPPLY APPLICATIONS
TA (°C) DEVICE PACKAGE
0 To 70 IRU3038CF 14-Pin Plastic TSSOP (F)
0 To 70 IRU3038CS 14-Pin Plastic SOIC NB (S)
PRELIMINARY DATA SHEET
Data Sheet No. PD94250
Figure 1 - Typical application of IRU3038 when Vtt tracks the VDDQ.
APPLICATIONS
DDR memory source sink Vtt application
Low cost on-board DC to DC such as
5V to 3.3V, 2.5V or 1.8V
Graphic Card
Hard Disk Drive
IRU3038
U1
Vcc Vc
HDrv
LDrv
Fb
Gnd
Comp
SS
C1
0.1uF C2
1uF
C5
0.1uF
C7
2200pF
R3
33K
Q1
1/2 of IRF7313
Q2
1/2 of IRF7313
L2
D03316P-103, 10uH, 3.9A
L1
1uH
C3
10TPB100M,
100uF, 55m
V
C4
47uF
Vtt
1.25V @ 3A
C6
2x 6TPB150M,
150uF, 55m
V
12V
PGnd
Rt
V
P
V
REF
R1
1K
R2
1K
DDR
Memory
V
DDQ
(2.5V)
5V
D1
BAT54
or 1N4148
2Rev. 2.0
09/12/02
IRU3038
www.irf.com
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over Vcc=5V, Vc=12V and TA=0 to 70°C. Typical values refer
to TA=25°C. Low duty cycle pulse testing is used which keeps junction and case temperatures equal to the ambient
temperature.
ABSOLUTE MAXIMUM RATINGS
Vcc Supply Voltage .................................................. 25V
Vc Supply Voltage ..................................................... 30V (not rated for inductive load)
Storage Temperature Range ...................................... -65°C To 150°C
Operating Junction Temperature Range ..................... 0°C To 125°C
PACKAGE INFORMATION
14-PIN PLASTIC TSSOP (F) 14-PIN PLASTIC SOIC (S)
PARAMETER SYM TEST CONDITION MIN TYP MAX UNITS
Reference Voltage
VREF Voltage
Fb Voltage Line Regulation
UVLO
UVLO Threshold - Vcc
UVLO Hysteresis - Vcc
UVLO Threshold - Vc
UVLO Hysteresis - Vc
UVLO Threshold - Fb
UVLO Hysteresis - Fb
Supply Current
Vcc Dynamic Supply Current
Vc Dynamic Supply Current
Vcc Static Supply Current
Vc Static Supply Current
Soft-Start Section
Charge Current
5<Vcc<12
Supply Ramping Up
Supply Ramping Up
Fb Ramping Down
Freq=200KHz, CL=1500pF
Freq=200KHz, CL=1500pF
SS=0V
SS=0V
SS=0V
1.225
4
3.1
0.4
2
2
1
0.5
-10
1.250
0.2
4.2
0.25
3.3
0.2
0.6
0.1
5
7
3.5
1
-20
1.275
0.35
4.4
3.5
0.8
8
10
6
4.5
-30
V
%
V
V
V
V
V
V
mA
mA
mA
mA
mA
uJA=888C/W
uJA=1008C/W
VFB
LREG
UVLO Vcc
UVLO Vc
UVLO Fb
Dyn Icc
Dyn Ic
ICCQ
ICQ
SSIB
Fb
Vcc
LDrv
Gnd PGnd
HDrv
Vc
Rt
7
6
5
4
8
9
10
11
3
2
1
12 Comp
13 SS
14 NC
V
P
V
REF
NC
Vcc
NC
LDrv
Gnd
Rt
Vc
HDrv
PGnd
7
6
5
4
8
9
10
11
V
REF
312 Comp
V
P
213 SS
Fb 114 NC
IRU3038
3
Rev. 2.0
09/12/02 www.irf.com
PARAMETER SYM TEST CONDITION MIN TYP MAX UNITS
PIN DESCRIPTIONS
This pin is connected directly to the output of the switching regulator via resistor divider to
provide feedback to the Error amplifier.
Non-inverting input of error amplifier.
Reference Voltage.
This pin provides biasing for the internal blocks of the IC as well as power for the low side
driver. A minimum of 1mF, high frequency capacitor must be connected from this pin to
ground to provide peak drive current capability.
No Connection.
Output driver for the synchronous power MOSFET.
Analog ground for internal reference and control circuitry. Connect to PGnd with a short
trace.
This pin serves as the separate ground for MOSFET's drivers and should be connected to
system's ground plane. A high frequency capacitor (0.1 to 1mF) must be connected from
Vcc and Vc pins to this pin for noise free operation.
Output driver for the high side power MOSFET. Connect a diode, such as BAT54 or 1N4148,
from this pin to ground for the application when the inductor current goes negative (Source/
Sink), soft-start at no load and for the fast load transient from full load to no load.
This pin is connected to a voltage that must be at least 4V higher than the bus voltage of
the switcher (assuming 5V threshold MOSFET) and powers the high side output driver. A
minimum of 1mF, high frequency capacitor must be connected from this pin to ground to
provide peak drive current capability.
The switching frequency can be Programmed between 200KHz and 400KHz by connect-
ing a resistor between Rt and Gnd. Floating the pin set the switching frequency to 200KHz
and grounding the pin set the switching frequency to 400KHz.
Compensation pin of the error amplifier. An external resistor and capacitor network is
typically connected from this pin to ground to provide loop compensation.
This pin provides soft-start for the switching regulator. An internal current source charges
an external capacitor that is connected from this pin to ground which ramps up the output
of the switching regulator, preventing it from overshooting as well as limiting the input
current. The converter can be shutdown by pulling this pin below 0.5V.
Error Amp
Fb Voltage Input Bias Current
Fb Voltage Input Bias Current
VP Voltage Range
Transconductance
Oscillator
Frequency
Ramp Amplitude
Output Drivers
Rise Time
Fall Time
Dead Band Time
Max Duty Cycle
Min Duty Cycle
SS=3V, Fb=1V
SS=0V, Fb=1V
Rt=Open
Rt=Gnd
CLOAD=1500pF
CLOAD=1500pF
Fb=1V, Freq=200KHz
Fb=1.5V
0.8
450
180
360
1.225
50
85
0
-0.1
-64
600
200
400
1.25
50
50
150
90
0
mA
mA
V
mmho
KHz
V
ns
ns
ns
%
%
PIN# PIN SYMBOL PIN DESCRIPTION
1
2
3
4
5
14
6
7
8
9
10
11
12
13
Fb
VP
VREF
Vcc
NC
LDrv
Gnd
PGnd
HDrv
Vc
Rt
Comp
SS
IFB1
IFB2
gm
Freq
VRAMP
Tr
Tf
TDB
TON
TOFF
1.5
750
220
440
1.275
100
100
250
95
4Rev. 2.0
09/12/02
IRU3038
www.irf.com
BLOCK DIAGRAM
Figure 2 - Simplified block diagram of the IRU3038.
THEORY OF OPERATION
Introduction
The IRU3038 is a fixed frequency, voltage mode syn-
chronous controller and consists of a precision refer-
ence voltage, an uncommitted error amplifier, an internal
oscillator, a PWM comparator, 0.5A peak gate driver,
soft-start and shutdown circuits (see Block Diagram).
The output voltage of the synchronous converter is set
and controlled by the output of the error amplifier; this is
the amplified error signal from the sensed output voltage
and the voltage on non-inverting input of error amplifier(VP).
This voltage is compared to a fixed frequency linear
sawtooth ramp and generates fixed frequency pulses of
variable duty-cycle, which drives the two N-channel ex-
ternal MOSFETs.
The timing of the IC is provided through an internal oscil-
lator circuit which uses on-chip capacitor. The oscilla-
tion frequency is programmable between 200 to 400KHz
by using an external resistor. Figure 12 shows switch-
ing frequency vs. external resistor (Rt).
Soft-Start
The IRU3038 has a programmable soft-start to control
the output voltage rise and limit the current surge at the
start-up. To ensure correct start-up, the soft-start se-
quence initiates when the Vc and Vcc rise above their
threshold (3.3V and 4.2V respectively) and generates
the Power On Reset (POR) signal. Soft-start function
operates by sourcing an internal current to charge an
external capacitor to about 3V. Initially, the soft-start func-
tion clamps the E/A’s output of the PWM converter. As
the charging voltage of the external capacitor ramps up,
the PWM signals increase from zero to the point the
feedback loop takes control.
Short-Circuit Protection
The outputs are protected against the short-circuit. The
IRU3038 protects the circuit for shorted output by sens-
ing the output voltage (through the external resistor di-
vider). The IRU3038 shuts down the PWM signals, when
the output voltage drops below 0.6V.
The IRU3038 also protects the output from over-voltaging
when the control FET is shorted. This is done by turning
on the sync FET with the maximum duty cycle.
Under-Voltage Lockout
The under-voltage lockout circuit assures that the
MOSFET driver outputs remain in the off state whenever
the supply voltage drops below set parameters. Lockout
occurs if Vc and Vcc fall below 3.3V and 4.2V respec-
tively. Normal operation resumes once Vc and Vcc rise
above the set values.
20uA
64uA Max
POR
Oscillator
Error Amp
Ct
Error Comp
Reset Dom
POR
0.6V FbLo Comp
Vc
HDrv
Vcc
LDrv
PGnd
Vcc
4V
Vc
3.5V
0.2V
0.25V
Bias
Generator 3V
1.25V
POR
SS
Fb
Comp
25K
25K
1.25V
3V
R
S
Q
V
P
V
REF
Rt
Gnd
Rt
3
13
2
1
12
11
10
9
4
6
8
7
IRU3038
5
Rev. 2.0
09/12/02 www.irf.com
APPLICATION INFORMATION
Design Example:
The following example is a typical application for IRU3038,
the schematic is Figure 11 on page 12.
Output Voltage Programming
Output voltage is programmed by reference voltage and
external voltage divider. The Fb pin is the inverting input
of the error amplifier, which is referenced to the voltage
on non-inverting pin of error amplifier. For this applica-
tion, this pin (VP) is connected to reference voltage (VREF).
The output voltage is defined by using the following equa-
tion:
When an external resistor divider is connected to the
output as shown in Figure 3.
Figure 3 - Typical application of the IRU3038 for
programming the output voltage.
Equation (1) can be rewritten as:
Choose R5 = 1KV
This will result to R6 = 1KV
If the high value feedback resistors are used, the input
bias current of the Fb pin could cause a slight increase
in output voltage. The output voltage set point can be
more accurate by using precision resistor.
Soft-Start Programming
The soft-start timing can be programmed by selecting
the soft-start capacitance value. The start-up time of the
converter can be calculated by using:
Where CSS is the soft-start capacitor (mF)
For a start-up time of 7.5ms, the soft-start capacitor will
be 0.1mF. Choose a ceramic capacitor at 0.1mF.
Shutdown
The converter can be shutdown by pulling the soft-start
pin below 0.5V. The control MOSFET turns off and the
synchronous MOSFET turns on during shutdown.
Boost Supply Vc
To drive the high-side switch it is necessary to supply a
gate voltage at least 4V greater than the bus voltage.
This is achieved by using a charge pump configuration
as shown in Figure 11. The capacitor is charged up to
approximately twice the bus voltage. A capacitor in the
range of 0.1mF to 1mF is generally adequate for most
applications. In application, when a separate voltage
source is available the boost circuit can be avoided as
shown in Figure 1.
Input Capacitor Selection
The input filter capacitor should be based on how much
ripple the supply can tolerate on the DC input line. The
ripple current generated during the on time of control
MOSFET should be provided by input capacitor. The RMS
value of this ripple is expressed by:
Where:
D is the Duty Cycle, D=VOUT/VIN.
IRMS is the RMS value of the input capacitor current.
IOUT is the output current for each channel.
For higher efficiency, a low ESR capacitor is recom-
mended. Choose two Poscap from Sanyo 10TPB100ML
(10V, 100mF, 55mV) with a maximum allowable ripple
current of 1.9A.
tSTART = 753Css (ms) ---(2)
VIN = 5V
VOUT = 2.5V
IOUT = 8A
DVOUT = 100mV
fS = 200KHz
Fb
IRU3038
V
OUT
R
5
R
6
V
REF
V
P
For VIN=5V, IOUT=8A and D=0.5, the IRMS=4A
VOUT = VP 3 1 + ---(1)
R6
R5
VP = VREF = 1.25V
( )
R6 = R5 3 - 1
VOUT
VP
( )
IRMS = IOUT D3(1-D) ---(3)
6Rev. 2.0
09/12/02
IRU3038
www.irf.com
Output Capacitor Selection
The criteria to select the output capacitor is normally
based on the value of the Effective Series Resistance
(ESR). In general, the output capacitor must have low
enough ESR to meet output ripple and load transient
requirements, yet have high enough ESR to satisfy sta-
bility requirements. The ESR of the output capacitor is
calculated by the following relationship:
The Sanyo TPC series, Poscap capacitor is a good choice.
The 6TPC150M 150mF, 6.3V has an ESR 40mV. Se-
lecting two of these capacitors in parallel, results to an
ESR of ≅ 20mV which achieves our low ESR goal.
The capacitor value must be high enough to absorb the
inductor's ripple current. The larger the value of capaci-
tor, the lower will be the output ripple voltage.
Inductor Selection
The inductor is selected based on output power, operat-
ing frequency and efficiency requirements. Low inductor
value causes large ripple current, resulting in the smaller
size, but poor efficiency and high output noise. Gener-
ally, the selection of inductor value can be reduced to
desired maximum ripple current in the inductor (∆i). The
optimum point is usually found between 20% and 50%
ripple of the output current.
For the buck converter, the inductor value for desired
operating ripple current can be determined using the fol-
lowing relation:
If Di = 30%(IO), then the output inductor will be:
The Coilcraft DO5022HC series provides a range of in-
ductors in different values, low profile suitable for large
currents, 3.3mH, 10A is a good choice for this applica-
tion. This will result to a ripple approximately 26.5% of
output current.
Power MOSFET Selection
The IRU3038 uses two N-Channel MOSFETs. The se-
lections criteria to meet power transfer requirements is
based on maximum drain-source voltage (VDSS), gate-
source drive voltage (VGS), maximum output current, On-
resistance RDS(ON) and thermal management.
The MOSFET must have a maximum operating voltage
(VDSS) exceeding the maximum input voltage (VIN).
The gate drive requirement is almost the same for both
MOSFETs. Logic-level transistor can be used and cau-
tion should be taken with devices at very low VGS to pre-
vent undesired turn-on of the complementary MOSFET,
which results a shoot-through current.
The total power dissipation for MOSFETs includes con-
duction and switching losses. For the Buck converter,
the average inductor current is equal to the DC load cur-
rent. The conduction loss is defined as:
The RDS(ON) temperature dependency should be consid-
ered for the worst case operation. This is typically given
in the MOSFET data sheet. Ensure that the conduction
losses and switching losses do not exceed the package
ratings or violate the overall thermal budget.
Choose IRF7460 for both control MOSFET and synchro-
nous MOSFET. This device provides low on-resistance
in a compact SOIC 8-Pin package.
Where:
DVO = Output Voltage Ripple
DIO = Output Current
DVO=100mV and DIO=4A
This results to: ESR=25mV
Where:
VIN = Maximum Input Voltage
VOUT = Output Voltage
∆i = Inductor Ripple Current
fS = Switching Frequency
∆t = Turn On Time
D = Duty Cycle
2
2
PCOND (Upper Switch) = ILOAD 3 RDS(ON) 3 D 3 q
PCOND (Lower Switch) = ILOAD 3 RDS(ON) 3 (1 - D) 3 q
q = RDS(ON) Temperature Dependency
L = 2.6mH
ESR [ ---(4)
DVO
DIO
VIN - VOUT = L3 ; Dt = D3 ; D =
1
fS
VOUT
VIN
Di
Dt
L = (VIN - VOUT)3 ---(5)
VOUT
VIN3Di3fS
IRU3038
7
Rev. 2.0
09/12/02 www.irf.com
The MOSFET has the following data:
The total conduction losses will be:
The switching loss is more difficult to calculate, even
though the switching transition is well understood. The
reason is the effect of the parasitic components and
switching times during the switching procedures such
as turn-on / turnoff delays and rise and fall times. With a
linear approximation, the total switching loss can be ex-
pressed as:
The switching time waveform is shown in Figure 4.
Figure 4 - Switching time waveforms.
From IRF7460 data sheet we obtain:
These values are taken under a certain condition test.
For more detail please refer to the IRF7460 data sheet.
By using equation (6), we can calculate the total switch-
ing losses.
Feedback Compensation
The IRU3038 is a voltage mode controller; the control
loop is a single voltage feedback path including error
amplifier and error comparator. To achieve fast transient
response and accurate output regulation, a compensa-
tion circuit is necessary. The goal of the compensation
network is to provide a closed loop transfer function with
the highest 0dB crossing frequency and adequate phase
margin (greater than 458).
The output LC filter introduces a double pole, –40dB/
decade gain slope above its corner resonant frequency,
and a total phase lag of 1808 (see Figure 5). The Reso-
nant frequency of the LC filter is expressed as follows:
Figure 5 shows gain and phase of the LC filter. Since we
already have 1808 phase shift just from the output filter,
the system risks being unstable.
Figure 5 - Gain and phase of LC filter.
The IRU3038’s error amplifier is a differential-input
transconductance amplifier. The output is available for
DC gain control or AC phase compensation.
The E/A can be compensated with or without the use of
local feedback. When operated without local feedback,
the transconductance properties of the E/A become evi-
dent and can be used to cancel one of the output filter
poles. This will be accomplished with a series RC circuit
from Comp pin to ground as shown in Figure 6.
tr = 6.9ns
tf = 4.3ns
PCON(TOTAL) = 1.152W
IRF7460
VDSS = 20V
ID = 10A @ 758C
RDS(ON) = 10mV @ VGS=10V
q = 1.8 for 1508C (Junction Temperature)
PSW(TOTAL) = 44.8mW
FLC = ---(7)
1
2p3 LO3CO
PSW = 3 3 ILOAD ---(6)
tr + tf
T
VDS(OFF)
2
Where:
VDS(OFF) = Drain to Source Voltage at off time
tr = Rise Time
tf = Fall Time
T = Switching Period
ILOAD = Load Current
V
DS
V
GS
10%
90%
t
d
(ON)
t
d
(OFF)
t
r
t
f
Gain
F
LC
0dB
Phase
0
8
F
LC
-180
8
Frequency Frequency
-40dB/decade
8Rev. 2.0
09/12/02
IRU3038
www.irf.com
Note that this method requires that the output capacitor
should have enough ESR to satisfy stability requirements.
In general, the output capacitor’s ESR generates a zero
typically at 5KHz to 50KHz which is essential for an
acceptable phase margin.
The ESR zero of the output capacitor expressed as fol-
lows:
Figure 6 - Compensation network without local
feedback and its asymptotic gain plot.
The transfer function (Ve / VOUT) is given by:
The (s) indicates that the transfer function varies as a
function of frequency. This configuration introduces a gain
and zero, expressed by:
The gain is determined by the voltage divider and E/A's
transconductance gain.
First select the desired zero-crossover frequency (Fo):
Fo > FESR and FO [ (1/5 ~ 1/10)3 fS
Use the following equation to calculate R4:
Where:
VIN = Maximum Input Voltage
VOSC = Oscillator Ramp Voltage
Fo = Crossover Frequency
FESR = Zero Frequency of the Output Capacitor
FLC = Resonant Frequency of the Output Filter
R5 and R6 = Resistor Dividers for Output Voltage
Programming
gm = Error Amplifier Transconductance
This results to R4=26.52KV. Choose R4=26.1KV
To cancel one of the LC filter poles, place the zero be-
fore the LC filter resonant frequency pole:
Using equations (11) and (13) to calculate C9, we get:
One more capacitor is sometimes added in parallel with
C9 and R4. This introduces one more pole which is mainly
used to suppress the switching noise. The additional
pole is given by:
The pole sets to one half of switching frequency which
results in the capacitor CPOLE:
C9 ≅ 1800pF
For:
VIN = 5V
VOSC = 1.25V
Fo = 30KHz
FESR = 26.5KHz
FLC = 5KHz
R5 = 1K
R6 = 1K
gm = 600mmho
FP = 2p 3 R4 3C9 3 CPOLE
C9 + CPOLE
1
|H(s)| = gm 3 3 R4 ---(10)
R5
R6 3 R5
FZ = ---(11)
1
2p 3 R4 3 C9
V
OUT
Vp=V
REF
R
5
R
6
R
4
C
9
Ve
E/A
F
Z
H(s) dB
Frequency
Gain(dB)
Fb Comp
FESR = ---(8)
1
2p3ESR3Co
H(s) = gm3 3 ---(9)
( )
R5
R6 + R51 + sR4C9
sC9
R4 = 3 3 3 ---(12)
Fo3FESR
FLC2
VOSC
VIN
R5 + R6
R5
1
gm
CPOLE = ≅
p 3 R4 3 fS - 1
C9
11
p 3 R4 3 fS
for FP << fS
2
FZ ≅ 75%FLC
FZ ≅ 0.75 31
2p LO 3 CO
For:
Lo = 10mH
Co = 300mF
FZ = 3.8KHz
R4 = 26.1KV
---(13)
IRU3038
9
Rev. 2.0
09/12/02 www.irf.com
For a general solution for unconditionally stability for
ceramic capacitor with very low ESR and any type of
output capacitors, in a wide range of ESR values we
should implement local feedback with a compensation
network. The typically used compensation network for
voltage-mode controller is shown in Figure 7.
Figure 7 - Compensation network with local
feedback and its asymptotic gain plot.
In such configuration, the transfer function is given by:
The error amplifier gain is independent of the transcon-
ductance under the following condition:
By replacing ZIN and Zf according to Figure 7, the trans-
former function can be expressed as:
As known, transconductance amplifier has high imped-
ance (current source) output, therefore, consider should
be taken when loading the E/A output. It may exceed its
source/sink output current capability, so that the ampli-
fier will not be able to swing its output voltage over the
necessary range.
The compensation network has three poles and two ze-
ros and they are expressed as follows:
Ve1 - gmZf
1 + gmZIN
VOUT =
Cross Over Frequency:
The stability requirement will be satisfied by placing the
poles and zeros of the compensation network according
to following design rules. The consideration has been
taken to satisfy condition (14) regarding transconduc-
tance error amplifier.
1) Select the crossover frequency:
Fo < FESR and Fo [ (1/10 ~ 1/6)3 fS
2) Select R7, so that R7 >>
3) Place first zero before LC’s resonant frequency pole.
FZ1 ≅ 75% FLC
4) Place third pole at the half of the switching frequency.
C12 > 50pF
If not, change R7 selection.
5) Place R7 in equation (15) and calculate C10:
gmZf >> 1 and gmZIN >>1 ---(14)
2
gm
FP3 = fS
2
C11 = 1
2p 3 FZ1 3 R7
FP1 = 0
1
2p3C103(R6 + R8)
FZ2 = ≅1
2p3C103R6
FZ1 = 1
2p3R73C11
FP3 = ≅
1
2p3R73
1
2p3R73C12
FP2 = 1
2p3R83C10
( )
C123C11
C12+C11
V
OUT
Vp=V
REF
R
5
R
6
R
8
C
10
C
12
C
11
R
7
Ve
F
Z
1
F
Z
2
F
P
2
F
P
3
E/A
Z
f
Z
IN
Frequency
Gain(dB)
H(s) dB
Fb Comp
H(s) = 1+sR7 3(1+sR8C10)
(1+sR7C11)3[1+sC10(R6+R8)]
3[ ( )]
1
sR6(C12+C11)C12C11
C12+C11
Where:
VIN = Maximum Input Voltage
VOSC = Oscillator Ramp Voltage
Lo = Output Inductor
Co = Total Output Capacitors
FO = R73C103 3
VIN
VOSC
1
2p3Lo3Co ---(15)
C10 [ 3
2p 3 Lo 3 FO 3 Co
R7
VOSC
VIN
C12 = 1
2p 3 R7 3 FP3
10 Rev. 2.0
09/12/02
IRU3038
www.irf.com
6) Place second pole at the ESR zero.
Check if R8 >
If R8 is too small, increase R7 and start from step 2.
7) Place second zero around the resonant frequency.
8) Use equation (1) to calculate R5:
These design rules will give a crossover frequency ap-
proximately one-tenth of the switching frequency. The
higher the band width, the potentially faster the load tran-
sient speed. The gain margin will be large enough to
provide high DC-regulation accuracy (typically -5dB to -
12dB). The phase margin should be greater than 458 for
overall stability.
IC Quiescent Power Dissipation
Power dissipation for IC controller is a function of ap-
plied voltage, gate driver loads and switching frequency.
The IC's maximum power dissipation occurs when the
IC operating with single 12V supply voltage (Vcc=12V
and Vc≅24V) at 400KHz switching frequency and maxi-
mum gate loads.
This IC's power dissipation results to an excessive tem-
perature rise and should be considered when using
IRU3038 for such an application.
Layout Consideration
The layout is very important when designing high fre-
quency switching converters. Layout will affect noise
pickup and can cause a good design to perform with
less than expected results.
Start to place the power components. Make all the con-
nections in the top layer with wide, copper filled areas.
The inductor, output capacitor and the MOSFET should
be close to each other as possible. This helps to reduce
the EMI radiated by the power traces due to the high
switching currents through them. Place input capacitor
directly to the drain of the high-side MOSFET. To reduce
the ESR, replace the single input capacitor with two par-
allel units. The feedback part of the system should be
kept away from the inductor and other noise sources
and be placed close to the IC. In multilayer PCB, use
one layer as power ground plane and have a separate
control circuit ground (analog ground), to which all sig-
nals are referenced. The goal is to localize the high cur-
rent path to a separate loop that does not interfere with
the more sensitive analog control function. These two
grounds must be connected together on the PC board
layout at a single point.
1
gm
R5 = 3 R6
VREF
VOUT - VREF
R6 = - R8
1
2p 3 C10 3 FZ2
FZ2 = FLC
R8 = 1
2p 3 C10 3 FP2
FP2 = FESR
IRU3038
11
Rev. 2.0
09/12/02 www.irf.com
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 8 - Output voltage of IRU3038. Figure 9 - Transconductance of IRU3038.
Figure 10 - Rise and fall time of IRU3038.
IRU3038
Rise Time / Fall Time
CL = 1500pF
0
5
10
15
20
25
30
35
40
45
50
-40°C -25°C 0°C +25°C +50°C +75°C +100°C
nano Seconds (ns)
Rise Time Fall time
IRU3038
Transconductance (GM)
0
100
200
300
400
500
600
700
800
900
-40°C -25°C 0°C +25°C +50°C +75°C +100°C
micro Mhos
Transconductance (GM)
IRU3038
Output Voltage
1.2
1.22
1.24
1.26
1.28
1.3
-40°C -25°C 0°C +25°C +50°C +75°C +100°C +125°C +150°C
Volts
Output Voltage
Spec Max.
Spec Min.
Max
Min
12 Rev. 2.0
09/12/02
IRU3038
www.irf.com
Figure 12 - Switching frequency vs. Rt.
150
200
250
300
350
400
450
0 50 100 150 200 250
Rt (KVV)
Fs (KHz)
TYPICAL APPLICATION
Single Supply 5V Input
Figure 11 - Typical application of IRU3038 in an on-board DC-DC converter
using a single 5V supply.
IRU3038
U1
Vcc Vc
HDrv
LDrv
Fb
Gnd
Comp
SS
C3
0.1uF C4
1uF
C8
0.1uF
C9
1800pF
R4
26.1K
Q1
IRF7460
Q2
IRF7460
R5
1K, 1%
R6
1K, 1%
L2
D05022P-103, 3.3uH, 10A
L1
1uH
C2
2x 10TPB100ML,
100uF, 55m
V
C1
33uF
Tantalum
2.5V
@ 8A
C7
2x 6TPC150M,
150uF, 40m
V
C5
0.1uF
5V
PGnd
V
REF
V
P
Rt
D1
BAT54S
IRU3038
13
Rev. 2.0
09/12/02 www.irf.com
TYPICAL APPLICATION
Figure 13 - Typical application of IRU3038 for DDR memory when the termination voltage
tracks the core voltage generated by IRU3037.
IRU3037
U1
Vcc Vc
HDrv
LDrv
Fb
Comp
SS
C1
0.1uF C2
1uF
C6
0.1uF
C8
2200pF
R2
33K
Q1
1/2 of IRF7313
Q1
1/2 of IRF7313
L2
L1
1uH
C3
10TPB100M,
100uF, 55m
V
C4
47uF
VDDQ
2.5V @ 3A
C7
2x 6TPC150M,
150uF, 40m
V
12V
5V
IRU3038
U2
Vcc Vc
HDrv
LDrv
Fb
Gnd
Comp
SS
C9
0.1uF C10
1uF
C12
0.15uF
C14
2200pF
R6
33K
Q2
1/2 of IRF7313
Q2
1/2 of IRF7313
L3
D03316P-103, 10uH, 3.9A Vtt
(1.25V @ 3A)
C13
2x 6TPC150M
150uF, 40m
V
12V
PGnd
Rt
VP
VREF
R4
1K
R5
1K
R3
1K
5V
5V
Gnd
R1
1K
D03316P-103, 10uH, 3.9A
C11
10TPB100M,
100uF, 55m
V
D1
BAT54
or 1N4148
14 Rev. 2.0
09/12/02
IRU3038
www.irf.com
DEMO-BOARD APPLICATION
5V to 2.5V @ 8A
Ref Desig Description Value Qty Part# Manuf Web site (www.)
2
1
1
1
1
1
2
2
2
1
1
1
3
1
1
2
Q1, Q2
U1
D1
L1
L2
C1
C2,C18
C10,C11
C5,C8
C4
C15
C9
C3,C6,C12
R9
R6
R8,R11
MOSFET
Controller
Diode
Inductor
Inductor
Cap, Tantalum
Cap, Poscap
Cap, Poscap
Cap, Ceramic
Cap, Ceramic
Cap, Ceramic
Cap, Ceramic
Cap, Ceramic
Resistor
Resistor
Resistor
IRF7460
IRU3038
BAT54S
D03316P-102HC
D05022P-332HC
ECS-T1CD336R
16TPB47M
6TPC150M
ECJ-2VF1E104Z
ECJ-3YB1E105K
ECJ-2VB1H182K
ECJ-2VB2D471K
ECJ-2VF1C105Z
IR
IR
IR
Coilcraft
Coilcraft
Panasonic
Sanyo
Sanyo
Panasonic
Panasonic
Panasonic
Panasonic
Panasonic
Application Parts List
20V, 10mV, 12A
Synchronous PWM
Fast Switching,
Schottky
1mH, 10A
3.3mH, 12A
33mF, 16V
47mF, 16V, 70mV
150mF, 6.3V, 40mV
0.1mF, Y5V, 25V
1mF, X7R, 25V
1800pF, X7R, 50V
470pF, X7R
1mF, Y5V, 16V
26.1K, 5%
4.7V, 5%
1K, 1%
Figure 14 - Demo-board application of IRU3038.
irf.com
coilcraft.com
maco.panasonic.co.jp
sanyo.com/industrial
maco.panasonic.co.jp
IRU3038
U1
Vcc Vc
HDrv
LDrv
Fb
Gnd
Comp
SS
C3
1uF C4
1uF
C8
0.1uF
C15
1800pF R9
26.1K
Q1
Q2
R11
1K, 1%
R8
1K, 1%
L2
3.3uH
L1
1uH
C2
47uF
70m
V
C1
33uF
2.5V
@ 8A
C11
150uF
40m
V
C5
0.1uF
5V
PGnd
VREF
VP
Rt
D1
C9
470pF
R6
4.7
V
C6
1uF
R1
Open
VDDQ
VREF
C12
1uF
Gnd
C10
150uF
40m
V
C18
47uF
70m
V
R2
Short
R13
Open
R12
Short
IRU3038
15
Rev. 2.0
09/12/02 www.irf.com
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 16 - Start-up time @ IOUT=5A.
Figure 17 - Shutdoown the output by
pulling down the soft-start. Figure 18 - 3.3V output voltage ripple @ IOUT=5A.
Figure 19 - Transient response @ IOUT=0 to 2A. Figure 20 - Transient response @ IOUT=0 to 4A.
0A
2A
Vss
VOUT
IOUT
VIN
Vss
VOUT
4A
0A
Figure 15 - Efficiency for IRU3038 Evaluation Board.
VIN=5V, VOUT=2.5V
80
82
84
86
88
90
92
94
0123456789
Output Current (A)
Efficiency (%)
16 Rev. 2.0
09/12/02
IRU3038
www.irf.com
(F) TSSOP Package
14-Pin
NOTE: ALL MEASUREMENTS ARE IN MILLIMETERS.
MIN
4.30
0.19
4.90
---
0.85
0.05
08
0.50
0.09
0.09
NOM
4.40
---
5.00
---
0.90
---
---
0.60
---
---
0.20
MAX
4.50
0.30
5.10
1.10
0.95
0.15
88
0.75
---
---
0.65 BSC
6.40 BSC
1.00
1.00
128 REF
128 REF
1.00 REF
14-PINSYMBOL
DESIG
A
B
C
D
E
F
G
H
J
K
L
M
N
O
P
Q
R
R1
C
B
A
1.0 DIA
E
F
K
H
J
G
D
P
O
M
R
R1
N
L
Q
DETAIL A
DETAIL A
PIN NUMBER 1
IRU3038
17
Rev. 2.0
09/12/02 www.irf.com
(S) SOIC Package
14-Pin Surface Mount, Narrow Body
SYMBOL
A
B
C
D
E
F
G
H
I
J
K
L
T
MIN
8.56
0.36
3.81
1.52
0.10
0.19
5.80
08
0.41
1.37
MAX
8.74
0.46
3.99
1.72
0.25
0.25
6.20
88
1.27
1.57
1.27 BSC
0.51 REF
78 BSC
14-PIN
NOTE: ALL MEASUREMENTS ARE IN MILLIMETERS.
PIN NO. 1
I
K
H
DETAIL-A
DETAIL-A
0.38
6
0.015 x 45
8
T
G
F
D
A
BC
E
L
J
18 Rev. 2.0
09/12/02
IRU3038
www.irf.com
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information
Data and specifications subject to change without notice. 02/01
PKG
DESIG
F
S
PACKAGE
DESCRIPTION
TSSOP Plastic
SOIC, Narrow Body
PARTS
PER TUBE
100
55
PARTS
PER REEL
2500
2500
PACKAGE SHIPMENT METHOD
PIN
COUNT
14
14
T & R
Orientation
Fig A
Fig B
Feed Direction
Figure A Feed Direction
Figure B
1 11 1 11
