MSM6660-02GS-BK - OKI Electronic Components

¡ Semiconductor MSM6660-01,02,03

1/18

GENERAL DESCRIPTION

The MSM6660 is a dynamic display LCD driver, equipped with a function that can switch

between 1/2 and 1/3 duty. The MSM6660 can directly drive LCDs with up to 124 or 186

segments, depending on whether 1/2 or 1/3 duty is selected.

The MSM6660’s on-board display synchronization circuit allows display in a multi-chip

configuration.

FEATURES

• Power supply voltage : 4 to 6 V (for both logic and LCD driver)

• Operating temperature : –40˚C to +85˚C

• Applicable LCD duty : 1/2 (1/2 bias), 1/3 (1/3 bias)

• Common output : 2 (1/2 duty), 3 (1/3 duty)

• Segment output : 62

• Serial transfer clock rate : 2 MHz Maximum

• On-board display synchronization circuit which enables display in a multi-chip configuration.

• CE, DATA, and CK are provided for microcomputer interface.

• Handling of display data segments in three blocks enables efficient data transfer.

• Equipped with display-blanking input and display segment test input functions.

• A built-in voltage dividing resistor for bias voltage generation.

- 01: No internal resistance

- 02: 1 kΩ internal resistance

- 03: 30 kΩ internal resistance

• A built-in RC oscillation circuit which uses an external RC.

• Package options:

80-pin plastic QFP (QFP80-P-1420-0.80-K) (Product name: MSM6660-01GS-K)

(Product name: MSM6660-02GS-K)

(Product name: MSM6660-03GS-K)

80-pin plastic QFP (QFP80-P-1420-0.80-BK) (Product name: MSM6660-01GS-BK)

(Product name: MSM6660-02GS-BK)

(Product name: MSM6660-03GS-BK)

¡ Semiconductor

MSM6660-01,02,03

1/2, 1/3 DUTY LCD DRIVER WITH 3-DOT COMMON DRIVER AND 62-DOT SEGMENT

DRIVER

E2B0011-27-Y3

This version: Nov. 1997

Previous version: Mar. 1996

¡ Semiconductor MSM6660-01,02,03

2/18

BLOCK DIAGRAM

62-BIT OUTPUT DRIVER

62-SEGMENT DATA SELECTOR

186-BIT DATA LATCH

72-BIT SHIFT REGISTER

GND

DATA

OSC

SEL

SEG0 SEG61

COM1

COM2

COM3

COMOUT

Oscillation

circuit

1/4 1/2 or 1/3

Synchronization circuit

Timing

generation

circuit

2/3 V

LC1

SYNC V

LC2

LC3

¡ Semiconductor MSM6660-01,02,03

3/18

PIN CONFIGURATION (TOP VIEW)

SEG40

SEG41

SEG42

SEG43

SEG44

SEG45

SEG46

SEG47

SEG48

SEG49

SEG50

SEG51

SEG52

SEG53

SEG54

SEG55

SEG56

SEG57

SEG58

SEG59

SEG60

SEG61

COMOUT

SYNC

SEG39 40

SEG38 39

SEG37 38

SEG36 37

SEG35 36

SEG34 35

SEG33 34

SEG32 33

SEG31 32

SEG30 31

SEG29 30

SEG28 29

SEG27 28

SEG26 27

SEG25 26

SEG24 25

SEG23

SEG22

SEG21

SEG20

SEG19

SEG18

SEG17

SEG16

SEG15

SEG14

SEG13

SEG12

SEG11

SEG10

SEG9

SEG8

SEG7

SEG6

SEG5

SEG4

SEG3

SEG2

SEG1

SEG0

DATA

OSC

SEL

2/3

VDD

VLC1

VLC2

VLC3

GND

COM1

COM2

COM3

80-Pin Plastic QFP

¡ Semiconductor MSM6660-01,02,03

4/18

ABSOLUTE MAXIMUM RATINGS

RECOMMENDED OPERATING CONDITIONS

Oscillation Circuit

Parameter

Oscillation Resistance

Symbol Condition Max.

Typ.Min.

kW

100 120

Unit

—

Oscillation Capacitance 0.0047 mF

0.01 0.047C

—

Oscillation Frequency — kHz

1.4 —f

OSC

—

COMOUT Frequency — Hz

350 —f

COM

—

Parameter Symbol Condition Rating Unit

Supply Voltage

Input Voltage

Power Dissipation

STG

Ta=25°C

–0.3 to +7

300

–0.3 to V

+0.3

Ta=85°C

°CStorage Temperature –55 to +150—

Parameter Symbol Condition Range Unit

Supply Voltage

"H" Input Voltage

"L" Input Voltage

VDD

VIH

VIL

fCK

Top

—

4 to 6

0 to VDD ¥ 0.3

VDD ¥ 0.7 to VDD

MHz

Shift Frequency 0.1 to 2

—

°C

Operating Temperature

–40 to +85—

¡ Semiconductor MSM6660-01,02,03

5/18

ELECTRICAL CHARACTERISTICS

DC Characteristics

"H" Input Voltage1

Hysteresis Width

—

—V

¥ 0.7

0.8 —

= V

Common Output

ON Resistance

Supply Current

IL1

HS *2

= 5V, I

= –0.5mA

Segment Output

ON Resistance

Parameter Condition Max.Typ.Min. Unit

= 5V±20%, Ta = –40 to +85°C)

Symbol

"L" Input Voltage1

¥ 0.3——V

IH1

"H" Input Voltage2 ——V

¥ 0.85 V

IL2

"L" Input Voltage2

*12

0.4——V

*12

IH2

–1 — 1mA

–15 –50 –100 mA

–1 — 1mA

3.5 — —V

——

0.4 V

——1

kW

——3

kW

——3

kW

——3

kW

——1

kW

——3

kW

——3

kW

——3

kW

— 0.3 1.0 mA

"H" Input Current I

"L" Input Current 1 I

IL1

"L" Input Current 2 I

IL2

Leakage Current I

"H" Output Voltage V

"L" Output Voltage V

ONDP

ONV1

ONV2

ONV3

ONDP

ONV1

ONV2

ONV3

= GND

LC1

= 3.33V, I

= ±0.5mA

= 5V, V

= GND

LC2

= 1.67V, I

= ±0.5mA

= V

or GND

LC3

= 0.0V, I

= 0.5mA

= 4V, I

= –0.4mA

= 5V, I

= –0.5mA

= 4V, I

= 0.4mA

LC1

= 3.33V, I

= ±0.5m

LC2

= 1.67V, I

= ±0.5mA

LC3

= 0.0V, I

= 0.5mA

OSC

= 1.4kHz, no load, CK=DC

*8,*11

*9,*11

*10

*1 Applicable to all input pins except OSC pin on the master side.

*2 Applicable to CE, CK, and DATA input.

*3 Applicable to CE, CK, DATA, SEL, 2/3, BL, and LT.

*4 Applicable to CE, CK, DATA, SEL, and 2/3.

*5 Applicable to BL and LT input.

*6 Applicable to SYNC.

*7 Applicable to SYNC and COMOUT.

*8 Applicable to SEG0 - SEG61.

*9 Applicable to COM1 - COM3.

*10 If a voltage-dividing resistor for bias voltage generation is included (- 02 and - 03), the value

does not include the current that flows through the resistor.

*11 If a voltage-dividing resistor for bias voltage generation is included (- 02 and - 03), the output

ON resistance value depends on the built-in dividing resistor.

*12 Applicable to the OSC pin on the master side.

¡ Semiconductor MSM6660-01,02,03

6/18

Voltage-dividing resistor for bias voltage generation

tDS

tCKW

1/fCK

tHtCEW

DATA

COMOUT

SYNC

AC Characteristics

LC1

LCD

LC2

LCD

LC3

LCD

Code Name

-02

-03

Condition Max.

0.6

Typ.Min.

1.4

100

Unit

Ta = –40 to +85°C

kW

Symbol

LCD

Parameter

Maximum Clock Frequency

Symbol Condition Max.

Typ.Min.

——

Unit

—

= 5V ± 20%, Ta = –40 to +85°C)

MHz

Clock Pulse Width 200 — —

CKW

—ns

Data Set-up Time 200 — —

—ns

Data Hold Time 200 — —

—ns

CE Pulse Width 200 — —

CEW

—ns

COMOUT-SYNC Delay Time — — 40

=50pF ns

Oscillation Frequency — 1.4 50

OSC

OSC Pin Operating Frequency

kHz

¡ Semiconductor MSM6660-01,02,03

7/18

FUNCTIONAL DESCRIPTION

Pin Functional Description

• OSC (pin 68)

When the master mode is selected, connect an external resistor and capacitor for the RC

oscillation circuit to this pin. When the slave mode is selected, this pin becomes the input pin

for an external clock signal.

The relationship of oscillation frequency to external CO and RO, when the master mode is

selected, is shown below.

fOSC =

0.69¥R

¥C

(Ta = 25˚C)

Example: When CO = 0.01µF and RO = 100 kΩ , the oscillation frequency, fOSC, is approximately

1.4 kHz.

• CE (pin 65)

This is a chip select input pin. Input data is valid only when this pin is set to "H". Data that

is input into the 72-stage shift register synchronously with the rising edge of CK will be

latched with the falling edge of this pin, and the display will be updated. A Schmitt trigger

is built into the input area.

• DATA (pin 66)

This is a data input pin. Data input is valid only when the CE pin is set to "H". The 72-stage

shift register contents are latched with the falling edge of this pin, and the display will be

updated. A Schmitt trigger is built into the input area.

• CK (pin 67)

This is a serial data shift lock input pin. Data is input synchronously with the rising edge of

the shift clock. A Schmitt trigger is built into the input area. Data can be latched even if the

shift clock is stopped, since a static shift register is used.

• SEL (pin 69)

This is an input pin used to switch between the master and the slave modes when a multi-chip

configuration is used. Set this pin to "H" to select the master mode, and to "L" to select the slave

mode.

•SYNC (pin 64)

When the master mode is selected, this pin becomes an output pin for synchronous signals.

When the slave mode is selected, this pin becomes an input pin for synchronous signals.

SEL

OSC

VDD

¡ Semiconductor MSM6660-01,02,03

8/18

• 2/3 (pin 70)

This pin is used to switch between 1/2 and 1/3 duty.

Set this pin to "H" to select 1/2 duty, and to "L" to select 1/3 duty.

• COMOUT (pin 63)

This is an output pin for clock synchronization. A frequency equal to fOSC/4 is output from

this pin.

•V

LC1 (pin 74), VLC2 (pin 75) and VLC3 (pin 76)

When the code is -01, these pins are used as input pins for LCD bias voltage. The VLC3 pin

should be connected with GND. The settings for these pins should be as follows:

VDD ≥ VLC1 ≥ VLC2 ≥ VLC3 = GND

When the code is -02 or -03, VLC1 and VLC2 pins should be left open, and VLC3 pin connected

with GND since a voltage-dividing resistor for bias voltage generation has been built in.

(However, when the code setting is -02 or -03, and if 1/2 duty is selected, VLC1 and VLC2

should be externally shorted.)

• COM1-COM3 (pins 78 to 80)

These are common signal output pins for driving the LCD. In the 1/2 duty mode, leave the

COM3 pin open.

• SEG0-SEG61 (pins 1 to 62)

These are segment signal output pins for driving the LCD. 1/2 or 1/3 duty can be selected

using the 2/3 pin, and 1/2 or 1/3 bias can be selected using pins VLC1 through VLC3.

•LT (pin 71)

This is an input pin for controlling the display on the LCD. If this pin is set to "L", all segments

will be turned on. A pull-up resistor is included.

•BL (pin 72)

This is an input pin for controlling the display on the LCD. If this pin is set to "L", all segments

will be turned off. A pull-up resistor is included.

¡ Semiconductor MSM6660-01,02,03

9/18

Data Input

Display data should be input according to the timing diagram below.

* Display Data

* Address Data

The most significant 3 bits (the last 3 bits) contain the address data.

Address data: "100" — SEG0 - SEG20

"010" — SEG21 - SEG41

"001" — SEG42 - SEG61

Since the last 3 bits correspond to each group of segments, if the address is "110", SEG0 - SEG20

and SEG21 - SEG41 are all updated at a time in accordance with the data.

DATA

Display

LSB MSB

n-1

n-2

Old New

Duty Mode 2/3 Pin Data Length COM Data

1/2 Duty

1/3 Duty

H48-Bit (D0 - D47) ¥ 3

COM1: D0, D2.....D0+2n

COM2: D1, D3.....D1+2n

n = 0 - 61

COM1: D0, D3.....D0+3n

COM2: D1, D4.....D1+3n

COM2: D2, D5.....D2+3n

n = 0 - 61

72-Bit (D0 - D71) ¥ 3L

¡ Semiconductor MSM6660-01,02,03

10/18

1) Data format when 1/2 duty (124 segments) is selected.

D3 D4

S19

D39

S20

D40

S20

D41

D45

D46

D47D42- D44

S21

S22

S23

S40

D39

S41

D40

S41

D41

D45

D46

D47D42- D44

S42

S43

D3 D4

S60

D37

S61

D38

S61

D39

D45

D46

D47D40- D44

D42 - D44 are Dummy Data

D40 - D44 are Dummy Data

2) Data format when 1/3 duty (186 segments) is selected.

D60 D61 D62 D69 D70 D71D63- D68

S20

C3 1 0 0

D60 D61 D62 D69 D70 D71D63- D68

S21

S22

S41

C3 0 1 0

S42

S43

D3 D4

S61

D57

S61

D58

S61

D59

D69

D70

D71D60- D68

D63 - D68 are Dummy Data

D60 - D68 are Dummy Data

¡ Semiconductor MSM6660-01,02,03

11/18

LCD Display Timing

1) 1/2 duty mode (2/3 = "H")

Off

LC1,2

LC3

COM1

GND

COMOUT

SYNC V

GND

LC1,2

LC3

COM2

LC1,2

LC3

SEGn

On OffOn OffOn OffOn OffOn OffOn On

Note: When 1/2 duty is selected and 1/2 bias is used, perform the following:

- When the code is -01, short VLC1 and VLC2, and supply the bias voltage.

- When the code is -02 or -03, externally short VLC1 and VLC2.

¡ Semiconductor MSM6660-01,02,03

12/18

2) 1/3 duty mode (2/3 = "L")

Off

LC1

LC2

LC3

SEGn

LC1

LC2

LC3

COM3

LC1

LC2

LC3

COM2

LC1

LC2

LC3

COM

GND

COMOUT

SYNC

On Off Off On On OnOff Off Off Off Off

GND

¡ Semiconductor MSM6660-01,02,03

13/18

Pin Functions in a Multi-chip Configuration

When MSM6660 ICs are used in a multi-chip configuration, one of them is used in the master

mode to generate the common frequency and the synchronization signal. These signals are then

received by the slave mode ICs to enable synchronous operation.

LCD Bias Voltage Application Method

1) For 1/2 bias (when 1/2 duty is selected)

LCD

LC1

LC2

LC3

Note: The above case is for code -01. When the code is -02 or -03, an external voltage-dividing

resistor is not needed, because it is already built into the type signified by these

settings. However, pins VLC1 and VLC2 must be shorted externally.

2) For 1/3 bias (when 1/3 duty is selected)

LCD

LC1

LC2

LC3

LCD

Note: The above case is for the code -01. When the code is -02 or -03, an external voltage-

dividing resistor is not needed, because it is already built into the type signified by

these settings. Leave VLC1 through VLC3 open.

Symbol Pin Master Mode LSI Slave Mode LSI

COMOUT

SYNC

OSC

63 Connect to Slave IC OSC

Connect to Slave IC SYNC

Open (Unused)

Connect to Master IC COMOUT

Connect to Master IC SYNC

Connect an external resistor and capacitor

SEL

69 "L" (GND) level"H" (V

) level

¡ Semiconductor MSM6660-01,02,03

14/18

Method of Reducing the Transfer Time When Unused Segments Exist

When unused segments exist, it is not required to transfer the data of unused segments. This

allows the data transfer time to be reduced. However, the last 3 bits are address data.

S19

D35

S20

D36

S20

D37

D41

D42

D43D38- D40

Unused segment data reduced D38 - D40 are dummy data

When SEG0 and 1 are not used, the data can be reduced from the original 48 bits to 44 bits.

¡ Semiconductor MSM6660-01,02,03

15/18

APPLICATION CIRCUIT

For 1/3 duty, 1/3 bias (when the code setting is -01)

LCD

Ro Co

LC1

LC2

LC3

OSC

SEL

COM1

COM2

COM3

COMOUT

SYNC

DATA

SEG0 - SEG61

LC1

LC2

LC3

OSC

SEL

COM1

COM2

COM3

COMOUT

SYNC

DATA

SEG0 - SEG61

DATA

CE1

CE2

LCD PANEL

MSM6660

(Master Mode)

MSM6660

(Slave Mode)

¡ Semiconductor MSM6660-01,02,03

16/18

REFERENCE DATA

fCOM vs. RO, CO

fOSC vs. VDD

040 60 80 100 120 140

fCOM (kHz)

160

0.0022

0.0047

0.01

0.022

= 5V, Ta = Room Temp.

Capacitance C

(mF)

Resistance RO (kW)

1.2 234567

1.3

OSC

(kHz)

1.5

1.6

Ta = Room Temp.

= 100kW, C

= 0.01mF

1.4

(V)

¡ Semiconductor MSM6660-01,02,03

17/18

(Unit : mm)

PACKAGE DIMENSIONS

Notes for Mounting the Surface Mount Type Package

The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which

are very susceptible to heat in reflow mounting and humidity absorbed in storage.

Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the

product name, package name, pin number, package code and desired mounting conditions

(reflow method, temperature and times).

Package material

Lead frame material

Pin treatment

Solder plate thickness

Package weight (g)

Epoxy resin

42 alloy

Solder plating

5 mm or more

1.27 TYP.

QFP80-P-1420-0.80-K

Mirror finish

¡ Semiconductor MSM6660-01,02,03

18/18

(Unit : mm)

Notes for Mounting the Surface Mount Type Package

The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which

are very susceptible to heat in reflow mounting and humidity absorbed in storage.

Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the

product name, package name, pin number, package code and desired mounting conditions

(reflow method, temperature and times).

QFP80-P-1420-0.80-BK

Package material

Lead frame material

Pin treatment

Solder plate thickness

Package weight (g)

Epoxy resin

42 alloy

Solder plating

5 mm or more

1.27 TYP.

Mirror finish