16-bit FCT with Balanced Drive Cypress 16-bit FCT Logic Products Feature Balanced Drive Introduction This application note answers the basic questions about balanced drive. Namely; what is it, which Cypress FCT products have it, why have it and what benefits does it provide to the user, how is it specified, and how is it measured? What is Balanced Drive? Balanced drive refers to the design of the output buffer such that the current that the device sources or sinks are approximately equal. This implies that the source impedance (to VCC, as well as to ground) is the same for a LOW to HIGH, or a HIGH to LOW transition of the output. They could just as well be called "balanced output impedance" devices. Which 16-bit FCT Products Have It? The Cypress FCT products that have balanced drive have the number "2" following the number "16" in their part number. They are either of the form CY74FCT162XXXT or of the form CY74FCT162HXXXT, where the "H" designates Bus Hold, and XXX the industry standard logic function. Balanced Drive Products; 14 Functions The balanced drive products are, 240, 244, 245, 373, 374, 500, 501, 543, 646, 652, 823, 827, 841, and 952. Balanced Drive with Bus Hold; 4 Functions The balanced drive products with bus hold are 244, 245, 501, and 952. Why Have Balanced Drive? In three words; to reduce noise. The balanced drive output structure is designed to, (1) provide matched rise and fall times with edge rate control, (2) present a constant source impedance of approximately 25 Ohms, (3) source or sink up to 60 mA of dynamic current, and (4) source or sink a minimum of 24 mA of static current. Each item will be discussed in detail. Matched Output Rise and Fall Times of Approximately One Nanosecond The one nanosecond (unloaded) rise and fall times of the outputs mean that for strip line construction on G10 glass epoxy PCBs, whose intrinsic characteristic impedance is approximately 50 Ohms, a trace whose length is over approximately two inches is a transmission line. A ramification of this is that if high drive FCT products drive the line, it must be terminated. However, if balanced drive FCT products drive the line, they (internally) provide the termination and termination is not required at the load. Thus, the user saves the cost of termination circuits, as well as the PCB area required to mount them. Constant Source Impedance The constant source impedance insures that the reflection coefficient between the line and the source will be the same for either a LOW to HIGH or a HIGH to LOW output signal transition. A 25-Ohm source impedance will cause all but the most heavily loaded lines to be "overdamped," which will cause the energy reflected back from the load to be absorbed by the source. Thus, the balanced drive reduces noise by absorbing reflected energy, but without the disadvantage of the half-voltage level along the line that would occur if an external series damping resistor were used. Balanced drive FCT is recommended for all applications with the exception of heavily loaded (over 300 pF) backplanes. The relatively low source impedance of 25 Ohms means a smaller RC time constant for the rise time and the fall time at the load, thus eliminating duty cycle degradation and asymmetry problems. Dynamic Current The balanced drive outputs are designed and guaranteed to source or sink a minimum of 60 mA at 1.5V. Actually, the specification should be 60 mA at the minimum TTL logical one voltage level, which is two Volts. As will be shown, this amount of instantaneous current is sufficient to cause incident wave switching in all but the most heavily loaded backplanes. Dynamic Current Calculation VMEbus Example The controlled edge rates over a large range of load capacitance (up to 300 pF) result in the generation of predictable harmonics (noise), which can be filtered out by using the proper high-frequency filter capacitor between VCC and ground. This is in addition to any decoupling capacitor. When a Fourier analysis is performed on a train of pulses, noise is generated at frequencies of one over Pi times the period, one over Pi times the pulse width, and one over Pi times the rise time. For rise times of one nanosecond, the corresponding (highest) frequency is 320 MHz. For this reason, 100-pF to 500-pF chipcaps, whose series resonant frequency is greater than 320 MHz, are recommended to be connected between VCC and ground. For example, the VMEbus specifies a maximum I/O capacitance per slot of 20 pF. For a fully loaded backplane, constructed of multi-layer G10 glass epoxy, what instantaneous current must the drivers be capable of supplying? The assumptions are that the intrinsic (unloaded) characteristic impedance is 50 Ohms and the dielectric constant of the G10 is 5. The VMEbus backplane length is 19 inches and the maximum number of slots is 20. The procedure is to list the applicable equations, calculate the loaded line impedance, and then calculate the instantaneous current by dividing 2V by the loaded line impedance. The propagation delay of the line is given by the formula: Controlled edge rates also reduce EMI and RFI emissions. Cypress Semiconductor Corporation * 3901 North First Street * [ ns ft ] T pd = 1.017 r * San Jose * CA 95134 Eq. 1 * 408-943-2600 September 1996 16-bit FCT with Balanced Drive If the maximum instantaneous current is limited to 60 mA, the loaded line impedance must limited to a minimum of 2V/ 60 mA = 33.3 Ohms. Where Epsilon is the dielectric constant. For G10 glass epoxy the propagation delay is 2.27ns per foot. From transmission line theory, for a lossless line, the following equations apply Zo = T pd = L ---C [ Ohms ] [ ns ft ] LC = Z o C Substitution of these values yields; CD -------- = 4.73 l Eq. 2 where CD is in pF and l is in inches. This equation is of the form XY = K, which is an equilateral hyperbola. Where X = CD, and Y = 1/l The "negative values" of X and Y (i.e., those in the third quadrant) have no physical meaning, but those in the first quadrant represent, in this case, the loci of all combinations of one over l and CD, such that the loaded line impedance (of a 50 Ohm intrinsic line) is 33.3 Ohms. In other words, the curve illustrated in Figure 1 represents a constant 33.3 Ohm (minimum) line impedance. Eq. 3 Where L and C are the inductance and capacitance of the line, per unit length. Finally, the relationship between the intrinsic line characteristic impedance, ZO, and the loaded line impedance, ZOL is ZO Z O L = ---------------------CD 1 + -------lC [ Ohms ] Eq. 5 Eq. 4 Equation 5 is rewritten as and plotted in Figure 2. The VMEbus example is shown for reference. Note how far outside the balanced drive operating region it is. Analysis of Equation 4 reveals that as the line becomes longer, the loaded line impedance approaches the intrinsic line characteristic impedance. The line in Figure 2 represents the minimum line length for a given total lumped capacitance that results in a loaded line impedance of 33.3 Ohms. All points to the left of the line have loaded line impedances greater than 33.3 Ohms, which balanced drive FCT can drive. All points to the right of the line have lower impedances, which balanced drive FCT cannot drive. Where ZO is the intrinsic characteristic impedance, CD is the sum of the lumped loads, l is the line length, and C is the intrinsic line capacitance per unit length. Solving Equation 4 for C yields T pd C = --------ZO Substitution of Tpd = 2.27 ns/ft and Zo = 50 Ohms yields C = 45.4 pF/ft. Substitution into Equation 3, with CD = 400pF, yields a loaded impedance of 19.51 Ohms. The instantaneous current required is i = 2V/19.51 = 100 mA. CD = l The conclusion is that balanced drive devices cannot be used to drive a fully loaded VMEbus. The next logical question to be asked is, under what loading and line length conditions can balanced drive FCT be used? 1/l K operating region Dynamic Current Limit Conditions The procedure is to reverse the preceding sequence of calculations and determine the relationship between line length and load that must be satisfied in order to reliably use balanced drive devices. Solving Equation 4 for CD -------lC CD -------- = lC Zo 2 ---------- - 1 Z OL ZOL = 33.3 yields. CD [ Ohms ] Figure 1. Balanced Drive Hyperbola As a rule of thumb, the input capacitance of each CMOS device is 10 pF. For example, if we are driving four loads, the total capacitance is 40 pF, and the minimum line length is .021 x 40 = 8.4 inches. It is, perhaps, counter intuitive to increase the line length, but in some cases it must be done to increase the loaded line impedance. The person performing the PCB layout must be aware of this. The operating conditions are; ZO = 50 Ohms ZOL = 2V/60mA = 33.3 Ohms C = 3.78 pF/inch (equivalent to 45.4pF/ft.) 2 16-bit FCT with Balanced Drive VCC ZOL = 33.3 100 l = ZO 0.21 C D Balanced Drive operating region 80 l 60 in inches R2 High Drive operating region 40 ZOL = 20 Figure 3. Pull;-up/Pull-down Terminated Line Its disadvantage is that it has DC power dissipation, and that the driver must sink an amount of DC current equal to (VCC VOL)/R1 and source an amount of sufficient to reach the minimum HIGH TTL level (2V) at the junction of R1 and R2. 19.51 + VMEbus 0 0 100 200 300 400 500 50 Ohm Line Calculations CD in pF Figure 2. Balanced Drive Hyperbola Conditions for A Transmission Line For a trace on a PCB or module to be a transmission line it must be "long." The definition of a long line is any line whose length is greater than (or equal to) the rise time divided by two times the one way propagation delay per unit length of the line. In equation form; tr l > -------------2T pdl Eq. 6 The loaded propagation delay of the line is increased by the same factor that the unloaded characteristic impedance is decreased by. In equation form; CD T pd = T pd 1 + -------lC R1 Eq. 7 It is good practice to calculate the loaded propagation delay and to check that the line is long, using Equation 6. Static Current For proper termination, R1=2Zo and R2= 2Zo. If Zo=50 Ohms, R1=R2=100 Ohms. However, the current that the driver must sink is 5V-0.55V/100=40 mA, which is greater than the 24 mA specification. The current that the driver must supply (source) is 2V/100=20 mA, which is within the 24 mA specification. The conclusion is that balanced drive FCT cannot drive 50 Ohm transmission lines with pull-up/pull-down resistive terminations. However, adding a small capacitor (22-pF) in series with each resistor converts the termination to an AC termination, and there is no DC power dissipation. 100 Ohm Line Calculations For a ZO= 100 Ohms, R1=R2=200 Ohms. The current that the driver must sink is 20 mA, so the balanced drive FCT can drive 100 Ohm transmission lines. Output Source Current Test The output is conditioned to be in the HIGH state, a voltage of 2.4V is applied to the output, and a minimum current of 24 mA is pulled out of the lead. Output Sink Current Test The output is conditioned to be in the LOW state, and a current source of 24 mA is applied to the lead, and a maximum voltage of 0.55V is measured between the lead and ground. Static currents are guaranteed by the data sheet and are tested, on a production basis, on each and every output of every device manufactured by Cypress. In most applications, FCT outputs are either driving other FCT or CMOS inputs. If this is the case, there is no appreciable static current. The only static current is leakage current, which is guaranteed to be less than one microampere, and is typically in the tens of nanoamperes. However, for those applications that require a guaranteed minimum static current, Cypress guarantees that the outputs will sink and source a minimum of 24 mA of static current at low VCC (4.5V). This translates to 26.67 mA at Vcc=5V. An example of an application where static current matters is illustrated in Figure 3. The pull-up/pulldown termination is usually used for terminating clock lines, because it causes less signal duty cycle distortion than either series termination or AC termination. (c) Cypress Semiconductor Corporation, 1990. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.