PD-91719C IRFE430 JANTX2N6802U JANTXV2N6802U REPETITIVE AVALANCHE AND dv/dt RATED (R) HEXFET TRANSISTORS SURFACE MOUNT (LCC-18) REF:MIL-PRF-19500/557 500V, N-CHANNEL Product Summary Part Number BVDSS RDS(on) ID IRFE430 500V 1.50 2.5A LCC-18 The leadless chip carrier (LCC) package represents the logical next step in the continual evolution of surface mount technology. Desinged to be a close replacement for the TO-39 package, the LCC will give designers the extra flexibility they need to increase circuit board density. International Rectifier has engineered the LCC package to meet the specific needs of the power market by increasing the size of the bottom source pad, thereby enhancing the thermal and electrical performance. The lid of the package is grounded to the source to reduce RF interference. Features: n n n n n n n n n Surface Mount Small Footprint Alternative to TO-39 Package Hermetically Sealed Dynamic dv/dt Rating Avalanche Energy Rating Simple Drive Requirements Light Weight ESD Rating: Class 1C per MIL-STD-750, Method 1020 Absolute Maximum Ratings Parameter ID @ VGS = 10V, TC = 25C ID @ VGS = 10V, TC = 100C IDM PD @ TC = 25C VGS EAS IAR EAR dv/dt TJ T STG Continuous Drain Current Continuous Drain Current Pulsed Drain Current A Max. Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy A Avalanche Current A Repetitive Avalanche Energy A Peak Diode Recovery dv/dt A Operating Junction Storage Temperature Range Pckg. Mounting Surface Temp. Weight Units 2.5 1.5 10 25 0.20 20 98 2.5 2.5 6.2 -55 to 150 300 (for 5 S) 0.42 (typical) A W W/C V mJ A mJ V/ns C g For footnotes refer to the last page www.irf.com 1 01/27/15 IRFE430, JANTX2N6802U Electrical Characteristics @ Tj = 25C (Unless Otherwise Specified) BVDSS BVDSS/TJ Parameter Min Drain-to-Source Breakdown Voltage 500 Typ Max Units -- -- V -- 0.59 -- V/C -- -- 2.0 2.0 -- -- -- -- -- -- -- -- 1.50 1.725 4.0 -- 25 250 VGS(th) g fs IDSS Temperature Coefficient of Breakdown Voltage Static Drain-to-Source On-State Resistance Gate Threshold Voltage Forward Transconductance Zero Gate Voltage Drain Current IGSS IGSS Qg Q gs Q gd td(on) tr td(off) tf LS + LD Gate-to-Source Leakage Forward Gate-to-Source Leakage Reverse Total Gate Charge Gate-to-Source Charge Gate-to-Drain (`Miller') Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Inductance -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 6.1 100 -100 30 4.5 28 30 30 55 30 -- C iss C oss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance -- -- -- 750 240 67 -- -- RDS(on) V S A nA nC Test Conditions VGS = 0V, ID = 1.0mA Reference to 25C, ID = 1.0mA VGS = 10V, ID =1.5AA VGS =10V, ID = 2.5A A VDS = VGS, ID = 250A VDS = 15V, IDS =1.5AA VDS = 400V, VGS = 0V VDS = 400V VGS = 0V, TJ = 125C VGS = 20V VGS = -20V VGS =10V, ID = 2.5A VDS = 250V VDD = 250V, ID = 2.5A, VGS =10V,RG = 7.5 ns nH Measured from the center of drain pad to center of source pad pF VGS = 0V, VDS = 25V f = 1.0MHz Source-Drain Diode Ratings and Characteristics Parameter Min Typ Max Units IS ISM Continuous Source Current (Body Diode) Pulse Source Current (Body Diode) A -- -- -- -- 2.5 10 A VSD trr Q RR Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge -- -- -- -- -- -- 1.4 900 2.0 V ns C ton Forward Turn-On Time Test Conditions Tj = 25C, IS = 2.5A, VGS = 0V A Tj = 25C, IF = 2.5A, di/dt 100A/s VDD 50V A Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD. Thermal Resistance Parameter RthJC RthJ-PCB Junction to Case Junction to PC Board Min Typ Max -- -- -- -- 5.0 19 Units C/W Test Conditions Soldered to a copper clad PC board Note: Corresponding Spice and Saber models are available on International Rectifier website. For footnotes refer to the last page 2 www.irf.com IRFE430, JANTX2N6802U 100 100 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 10 1 4.5V 20s PULSE WIDTH TJ = 25 C 0.1 0.1 1 10 10 4.5V 1 0.1 100 VDS , Drain-to-Source Voltage (V) 10 TJ = 150 C TJ = 25 C 1 V DS = 50V 20s PULSE WIDTH 7.0 8.0 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com RDS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) 3.0 6.0 1 10 100 Fig 2. Typical Output Characteristics 100 5.0 20s PULSE WIDTH TJ = 150 C VDS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics 0.1 4.0 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) TOP ID = 2.5A 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 TJ , Junction Temperature( C) Fig 4. Normalized On-Resistance Vs. Temperature 3 IRFE430, JANTX2N6802U VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd 1200 Ciss 800 Coss 400 Crss 0 1 10 20 VGS , Gate-to-Source Voltage (V) C, Capacitance (pF) 1600 ID = 2.5A V DS = 400V V DS = 250V V DS = 100V 16 12 8 4 0 100 FOR TEST CIRCUIT SEE FIGURE 13 0 5 ID, Drain-to-Source Current (A) ISD , Reverse Drain Current (A) 20 25 30 100 10 TJ = 150 C 1 TJ = 25 C V GS = 0 V 0.6 0.8 VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 15 Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 0.1 0.4 10 QG , Total Gate Charge (nC) VDS , Drain-to-Source Voltage (V) 1.0 OPERATION IN THIS AREA LIMITED BY R DS(on) 10 100s 1 1ms 10ms 0.1 0.01 Tc = 25C Tj = 150C Single Pulse 1 DC 10 100 1000 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRFE430, JANTX2N6802U 2.5 RD V DS V GS ID , Drain Current (A) 2.0 RG D.U.T. + -V DD 1.5 10V Pulse Width 1 s Duty Factor 0.1 % 1.0 Fig 10a. Switching Time Test Circuit 0.5 VDS 90% 0.0 25 50 75 100 125 150 TC , Case Temperature ( C) 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 D = 0.50 1 0.20 0.10 0.05 0.1 0.02 0.01 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.01 0.00001 0.0001 0.001 0.01 0.1 1 10 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRFE430, JANTX2N6802U 15V L VDS D.U.T RG 10V 20V IAS DRIVER + - VDD 0.01 tp Fig 12a. Unclamped Inductive Test Circuit A EAS , Single Pulse Avalanche Energy (mJ) 250 ID 1.1A 1.6A 2.5A TOP 200 BOTTOM 150 100 50 0 V(BR)DSS 25 50 75 100 125 150 Starting T J , Junction Temperature (C) tp Fig 12c. Maximum Avalanche Energy Vs. Drain Current I AS Current Regulator Same Type as D.U.T. Fig 12b. Unclamped Inductive Waveforms 50K QG 10 V QGS .2F .3F D.U.T. QGD + V - DS VGS VG 3mA Charge Fig 13a. Basic Gate Charge Waveform 6 12V IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit www.irf.com IRFE430, JANTX2N6802U Footnotes: A Repetitive Rating; Pulse width limited by maximum junction temperature. A VDD = 50V, Starting TJ = 25C, L = 31mH Peak IAS = 2.5A, VGS =10V, RG= 25 A ISD 2.5A, di/dt 86A/s, VDD 500V, TJ 150C, Suggested RG =7.5 A Pulse width 300 s; Duty Cycle 2% Case Outline and Dimensions -- LCC-18 IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA Tel: (310) 252-7105 IR LEOMINSTER : 205 Crawford St., Leominster, Massachusetts 01453, USA Tel: (978) 534-5776 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. Data and specifications subject to change without notice. 01/2015 www.irf.com 7