SN55107A, SN55107B, SN55108A, SN55108B SN75107A, SN75107B, SN75108A, SN75108B DUAL LINE RECEIVERS SLLS069B - JANUARY 1977 - REVISED MAY 1995 * description These circuits are TTL-compatible, high-speed line receivers. Each is a monolithic dual circuit featuring two independent channels. They are designed for general use as well as such specific applications as data comparators and balanced, unbalanced, and party-line transmission systems. These devices are unilaterally interchangeable with and are replacements for the SN55107, SN55108, SN75107, and SN75108, but offer diode-clamped strobe inputs to simplify circuit design. SN55107A, SN55107B, SN55108A, SN55108B . . . J OR W PACKAGE SN75107A, SN75107B, SN75108A, SN75108B . . . D, J, OR N PACKAGE (TOP VIEW) 1A 1B NC 1Y 1G S GND 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC + VCC - 2A 2B NC 2Y 2G SN55107A, SN55107B, SN55108A, SN55108B . . . FK PACKAGE (TOP VIEW) 1B 1A NC V CC + VCC - * * * * * * High Speed Standard Supply Voltage Dual Channels High Common-Mode Rejection Ratio High Input Impedance High Input Sensitivity Differential Common-Mode Input Voltage Range of 3 V Strobe Inputs for Receiver Selection Gate Inputs for Logic Versatility TTL Drive Capability High dc Noise Margin '107A and '107B Have Totem-Pole Outputs '108A and '108B Have Open-Collector Outputs B Versions Have Diode-Protected Input for Power-Off Condition NC NC 1Y NC 1G 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 2A NC 2B NC NC S GND NC 2G 2Y * * * * * * * NC - No internal connection THE SN75108B IS NOT RECOMMENDED FOR NEW DESIGN The essential difference between the A and B versions can be seen in the schematics. Input-protection diodes are in series with the collectors of the differential-input transistors of the B versions. These diodes are useful in certain party-line systems that may have multiple VCC + power supplies and may be operated with some of the VCC + supplies turned off. In such a system, if a supply is turned off and allowed to go to ground, the equivalent input circuit connected to that supply would be as follows: Input Input A Version B Version This would be a problem in specific systems that might possibly have the transmission lines biased to some potential greater than 1.4 V. The SN55107A, SN55107B, SN55108A, and SN55108B are characterized for operation over the full military temperature range of - 55C to 125C. The SN75107A, SN75107B, SN75108A, and SN75108B are characterized for operation from 0C to 70C. Copyright 1995, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 2-1 SN55107A, SN55107B, SN55108A, SN55108B SN75107A, SN75107B, SN75108A, SN75108B DUAL LINE RECEIVERS SLLS069B - JANUARY 1977 - REVISED MAY 1995 logic symbols SN55107 SN75107 S 1A 1B 1G 2A 2B 2G 6 1 SN55108 SN75108 6 S EN & 4 2 2 1B 5 11 9 11 2B 2Y 9 8 2G These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, N, and W packages. logic diagram (positive logic) S 1A 1B 1G 2G 2A 2B 6 1 2 4 5 1Y 8 12 9 11 2Y FUNCTION TABLE DIFFERENTIAL INPUTS A-B VID 25 mV - 25 mV < VID < 25 mV VID - 25 mV STROBES G S OUTPUT Y X X H X L H L X H H H Indeterminate X L H L X H H H L H = high level, L = low level, X = irrelevant 2-2 POST OFFICE BOX 655303 1Y 12 2A 8 4 5 1G 12 & 1 1A 1Y EN * DALLAS, TEXAS 75265 2Y SN55107A, SN55107B, SN55108A, SN55108B SN75107A, SN75107B, SN75108A, SN75108B DUAL LINE RECEIVERS SLLS069B - JANUARY 1977 - REVISED MAY 1995 schematic (each receiver) 14 VCC + 1 k 400 1 k 1.6 k 4 k 4.8 k 120 800 4, 9 A 1, 12 760 R Inputs B 7 Output Y GND 2, 11 5, 8 Strobe G 4.25 k 3 k 3 k Common to Both Receivers VCC - 13 6 Strobe S To Other Receiver Pin numbers shown are for D, J, N, and W packages. R = 1 k for '107A and '107B, 750 for '108A and '108B. NOTES: 1. Resistor values shown are nominal. 2. Components shown with dashed lines in the output circuitry are applicable to the '107A and '107B only. Diodes in series with the collectors of the differential input transistors are short circuited on '107A and '108A. absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, VCC + (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Supply voltage, VCC - . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 7 V Differential input voltage, VID (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V Common-mode input voltage, VIC (see Note 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 V Strobe input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA: SN55' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 55C to 125C SN75' . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65C to 150C Case temperature for 60 seconds, Tc: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package . . . . . . . . . . . . . . . . . . . . . 300C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, or W package . . . . . . . . . . . . . 260C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 3. All voltage values, except differential voltages, are with respect to network ground terminal. 4. Differential voltage values are at the noninverting (A) terminal with respect to the inverting (B) terminal. 5. Common-mode input voltage is the average of the voltages at the A and B inputs. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 2-3 SN55107A, SN55107B, SN55108A, SN55108B SN75107A, SN75107B, SN75108A, SN75108B DUAL LINE RECEIVERS SLLS069B - JANUARY 1977 - REVISED MAY 1995 DISSIPATION RATING TABLE PACKAGE TA 25C POWER RATING DERATING FACTOR ABOVE TA = 25C TA = 70C POWER RATING TA = 125C POWER RATING D 950 mW 7.6 mW/C 608 mW -- FK 1375 mW 11.0 mW/C 880 mW 275 mW J (SN5510_A,B) 1375 mW 11.0 mW/C 880 mW 275 mW J (SN7510_A,B) 1025 mW 8.2 mW/C 656 mW -- N 1150 mW 9.2 mW/C 736 mW -- W 1000 mW 8.0 mW/C 640 mW 200 mW recommended operating conditions (see Note 6) SN55107A,, SN55107B SN55108A, SN55108B SN75107A,, SN75107B SN75108A, SN75108B UNIT MIN NOM MAX MIN NOM Supply voltage, VCC + 4.5 5 5.5 4.75 5 5.25 V Supply voltage, VCC - - 4.5 -5 - 5.5 - 4.75 -5 - 5.25 V 5 0.025 -5 5 V - 0.025 - 0.025 V Common-mode input voltage, VIC (see Notes 7 and 8) -3 3 -3 3 V Input voltage, any differential input to GND (see Note 8) -5 3 -5 3 V High-level input voltage at strobe inputs, VIH(S) 2 5.5 2 5.5 V Low-level input voltage at strobe inputs, VIL(S) 0 0.8 0 High-level input voltage between differential inputs, VIDH (see Note 7) Low-level input voltage between differential inputs, VIDL (see Note 7) 0.025 -5 Low-level output current, IOL - 16 MAX 0.8 V - 16 mA Operating free-air temperature, TA - 55 125 0 70 C The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for input voltage levels only. NOTES: 6. When using only one channel of the line receiver, the strobe G of the unused channel should be grounded and at least one of the differential inputs of the unused receiver should be terminated at some voltage between - 3 V and 3 V. 7. The recommended combinations of input voltages fall within the shaded area in Figure 1. 8. The common-mode voltage may be as low as - 4 V provided that the more positive of the two inputs is not more negative than - 3 V. 2-4 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN55107A, SN55107B, SN55108A, SN55108B SN75107A, SN75107B, SN75108A, SN75108B DUAL LINE RECEIVERS SLLS069B - JANUARY 1977 - REVISED MAY 1995 RECOMMENDED COMBINATIONS OF INPUT VOLTAGES 3 Input A to GND Voltage - V 2 1 0 -1 -2 -3 -4 -5 -5 -4 -3 -2 -1 0 1 2 3 Input B to GND Voltage - V Figure 1. Recommended Combinations of Input Voltages POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 2-5 SN55107A, SN55107B, SN55108A, SN55108B SN75107A, SN75107B, SN75108A, SN75108B DUAL LINE RECEIVERS SLLS069B - JANUARY 1977 - REVISED MAY 1995 electrical characteristics over recommended free-air temperature range (unless otherwise noted) '107A, '107B TEST CONDITIONS PARAMETER MIN VOH High level output voltage High-level VCC = MIN, VIL(S) = 0.8 V, VIDH = 25 mV mV, IOH = - 400 A A, VIC = - 3 V to 3 V VOL Low level output voltage Low-level VCC = MIN, VIH(S) = 2 V, VIDL = - 25 mV mV, IOL = 16 mA, mA VIC = - 3 V to 3 V IIH High-level g input current B IIL Low-level input current B IIH A TYP '108A, '108B MAX MIN TYP MAX 24 2.4 UNIT V 04 0.4 04 0.4 VCC = MAX VID = 5 V VID = - 5 V VCC = MAX VID = - 5 V VID = 5 V - 10 - 10 - 10 - 10 High-level input current g into 1G or 2G VCC = MAX, VCC = MAX, VIH(G) = 2.4 V VIH(G) = MAX VCC + 40 40 A 1 1 mA IIL Low-level input current into 1G or 2G VCC = MAX MAX, VIL(G) = 0 0.4 4V - 1.6 16 - 1.6 16 mA IIH High-level g input current into S VCC = MAX, VCC = MAX, VIH(S) = 2.4 V VIH(S) = MAX VCC + 80 80 A 2 2 mA IIL Low-level input current into S VCC = MAX MAX, VIL(S)= 0 0.4 4V - 3.2 32 - 3.2 32 mA IOH High-level g output current VCC = MIN MIN, VOH = MAX VCC + 250 A IOS Short-circuit output current VCC = MAX ICCH + Supply y current from VCC +, outputs high VCC = MAX MAX, TA = 25C 18 30 18 30 mA ICCH - Supply current from VCC -, outputs high VCC = MAX, TA = 25C - 8.4 - 15 - 8.4 - 15 mA A 30 75 30 75 30 75 30 75 V - 18 - 70 A A mA For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. All typical values are at VCC + = 5 V, VCC - = - 5 V, TA = 25C. Not more than one output should be shorted at a time. switching characteristics, VCC = 5 V, TA = 25C, RL = 390 (see Figure 2) TEST CONDITIONS PARAMETER '107A, '107B MIN TYP MAX 25 tPLH(D) Propagation g delay y time,, low- to high-level g output,, from differential inputs A and B CL = 50 pF CL = 15 pF 17 tPHL(D) Propagation g delay y time,, highg to low-level output,, from differential inputs A and B CL = 50 pF CL = 15 pF 17 tPLH(S) Propagation g delay y time,, low- to high-level g output,, from strobe input G or S CL = 50 pF 10 tPHL(S) Propagation g delay y time, highg to low-level output, from strobe input G or S 2-6 '108A, 108B CL = 15 pF POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 8 TYP MAX 19 25 19 25 13 20 13 20 25 15 CL = 15 pF CL = 50 pF MIN 15 UNIT ns ns ns ns SN55107A, SN55107B, SN55108A, SN55108B SN75107A, SN75107B, SN75108A, SN75108B DUAL LINE RECEIVERS SLLS069B - JANUARY 1977 - REVISED MAY 1995 PARAMETER MEASUREMENT INFORMATION Differential Input Output `107A, `107B VCC - 1A 1Y 1B Pulse Generator (see Note A) CL 50 pF (see Note C) 50 V ref 100 mV (see Note D) 2A 2B 2Y 390 1G S VCC+ 2G 390 Output `108A, `108B CL 15 pF (see Note C) 50 Strobe Input (see Note B) Pulse Generator (see Note A) TEST CIRCUIT 200 mV Input A 100 mV 100 mV 0V t p1 t p2 3V 1.5 V Strobe Input G or S t PHL(D) t PLH(D) 1.5 V t PHL(S) t PLH(S) VOH Output Y 1.5 V 1.5 V 1.5 V 1.5 V VOL VOLTAGE WAVEFORMS NOTES: A. The pulse generators have the following characteristics: ZO = 50 , tr = 10 5 ns, tf = 10 5 ns, tpd1 = 500 ns, PRR 1 MHz, tpd2 = 1 s, PRR 500 kHz. B. Strobe input pulse is applied to Strobe 1G when inputs 1A-1B are being tested, to Strobe S when inputs 1A-1B or 2A-2B are being tested, and to Strobe 2G when inputs 2A-2B are being tested. C. CL includes probe and jig capacitance. D. All diodes are 1N916. Figure 2. Test Circuit and Voltage Waveforms POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 2-7 SN55107A, SN55107B, SN55108A, SN55108B SN75107A, SN75107B, SN75108A, SN75108B DUAL LINE RECEIVERS SLLS069B - JANUARY 1977 - REVISED MAY 1995 TYPICAL CHARACTERISTICS OUTPUT VOLTAGE vs DIFFERENTIAL INPUT VOLTAGE HIGH-LEVEL INPUT CURRENT (1A OR 2A) vs FREE-AIR TEMPERATURE 100 6 VCC = 5 V IIIH IH - High-Level Input Current - A '108A, '108B VO VO - Output Voltage - V 5 AA AA Noninverting Inputs Inverting Inputs 4 '107A, '107B 3 2 1 VCC = 5 V RL = 400 TA = 25 C 0 - 40 - 30 - 20 - 10 0 10 20 30 80 60 40 20 0 - 75 40 - 50 - 25 Figure 3 50 75 100 125 Figure 4 PROPAGATION DELAY TIME (DIFFERENTIAL INPUTS) vs FREE-AIR TEMPERATURE SUPPPLY CURRENT (OUTPUTS HIGH) vs FREE-AIR TEMPERATURE 40 30 VCC = 5 V VCC = 5 V 35 25 t pd - Propagation Delay Time - ns | I CCH |- Supply Current - mA 25 TA - Free-Air Temperature - C VID - Differential Input Voltage - mV ICC + 20 15 10 ICC - 5 0 - 75 - 50 - 25 0 25 50 75 100 125 30 RL = 390 CL = 50 pF 25 20 tPLH(D) 15 tPHL(D) 10 5 0 - 75 - 50 - 25 0 25 Figure 5 Figure 6 Values below 0C and above 70C apply to SN55' only. POST OFFICE BOX 655303 50 75 100 TA - Free-Air Temperature - C TA - Free-Air Temperature - C 2-8 0 * DALLAS, TEXAS 75265 125 SN55107A, SN55107B, SN55108A, SN55108B SN75107A, SN75107B, SN75108A, SN75108B DUAL LINE RECEIVERS SLLS069B - JANUARY 1977 - REVISED MAY 1995 TYPICAL CHARACTERISTICS PROPAGATION DELAY TIME (LOW-TO-HIGH LEVEL) (DIFFERENTIAL INPUTS) vs FREE-AIR TEMPERATURE PROPAGATION DELAY TIME (LOW-TO-HIGH LEVEL) (DIFFERENTIAL INPUTS) vs FREE-AIR TEMPERATURE 40 VCC = 5 V CL = 15 pF ttPLH(D) PLH(D) - Propagation Delay Time - ns ttPLH(D) PLH(D) - Propagation Delay Time - ns 120 100 RL = 3900 80 60 RL = 1950 40 20 0 - 75 RL = 390 - 50 - 25 0 25 50 75 100 VCC = 5 V CL = 15 pF 35 30 RL = 390 25 20 15 RL = 1950 RL = 3900 10 5 0 - 75 125 - 50 - 25 TA - Free-Air Temperature - C 0 50 75 100 125 TA - Free-Air Temperature - C Figure 7 Figure 8 '108A, '108B '108A, '108B PROPAGATION DELAY TIME (STROBE INPUTS) vs FREE-AIR TEMPERATURE PROPAGATION DELAY TIME (STROBE INPUTS) vs FREE-AIR TEMPERATURE 40 40 35 VCC = 5 V RL = 390 CL = 50 pF 35 t pd - Propagation Delay Time - ns t pd - Propagation Delay Time - ns 25 30 25 20 15 tPHL(S) 10 5 0 - 75 tPLH(S) - 50 VCC = 5 V RL = 390 CL = 15 pF 30 25 20 tPLH(S) 15 10 tPHL(S) 5 - 25 0 25 50 75 100 125 0 - 75 - 50 - 25 0 25 50 75 100 125 TA - Free-Air Temperature - C TA - Free-Air Temperature - C Figure 9 Figure 10 Values below 0C and above 70C apply to SN55' only. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 2-9 SN55107A, SN55107B, SN55108A, SN55108B SN75107A, SN75107B, SN75108A, SN75108B DUAL LINE RECEIVERS SLLS069B - JANUARY 1977 - REVISED MAY 1995 APPLICATION INFORMATION basic balanced-line transmission system The '107A, '107B, '108A, and '108B dual line circuits are designed specifically for use in high-speed data transmission systems that utilize balanced terminated transmission lines such as twisted-pair lines. The system operates in the balanced mode, so noise induced on one line is also induced on the other. The noise appears common mode at the receiver input terminals where it is rejected. The ground connection between the line driver and receiver is not part of the signal circuit so that system performance is not affected by circulating ground currents. The unique driver-output circuit allows terminated transmission lines to be driven at normal line impedances. High-speed system operation is ensured since line reflections are virtually eliminated when terminated lines are used. Crosstalk is minimized by low signal amplitudes and low line impedances. The typical data delay in a system is approximately 30 + 1.3 L ns, where L is the distance in feet separating the driver and receiver. This delay includes one gate delay in both the driver and receiver. Data is impressed on the balanced-line system by unbalancing the line voltages with the driver output current. The driven line is selected by appropriate driver-input logic levels. The voltage difference is approximately: VDIFF 1/2IO(on) * RT High series line resistance will cause degradation of the signal. The receivers, however, will detect signals as low as 25 mV (or less). For normal line resistances, data may be recovered from lines of several thousand feet in length. Line-termination resistors (RT) are required only at the extreme ends of the line. For short lines, termination resistors at the receiver only may prove adequate. The signal amplitude will then be approximately: VDIFF IO(on) * RT RT RT RT RT A Data Input Transmission Line Having Characteristic Impedance ZO RT = ZO/2 B Y C Inhibit D L Driver SN55109A, SN55110A, SN75109A, SN75110A, SN75112 Strobes Receiver `107A, `107B, `108A, `108B Figure 11. Typical Differential Data Line data-bus or party-line system The strobe feature of the receivers and the inhibit feature of the drivers allow these dual line circuits to be used in data-bus or party-line systems. In these applications, several drivers and receivers may share a common transmission line. An enabled driver transmits data to all enabled receivers on the line while other drivers and receivers are disabled. Data is thus time multiplexed on the transmission line. The device specifications allow widely varying thermal and electrical environments at the various driver and receiver locations. The data-bus system offers maximum performance at minimum cost. 2-10 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN55107A, SN55107B, SN55108A, SN55108B SN75107A, SN75107B, SN75108A, SN75108B DUAL LINE RECEIVERS SLLS069B - JANUARY 1977 - REVISED MAY 1995 APPLICATION INFORMATION Drivers SN55109A, SN55110A, SN75109A, SN75110A, SN75112 Receiver 1 Receiver 2 Receiver 4 Y Y Strobes RT Strobes Y Strobes RT RT RT Location 2 A Driver 1 Driver 3 Data Input B C Inhibit D A B B C C D Location 1 Driver 4 A Location 3 D Receivers `107A, `107B, `108A, `108B Location 4 Figure 12. Typical Differential Party Line unbalanced or single-line systems These dual-line circuits may also be used in unbalanced or single-line systems. Although these systems do not offer the same performance as balanced systems for long lines, they are adequate for very short lines where environmental noise is not severe. The receiver threshold level is established by applying a dc reference voltage to one receiver input terminal. The signal from the transmission line is applied to the remaining input. The reference voltage should be optimized so that signal swing is symmetrical about it for maximum noise margin. The reference voltage should be in the range of - 3 V to 3 V. It can be provided by a voltage supply or by a voltage divider from an available supply voltage. A single-ended output from a driver may be used in single-line systems. Coaxial or shielded line is preferred for minimum noise and crosstalk problems. For large signal swings, the high output current (typically 27 mA) of the SN75112 is recommended. Drivers may be paralleled for higher current. When using only one channel of the line drivers, the other channel should be inhibited and/or have its outputs grounded. SN55109A, SN55110A, SN75109A, SN75110A, SN75112 `107A, `107B, `108A, `108B R Input Output A B Inhibit C D Input Vref Output Strobes VO = - IO * R Figure 13. Single-Ended Operation POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 2-11 SN55107A, SN55107B, SN55108A, SN55108B SN75107A, SN75107B, SN75108A, SN75108B DUAL LINE RECEIVERS SLLS069B - JANUARY 1977 - REVISED MAY 1995 APPLICATION INFORMATION '108A, '108B dot-AND output connections `108A, `108B The '108A, '108B line receivers feature an open-collector-output circuit that can be connected in the dot-AND logic configuration with other similar open-collector outputs. This allows a level of logic to be implemented without additional logic delay. `108A, `108B Output Dot-AND Connection SN5401/SN7401 or Equivalent increasing common-mode input voltage range of receiver Figure 14. Dot-AND Connection The common-mode voltage range (CMVR) is defined as the range of voltage applied simultaneously to both input terminals that if exceeded does not allow normal operation of the receiver. The recommended operating CMVR is 3 V, making it useful in all but the noisiest environments. In extremely noisy environments, common-mode voltage can easily reach 10 V to 15 V if some precautions are not taken to reduce ground and power supply noise, as well as crosstalk problems. When the receiver must operate in such conditions, input attenuators should be used to decrease the system common-mode noise to a tolerable level at the receiver inputs. Differential noise is also reduced by the same ratio. These attenuators have been intentionally omitted from the receiver input terminals so the designer may select resistors that will be compatible with his particular application or environment. Furthermore, the use of attenuators adversely affects the input sensitivity, the propagation delay time, the power dissipation, and in some cases (depending on the selected resistor values) the input impedance, therefore, reducing the versatility of the receiver. The ability of the receiver to operate with approximately 15 V common-mode voltage at the inputs has been checked using the circuit shown in Figure 15. The resistors R1 and R2 provide a voltage divider network. Dividers with three different values presenting a 5-to-1 attenuation were used so as to operate the differential inputs at approximately 3 V common-mode voltage. Careful matching of the two attenuators is needed so as to balance the overdrive at the input stage. The resistors used are shown in Table 1. Table 2 shows some of the typical switching results obtained under such conditions. Table 1 Attenuator 1: R1 = 2 k, R2 = 0.5 k Attenuator 2: R1 = 6 k, R2 = 1.5 k Attenuator 3: R1 = 12 k, R2 = 3 k Table 2. Typical Propagation Delays for Receiver With Attenuator Test Circuit Shown in Figure 14 DEVICE PARAMETERS tPLH '107A,'107B tPHL tPLH '108A,'108B tPHL 2-12 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 INPUT ATTENUATOR TYPICAL (ns) 1 2 3 1 2 3 1 2 3 1 2 3 20 32 42 22 31 33 36 47 57 29 38 41 SN55107A, SN55107B, SN55108A, SN55108B SN75107A, SN75107B, SN75108A, SN75108B DUAL LINE RECEIVERS SLLS069B - JANUARY 1977 - REVISED MAY 1995 APPLICATION INFORMATION 5V 16 V Receiver One Attenuator on Each Input RL = 390 or - 14 V 14 V R1 R2 - 16 V 5 V 15 V or - 15 V R1 R2 Figure 15. Common-Mode Circuit for Testing Input Attenuators With Results Shown In Table 2 Two methods of terminating a transmission line to reduce reflections are: R1 R1 Method 1 Method 2 R3 R2 R3 R2 R3 R3 R3 R1 R2 R3 R2 R1 R3 = R1 + R2 = ZO /2 R1 + R2 > ZO R3 = ZO /2 Figure 16. Termination Techniques The first method uses the resistors as the attenuation network and line termination. The second method uses two additional resistors for the line terminations. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 2-13 SN55107A, SN55107B, SN55108A, SN55108B SN75107A, SN75107B, SN75108A, SN75108B DUAL LINE RECEIVERS SLLS069B - JANUARY 1977 - REVISED MAY 1995 APPLICATION INFORMATION For party-line operation, method 2 should be used as follows: Attenuation Network R3 + Z2O R3 + Z2O R3 + Z2O R3 + Z2O Figure 17. Party-Line Termination Technique To minimize the loading, the values of R1 and R2 should be fairly large. Examples of possible values are shown in Table 1. furnace control using the SN75108A The furnace control circuit in Figure 18 is an example of the possible use of the SN55107A Series in areas other than what would normally be considered electronic systems. Basically, a description of the operation of this control follows. When the room temperature is below the desired level, the resistance of the room temperature sensor is high and channel 1 noninverting input is below (less positive than) the reference level set on the input differential amplifier. This situation causes a low output, operating the heat on relay and turning on the heat. The channel 2 noninverting input is below the reference level when the bonnet temperature of the furnace reaches the desired level. This causes a low output thus operating the blower relay. Normally the furnace is shut down when the room temperature reaches the desired level and the channel 1 output goes high, turning the heat off. The blower remains on as long as the bonnet temperature is high, even after the heat on relay is off. There is also a safety switch in the bonnet that shuts the furnace down if the temperature there exceeds desired limitations. The types of temperature-sensing devices and bias-resistor values used are determined by the particular operating conditions encountered. 5V Bonnet Temp. Sensor +T Room Temp. Sensor Bonnet Upper Limit Switch -T Channel 1 1Y A Room Temp. Setting B 2Y 2A Blower on Control 2B Channel 2 Figure 18. Furnace Control Using SN75108A 2-14 To Heat on Relay Return POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 To Blower Relay Return SN55107A, SN55107B, SN55108A, SN55108B SN75107A, SN75107B, SN75108A, SN75108B DUAL LINE RECEIVERS SLLS069B - JANUARY 1977 - REVISED MAY 1995 APPLICATION INFORMATION repeaters for long lines In some cases, the driven line may be so long that the noise level on the line reaches the common-mode limits or the attenuation becomes too large and results in poor reception. In such a case, a simple application of a receiver and a driver as repeaters [shown in Figure 19(a)] restores the signal level and allows an adequate signal level at the receiving end. If multichannel operation is desired, then proper gating for each channel must be sent through the repeater station using another repeater set as in Figure 19(b). Repeaters Data In Driver P Data In Driver Receiver Driver Driver P Clock In Strobe Ckt Data Out Receiver Data Out P (a) SINGLE-CHANNEL LINE Receiver Receiver P Driver Receiver Receiver P P (b) MULTICHANNEL LINE WIDTH WITH STROBE Figure 19. Receiver-Driver Repeaters receiver as dual differential comparator There are many applications for differential comparators, such as voltage comparison, threshold detection, controlled Schmitt triggering, and pulse-width control. As a differential comparator, a '107A or '108A may be connected to compare the noninverting input terminal with the inverting input as shown in Figure 20. Thus the output will be high or low resulting from the A input being greater or less than the reference. The strobe inputs allow additional control over the circuit so that either output or both may be inhibited. Strobe 1 1A Reference 1 Output 1 1B Strobe 1, 2 2A Output 2 Reference 2 2B Strobe 2 Figure 20. SN55107A Series Receiver as a Dual Differential Comparator POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 2-15 SN55107A, SN55107B, SN55108A, SN55108B SN75107A, SN75107B, SN75108A, SN75108B DUAL LINE RECEIVERS SLLS069B - JANUARY 1977 - REVISED MAY 1995 APPLICATION INFORMATION window detector The window detector circuit in Figure 21 has a large number of applications in test equipment and in determining upper limits, lower limits, or both at the same time - such as detecting whether a voltage or signal has exceeded its limits or window. Illumination of the upper-limit (lower-limit) indicator shows that the input voltage is above (below) the selected upper (lower) limit. A mode selector is provided for selecting the desired test. For window detecting, the upper and lower limits test position is used. 5 V -5 V 1 k 5V 1 k 500 Set Upper Limit 5 k 500 Input From Test Point Set Lower Limit 1 k 4 3 4.7 k 2 4.7 k 4.7 k 1 Mode Selector MODE SELECTOR LEGEND POSITION 1 2 3 4 CONDITION Off Test for Upper Limit Test for Lower Limit Test for Upper and Lower Limits Figure 21. Window Detector Using SN75108A 2-16 Upper-Limit Indicator POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 Lower-Limit Indicator SN55107A, SN55107B, SN55108A, SN55108B SN75107A, SN75107B, SN75108A, SN75108B DUAL LINE RECEIVERS SLLS069B - JANUARY 1977 - REVISED MAY 1995 APPLICATION INFORMATION temperature controller with zero-voltage switching The circuit in Figure 22 switches an electric-resistive heater on or off by providing negative-going pulses to the gate of a triac during the time interval when the line voltage is passing through zero. The pulse generator is the 2N5447 and four diodes. This portion of the circuit provides negative-going pulses during the short time (approximately 100 s) when the line voltage is near zero. These pulses are fed to the inverting input of one channel of the '108A. If the room temperature is below the desired level, the resistance of the thermistor is high and the noninverting input of channel 2 is above the reference level determined by the thermostat setting. This provides a high-level output from channel 2. This output is ANDed with the positive-going pulses from the output of channel 1, which are reinverted in the 2N5449. 250 F + 10-V Zener 5-V Zener `108A VCC + 1A 1B 2N5447 VCC - 250 F + Channel 1 Channel 2 2A 2B 120 V to 220 V, 60 Hz -T GND 2N5449 Thermostat Setting Heater Load Figure 22. Zero-Voltage Switching Temperature Controller POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 2-17 2-18 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. 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