PC740A and 750APowerPC™ Microprocessors
Fact Sheet
The PowerPC 750 and PowerPC740 microprocessors are low-power 32-bit implementations of the PowerPC Reduced
Instruction Set Computer (RISC) architecture. The PowerPC 750 and the PowerPC 740 micro-processors differ only in that
the PowerPC 750 features a dedicated L2 cache interface with on-chip L2 tags.
Both are software-compatible and bus-compatible with the PowerPC603eTM micro-processor families, and the PowerPC
740 is pin-compatible as well. PowerPC 750/740 micro-processors are fully JTAG-compliant.
PC740/750 Main Features
nSix independent execution units :
-Two integer units
-Floating-point unit
-Branch processing unit
-Load/store unit
-System register unit
nCache and MMU Support
-32-Kbytes, physically-addressed instruction and data cache
-8-way set -associative
-Dedicated L2 cache interface with on-chip L2 tags (PC750, only)
-Separate Instruction and Data MMUs
-Virtual memory support up to 4 Petabytes (252)
-Real memory support up to 4 Gigabytes (252)
-128-entry instruction and data TLBs
PC740A/PC750AFS -Rev.1 –01/11
Completion
Unit Dispatch
Unit
Branch
Unit
Integer
Unit
Gen
Reg
File
Load/
Store
Unit
I MMU
D MMU
Data Cache Inst. Cache
Bus Interface Unit
System Bus
32bit
Address
Gen
Re-
name
64bit
Data
Floating
Point
Unit
FPU
Reg
File
L2 Data Bus
L2 Cache
Port (750 only)
L2
tags
nBus Interface
-Compatible with 60x processor interface
-32 bit address bus
-64-bit data bus
-11 Bus -to-Core frequency multipliers
nPower Management
-Low-power design
-3 static power saving modes : doze, nap and sleep
-Dynamic power management
-Integrated thermal management unit
nPackaging
-PC740 : 255 pin CBGA and CI-CGA
-PC750 : 360 pin CBGA and CI-CGA
nScreening
-CBGA upscreeningupon Atmel-Grenoble standards
-CI-CGA up to QML class Q
-Full military range (Tj= -55°C +125°C)
-Industrial temperature range (Tj= -40°C +85°C)
BP123 -38521 Saint-Egrève Cedex -France -Tel: +33 (0)4 76 58 30 00 -Fax: +33 (0)4 76 58 34 80
For additional information:
contact your local ATMEL-Grenoble representative
or visit our web site at http://www.atmel-grenoble.com
You may also contact the PowerPC technical hotline at std.hotline@atmel-grenoble.com
The PowerPC and PowerPC603e names and the PowerPC logotype are trademarks of
International Business Machines Corporation, used under license therefrom.
PC740A
200 - 266 MHz PC750A
200 - 266 MHz
Motorola Name MPC740PID8t MPC750PID8t
Die Revision 3.1 = H 3.1 = H
CPU Speeds -
Internal 200 MHz 200 MHz
233 MHz 233 MHz
266 MHz 266 MHz
CPU Bus Dividers 3x, 3.5x, 4x, 4.5x, 5x, 5.5x,
6x, 6.5x, 7x, 7.5x, 8x
3x, 3.5x, 4x, 4.5x, 5x, 5.5x,
6x, 6.5x, 7x, 7.5x, 8x
Bus Interface 32-bit address, 64-bit data
32-bit
address, 64-bit data
Instructions per
Clock 3 (2+Branch) 3 (2+Branch)
L1 Cache 32-KB Instruction and Data
32-KB Instruction
and Data
L2 Cache -256KB, 512KB, 1MB
Core-to-L2
Frequency
Divisions -1:1, 1.5:1, 2:1, 2.5:1, 3:1
Typ/Max Power
Dissipation 5.7W/7.9W @ 266 MHz 5.7W/7.9W @ 266 MHz
Die Size 67 mm² 67 mm²
255-pin Flip-Chip CBGA 360-pin Flip-Chip CBGAPackage 255-pin Flip-Chip CI-CGA
360-pin
Process 0.29µ CMOS, 5LM 0.29µ CMOS, 5LM
3.3V I/O 3.3V I/O
Voltage 2.6V internal 2.6V internal
SPECint95
(estimated) 11.5 @ 266 MHz 12.0 @ 266 MHz
SPECfp95 (
estimated)
6.9 @ 266 MHz 7.4 @ 266 MHz
Other Performance 488 MIPS @ 266 MHz 488 MIPS @ 266 MHz
Status Active Active
Samples Now Now
Production Now Now
Integer (2) Integer (2)
Floating Point Unit Floating Point Unit
Branch Unit Branch Unit
Load/Store Unit Load/Store Unit
Execution Units
System Register System Register
Screening level:
-- : Standard
B/Q: MIL-STD-883, class Q
B/T: according to MIL-STD-883
U: Upscreening
U/T: Upscreening+ burn-in
TS (X) PC750A MGU/T 8x
Prefix
Prototype
Type
Temperature range : Tc
M: -55, +125°C
V: -40, +110°C
Package:
G : CBGA
GS: CI-CGA
Bus divider
(to be confirmed)
L: Any valid PLL configuration
Revision level
Max internal processor speed
8: 200 MHz
10: 233 MHz
12: 266 MHz
L
Rev E: Rev.2.2 obsolete
H: Rev 3.1