www.irf.com © 2007 International Rectifier
March 11, 2011
Automotive Grade
AUIRS2092S
PROTECTED DIGITAL AUDIO AMPLIFIER
Features
Integrated analog input Class D audio amplifier
driver in a small 16 pin package
Floating inputs enable easy half bridge
implementation
Programmable bidirectional over-current
protection with self-reset function
Programmable preset deadtime for improved
THD performances
Start and stop click noise reduction
High noise immunity
±100 V ratings deliver up to 500 W in output
power
Operates up to 800 kHz
Leadfree, RoHS compliant
Automotive Qualified
Typical Applications
Automotive mini component stereo systems
Automotive powered speaker systems
Automotive audio power amplifiers
Product Summary
VOFFSET (max) ± 100 V
Io+ (typical) 1.0 A
Gate driver Io – (typical) 1.2 A
Selectable Deadtime 25/40/65/105 ns
OC protection delay (max) 500 ns
DC offset <20 mV
PWM frequency ~800 kHz
Error amplifier open loop gain >60 dB
THD+N* (1kHz, 50W, 4) 0.01 %
Residual Noise*
(AES-17 Filter) 200 µVrms
* measured with recommended circuit
Package Options
SOIC-16L Narrow Body
Typical Connection Diagram
AUIRS2092
12V
VAA
GND
IN-
OCSET
COM
COMP
VSS LO
VCC
VREF
HO
VS
CSD
CSH
VB
INPUT
-B
Vcc
+B
Speaker
DT
2
161
4
3
5
6
7
8
15
14
13
12
11
10
9
AUIRS2092S
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2
Table of Contents Page
Description 3
Simplified Block Diagram 4
Typical Application Diagram 4
Qualification Information 5
Absolute Maximum Ratings 6
Recommended Operating Conditions 7
Electrical Characteristics 8-10
Waveform Definitions 11
Functional Block Diagram 12
Input/Output Pin Equivalent Circuit Diagram 13
Lead Definitions 14
Lead Assignments 14
Parameter Temperature Trends 15-19
Package Details 19
Tape and Reel Details 20
Part Marking Information 21
Ordering Information 21
AUIRS2092S
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3
Description
The AUIRS2092 is a high voltage, high performance Class D audio amplifier driver with PWM modulator and
protection. In conjunction with two external MOSFET and a few external components, a complete Class D audio
amplifier with protection can be realized.
International Rectifier’s proprietary noise isolation technology allows high current gate drive stage and high speed
low noise error amplifier reside on a single small silicon die.
Open elements of PWM modulator section allow flexible PWM topology implementation.
AUIRS2092S
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4
Simplified Block Diagram
Typical Application Diagram
1 k
4.7
Refer to IRAUDAMP5 reference design for details.
AUIRS2092S
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5
Qualification Information
Automotive
(per AEC-Q100††)
Qualification Level Comments: This family of ICs has passed an Automotive
qualification. IR’s Industrial and Consumer qualification level
is granted by extension of the higher Automotive level.
Moisture Sensitivity Level SOIC16N MSL3††† 260°C
(per IPC/JEDEC J-STD-020)
Machine Model Class M2 (+/-150V)
(per AEC-Q100-003)
Human Body Model Class H1B (+/-750V)
(per AEC-Q100-002)
ESD
Charged Device Model Class C3A (+/-750V)
(per AEC-Q100-011)
IC Latch-Up Test Class II, Level B ††††
(per AEC-Q100-004)
RoHS Compliant Yes
Qualification standards can be found at International Rectifier’s web site http://www.irf.com/
†† Exceptions to AEC-Q100 requirements are noted in the qualification report.
††† Higher MSL ratings may be available for the specific package types listed here. Please contact your
International Rectifier sales representative for further information.
†††† CSD pin stressed to +/-20mA, CSH pin stressed to +/-40mA, DT and OCSET pins stressed to +/-20mA
AUIRS2092S
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Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM lead. Stresses beyond those listed under "
Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only; and
functional operation of the device at these or any other condition beyond those indicated in the “Recommended
Operating Conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may
affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted
and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified.
Symbol Definition Min Max Units
VB High side floating supply voltage -0.3 220
VS High side floating supply voltage (Note2) VB -20 VB +0.3
VHO High side floating output voltage VS -0.3 VB +0.3
VCSH CSH pin input voltage VS -0.3 VB +0.3
VCC Low side fixed supply voltage (Note2) -0.3 20
VLO Low side output voltage -0.3 Vcc+0.3
VAA Floating input positive supply voltage (Note2) (See IAAZ) 210
VSS Floating input negative supply voltage (Note2) -1
(See ISSZ) GND +0.3
VGND Floating input supply ground voltage
VSS -0.3
(See ISSZ) VAA +0.3
(See IAAZ)
V
IIN- Inverting input current (Note1) --- ±3 mA
VCSD SD pin input voltage VSS -0.3 VAA +0.3
VCOMP COMP pin input voltage VSS -0.3 VAA +0.3
VDT DT pin input voltage -0.3 VCC +0.3
VOCSET OCSET pin input voltage -0.3 VCC+0.3
V
IAAZ Floating input positive supply zener clamp current (Note2) --- 20
ISSZ Floating input negative supply zener clamp current (Note2) --- 20
ICCZ Low side supply zener clamp current (Note3) --- 10
IBSZ Floating supply zener clamp current (Note3) --- 10
IOREF Reference output current --- 5
mA
dVS/dt Allowable Vs voltage slew rate --- 50 V/ns
dVSS/dt Allowable Vss voltage slew rate (Note3) --- 50 V/ms
Pd Maximum power dissipation @ TA +25°C --- 1.0 W
RthJA Thermal resistance, Junction to ambient --- 115 °C/W
TJ Junction Temperature --- 150 °C
TS Storage Temperature -55 150 °C
TL Lead temperature (soldering, 10 seconds) --- 300 °C
Note1: IN- contains clamping diode to GND.
Note2: VDD – IN+, GND -VSS, VCC-COM and VB-VS contain internal shunt zener diodes. Please note that the
voltage ratings of these can be limited by the clamping current.
Note3: For the rising and falling edges of step signal of 10 V. VSS=15 V to 200 V.
AUIRS2092S
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Recommended Operating Conditions
For proper operation, the device should be used within the recommended conditions below. The Vs and COM offset ratings are
tested with supplies biased at VAA-VSS=10 V, VCC=12 V and VB-VS=12 V. All voltage parameters are absolute voltages referenced
to COM; all currents are defined positive into any lead.
Symbol Definition Min. Max. Units
VB High side floating supply absolute voltage VS +10 VS +18
VS High side floating supply offset voltage (Note 1) 200 V
IAAZ Floating input positive supply zener clamp current 1 11
ISSZ Floating input negative supply zener clamp current 1 11 mA
VSS Floating input supply absolute voltage 0 200
VHO High side floating output voltage Vs VB
VCC Low side fixed supply voltage 10 18
VLO Low side output voltage 0 VCC
VGND GND pin input voltage VSS (Note 3) V
AA (Note 3)
VIN- Inverting input voltage VGND -0.5 VGND +0.5
VCSD CSD pin input voltage VSS V
AA
VCOMP COMP pin input voltage VSS V
AA
V
CCOMP COMP pin phase compensation capacitor to GND 1 - nF
VDT DT pin input voltage 0 VCC V
IOREF Reference output current to COM (Note 2) 0.3 0.8 mA
VOCSET OCSET pin input voltage 0.5 5
VCSH CSH pin input voltage Vs VB V
dVss/dt Allowable Vss voltage slew rate upon power-up (Note4) - 50 V/ms
IPW Input pulse width 10 (Note 5) - ns
fSW Switching Frequency - 800 kHz
TA Ambient Temperature -40 125 °C
Note 1: Logic operational for Vs equal to –5 V to +200 V. Logic state held for Vs equal to –5 V to –VBS.
Note 2: Nominal voltage for VREF is 5.1 V. IOREF of 0.3 – 0.8 mA dictates total external resistor value on VREF to be 6.3 k to
16.7 k.
Note 3: GND input voltage is limited by IAAZ and ISSZ.
Note 4: VSS ramps up from 0 V to 200 V.
Note 5: Output logic status may not respond correctly if input pulse width is smaller than the minimum pulse width.
AUIRS2092S
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Electrical Characteristics
Unless otherwise noted, these specifications apply for an operating junction temperature range of -40°C Tj
125°C with bias conditions of VCC,VBS= 12 V, VSS=VS=COM=0 V, VAA=10 V, CL=1 nF.
Symbol Definition Min Typ Max Units Test Conditions
Low Side Supply
UVCC+ Vcc supply UVLO positive threshold 8.4 8.9 9.8
UVCC- Vcc supply UVLO negative threshold 8.2 8.7 9.4
UVCCHYS UVCC hysteresis - 0.2 -
V
IQCC Low side quiescent current - - 3 mA VDT=VCC
VCLAMPL Low side zener diode clamp voltage 19.6 20.4 21.6 V ICC=5 mA
High Side Floating Supply
UVBS+ High side well UVLO positive threshold 8.0 8.5 9.7
UVBS- High side well UVLO negative threshold 7.8 8.3 9.0
UVBSHYS UVBS hysteresis - 0.2 -
V
IQBS High side quiescent current - - 1 mA
ILKH High to Low side leakage current - - 50 µA VB=VS =200 V
VCLAMPH High side zener diode clamp voltage 19.6 20.4 21.6 V IBS=5 mA
Floating Input Supply
UVAA+
VA+, VA- floating supply UVLO positive
threshold from VSS 8.2 8.7 9.7 VSS =0 V, GND pin
floating
UVAA- VA+, VA- floating supply UVLO negative
threshold from VSS 7.7 8.2 9.0 VSS =0 V, GND pin
floating
UVAAHYS UVAA hysteresis - 0.5 -
V
VSS =0 V, GND pin
floating
IQAA0 Floating Input positive quiescent supply
current - 0.5 2 VAA=10 V, VSS =0 V,
VCSD =VSS
- 6.5 11
VAA=10 V, VSS =0 V,
VCSD =VAA, Tj = -
40C
- 8 11
VAA=10 V, VSS =0 V,
VCSD =VAA, Tj =
25C
IQAA1 Floating Input positive quiescent supply
current
- 9.5 12.5
VAA=10 V, VSS =0 V,
VCSD =VAA, Tj =
125C
- 6.5 11
mA
VAA=10 V, VSS =0 V,
VCSD =GND, Tj = -
40C
- 8 11
VAA=10 V, VSS =0 V,
VCSD =GND, Tj =
25C
IQAA2 Floating Input positive quiescent supply
current
- 9.5 12.5
VAA=10 V, VSS =0 V,
VCSD =GND, Tj =
125C
ILKM Floating input side to Low side leakage
current - - 50 µA
VAA=VSS=VGND=
100 V
VCLAMPM+ VAA floating supply zener diode clamp
voltage, positive, with respect to GND 6.0 7.0 8.0
IAA=5 mA, ISS=5 mA,
VGND=0 V,
VCSD =VSS
VCLAMPM- VSS floating supply zener diode clamp
voltage, negative, with respect to GND -8.0 -7.0 -6.0
V IAA=5 mA, ISS=5 mA,
VGND=0 V,
VCSD =VSS
Audio Input (VGND=0, VAA=5V, VSS=-5V)
-20 0 20 mV Tj = -40C
-15 0 15 mV Tj = 25C
VOS Input offset voltage
-18 0 18 mV Tj = 125C
IBIN Input bias current - - 40 nA
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BW Small signal bandwidth - 9 - MHz CCOMP=2 nF,
Rf=3.3 k
VCOMP OTA Output voltage VAA-1 - VSS+1 V
gm OTA transconductance - 100 - mS VIN-=10 mV
GV OTA gain 60 - - dB
VNrms OTA input noise voltage - 250 - mVrms
BW=20 kHz,
Resolution
BW=22 Hz
Fig.5
SR Slew rate - ±5 - V/us CCOMP=1 nF
CMRR Common-mode rejection ratio - 60 -
PSRR Supply voltage rejection ratio - 65 - dB
PWM comparator
VthPWM PWM comparator threshold in COMP - (VAA-VSS)/2 - V
fOTA COMP pin star-up local oscillation
frequency 0.7 1.0 1.3 MHz VCSD =GND
Protection
VREF Reference output voltage 4.8 5.1 5.5 IOREF =0.5 mA
VthOCL Low side OC threshold in Vs 1.1 1.2 1.3 OCSET=1.2 V,
Fig.6
VthOCH High side OC threshold in VCSH 1.1+ Vs 1.2+ Vs 1.3+ Vs Vs=200 V,
Vth1 CSD pin shutdown release threshold 0.62xVDD 0.70xVDD 0.78xVDD
Vth2 CSD pin self reset threshold 0.26xVDD 0.30xVDD 0.34xVDD
V
ICSD+ CSD pin discharge current 60 100 150 VCSD = VSS +5 V
ICSD- CSD pin charge current 60 100 150 µA VCSD = VSS +5 V
tSD Shutdown propagation delay from VCSD >
VSS + VthOCH to Shutdown - - 250
tOCH Propagation delay time from VCSH >
VthOCH to Shutdown - - 650 Fig.3
tOCL Propagation delay time from Vs> VthOCL
to Shutdown - - 650
ns
Fig.4
Gate Driver
Io+ Output high short circuit current (Source) - 1.0 - A Vo=0 V, PW<10 µs
Io- Output low short circuit current (Sink) - 1.2 - A Vo=12 V, PW<10 µs
VOL Low level out put voltage
LO – COM, HO - VS - - 0.1
VOH High level out put voltage
VCC – LO, VB - HO - - 2.3
V Io=2 mA
ton High and low side turn-on propagation
delay - 360 - VDT = VCC
toff High and low side turn-off propagation
delay - 335 - VDT = VCC
tr Turn-on rise time - 20 50
tf Turn-off fall time - 15 35
5 20 35 VDT>VDT1,
Tj = -40C
15 25 35 VDT>VDT1,
Tj = 25C
DT1
Deadtime: LO turn-off to HO turn-on
(DTLO-HO) & HO turn-off to LO turn-on
(DTHO-LO)
20 35 50 VDT>VDT1,
Tj = 125C
20 35 55 VDT1>VDT> VDT2,
Tj = -40C
25 40 55 VDT1>VDT> VDT2,
Tj = 25C
DT2
Deadtime: LO turn-off to HO turn-on
(DTLO-HO) & HO turn-off to LO turn-on
(DTHO-LO)
30 50 70 VDT1>VDT> VDT2,
Tj = 125C
40 65 95 VDT2>VDT> VDT3,
Tj = -40C
DT3 Deadtime: LO turn-off to HO turn-on
(DTLO-HO) & HO turn-off to LO turn-on
(DTHO-LO) 50 65 85
ns
VDT2>VDT> VDT3,
Tj = 25C
AUIRS2092S
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50 80 105 VDT2>VDT> VDT3,
Tj = 125C
65 110 150 VDT3>VDT> VDT4,
Tj = -40C
85 105 135 VDT3>VDT> VDT4,
Tj = 25C
DT4
Deadtime: LO turn-off to HO turn-on
(DTLO-HO) & HO turn-off to LO turn-on
(DTHO-LO)VDT= VDT4
80 115 155 VDT3>VDT> VDT4,
Tj = 125C
VDT1 DT mode select threshold 2 0.51xVcc 0.57xVcc 0.63xVcc
VDT2 DT mode select threshold 3 0.32xVcc 0.36xVcc 0.40xVcc
VDT3 DT mode select threshold 4 0.21xVcc 0.23xVcc 0.25xVcc
V
AUIRS2092S
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Waveform Definitions
Vth1
tSD
90%
CSD
HO/LO
Figure 1: Switching Time Waveform Definitions Figure 2: CSD to Shutdown Waveform Definitions
VthOCL
tOCL
90%
VS
LO
VthOCH
tOCH
90%
CSH
HO
VS
Figure 3: VS > VthOCL to Shutdown Waveform Figure 4: VCSH > VthOCH to Shutdown Waveform
Figure 5: OTA input noise voltage mesurent circuit
AUIRS2092S
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Functional Block Diagram: AUIRS2092
HIGH
SIDE
CS
VB
HO
VS
IN-
LOW SIDE CS
CSD
UV
Q
UV
DETECT
DEAD TIME
VCC
LO
COM
VAA
GND
COMP
VSS
`
CSH
PROTECTION
CONTROL
SD
VREF
UV
DETECT
UV
DETECT
CHARGE/
DISCHARGE
HV
LEVEL
SHIFT
HV
LEVEL
SHIFT
HV
LEVEL
SHIFT
FLOATING INPUT
FLOATING HIGH SIDE
HV
LEVEL
SHIFT
HV
LEVEL
SHIFT
5V REG
OCSET
DT
DT
OTA
`
VAA+VSS
2COMP
PWM MODULATOR
CLICK NOISE
ELLIMINATION
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Input/Output Pin Equivalent Circuit Diagrams: AUIRS2092
ESD
Diode
ESD
Diode
VB
HO
VS
ESD
Diode
ESD
Diode
LO
COM
200 V
20 V
Clamp
20 V
Clamp
VCC
VCC
ESD
Diode
ESD
Diode
VAA
COMP
or CSD
VSS
ESD
Diode
ESD
Diode
VCC
DT, VREF
or
OCSET
COM
AUIRS2092S
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Lead Definitions: AUIRS2092
Pin # Symbol Description
1 VAA Floating input positive supply
2 GND Floating input supply return
3 IN- Analog inverting input
4 COMP Phase compensation input, comparator input
5 CSD Shutdown timing capacitor
6 VSS Floating input negative supply
7 VREF 5V reference voltage to program OCSET pin
8 OCSET Low side over current threshold setting
9 DT Deadtime program input
10 COM Low side supply return
11 LO Low side output
12 VCC Low side supply
13 VS High side floating supply return
14 HO High side output
15 VB High side floating supply
16 CSH High side over current sensing input
Lead Assignments
VAA
GND
IN-
OCSET
COM
COMP
CSD
LO
VCC
VREF
HO
VS
VSS
1
2
3
4
5
6
7
8
CSH
16
15
14
13
12
11
10
9
VB
AUIRS2092S
DT
SOIC16N
AUIRS2092S
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15
Parameter Temperature Trends
Figures illustrated in this chapter provide information on the experimental performance of the AUIRS2092S HVIC.
The line plotted in each figure is generated from actual lab data. A large number of individual samples were tested
at three temperatures (-40 ºC, 25 ºC, and 125 ºC) in order to generate the experimental curve. The line consists
of three data points (one data point at each of the tested temperatures) that have been connected together to
illustrate the understood trend. The individual data points on the Typ. curve were determined by calculating the
averaged experimental value of the parameter (for a given temperature).
300
340
380
420
460
-50-25 0 255075100125
Temperature (
o
C)
Turn-on Propagation Delay (ns)
Typ.
Max.
Min.
300
325
350
375
400
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
Turn-off Propagation Delay (ns
)
Typ.
Max.
Min.
Figure 6: tON vs. temperature Figure 7: tOFF vs. temperature
15.0
17.5
20.0
22.5
25.0
-50-250 255075100125
Temperature (
o
C)
Turn-On Rise Time (ns)
Typ.
Max.
Min.
10
15
20
25
30
-50-250255075100125
Temperature (
o
C)
Turn-Off fall Time (ns)
-
Typ.
Max.
Min.
Figure 8: TR vs. temperature Figure 9: TF vs. temperature
AUIRS2092S
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300
370
440
510
580
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
High Side Over Current Shutdown Delay
(ns)
Typ.
Max.
Min.
350
410
470
530
590
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
Low Side Over Current Shutdown Delay
(ns)
Typ.
Max.
Min.
Figure 10: TOCH vs. temperature Figure 11: TOCL vs. temperature
150
175
200
225
250
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
Shutdown Propagation Delay (ns)
Typ.
Max.
Min.
1.75
2.00
2.25
2.50
2.75
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
Quiescent V
CC
Supply Current (mA)
Typ.
Max.
Min.
Figure 12: TSD vs. temperature Figure 13: IQCC vs. temperature
600
625
650
675
700
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
Quiescent V
BS
Supply Current (uA)
Typ.
Max.
Min.
350
400
450
500
550
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
Quiescent V
AA0
Supply Current (uA)
Typ.
Max.
Min.
Figure 14: IQBS vs. temperature Figure 15: IQAA0 vs. temperature
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4.5
5.5
6.5
7.5
8.5
9.5
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
Quiescent V
AA1
Supply Current (mA)
Typ.
Max.
Min.
5
6
7
8
9
10
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
Quiescent V
AA1
Supply Current (mA)
Typ.
Max.
Min.
Figure 16: IQAA1 vs. temperature Figure 17: IQAA2 vs. temperature
8.50
8.75
9.00
9.25
9.50
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
V
CC
Supply UV+ Going Threshold (V)
Typ.
Max.
Min.
8.25
8.50
8.75
9.00
9.25
-50 -25 0 25 50 75 100 125
Temperature (oC)
VCC Supply UV- Going Threshold (V)
Typ
Max
Min.
Figure 18: VCCUV+ vs. temperature Figure 19: VCCUV- vs. temperature
8.00
8.25
8.50
8.75
9.00
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
V
BS
Supply UV+ Going Threshold (V)
Typ.
Max.
Min.
8.00
8.25
8.50
8.75
9.00
-50-250 255075100125
Temperature (oC)
VBS Supply UV- Going Threshold (V)
Typ.
Max.
Min.
Figure 20: VBSUV+ vs. temperature Figure 21: VBSUV- vs. temperature
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8.25
8.50
8.75
9.00
9.25
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
V
AA
Supply UV+ Going Threshold (V)
Typ.
Max.
Min.
7.75
8.00
8.25
8.50
8.75
-50-250 255075100125
Temperature (
o
C)
V
AA
Supply UV- Going Threshold (V)
Typ.
Max.
Min.
Figure 22: VAAUV+ vs. temperature Figure 23: VAAUV- vs. temperature
0.50
0.75
1.00
1.25
1.50
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
High Level Output (V)
Typ.
Max.
Min.
-5.0
-4.5
-4.0
-3.5
-3.0
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
Low Level Output (mV)
Typ.
Max.
Min.
Figure 24: VOH (IO = 0A) vs. temperature Figure 25: VOL (IO = 0A) vs. temperature
80
90
100
110
120
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
CSD Discharge Current (uA)
Typ.
Max.
Min.
-110
-100
-90
-80
-70
-50-250 255075100125
Temperature (
o
C)
CSD Charge Current (uA).
Typ.
Max
Min.
Figure 26: ICSD+ vs. temperature Figure 27: ICSD- vs. temperature
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4.50
4.75
5.00
5.25
5.50
-50 -25 0 25 50 75 100 125
Temperature (
o
C)
Reference Output Voltage (V)
Typ.
Max
Min.
Figure 28: VREF vs. temperature
Package Details: SOIC16N
AUIRS2092S
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Tape and Reel Details: SOIC16N
CARRIER TAPE DIMENSION FOR 16SOICN
Code Min Max Min Max
A 7.90 8.10 0.311 0.318
B 3.90 4.10 0.153 0.161
C 15.70 16.30 0.618 0.641
D 7.40 7.60 0.291 0.299
E 6.40 6.60 0.252 0.260
F 10.20 10.40 0.402 0.409
G 1.50 n/a 0.059 n/a
H 1.50 1.60 0.059 0.062
REEL DIMENSIONS FOR 16SOICN
Code Min Max Min Max
A 329.60 330.25 12.976 13.001
B 20.95 21.45 0.824 0.844
C 12.80 13.20 0.503 0.519
D 1.95 2.45 0.767 0.096
E 98.00 102.00 3.858 4.015
F n/a 22.40 n/a 0.881
G 18.50 21.10 0.728 0.830
H 16.40 18.40 0.645 0.724
Metric Imperial
Metric Imperial
E
F
A
C
D
G
A
BH
N
OTE : CONTROLLING
DIMENSION IN MM
LOADED TAPE FEED DIRECTION
A
H
F
E
G
D
B
C
AUIRS2092S
www.irf.com © 2007 International Rectifier
21
Part Marking Information
AUIRS2092
IR logo
AYWW ?
Part number
Date code
Pin 1
Identifier Lot Code
(Prod mode –
4 digit SPN code)
Assembly site code
Per SCOP 200-002
?XXXX
MARKING CODE
Lead Free Released
Non-Lead Free Released
?
P
Ordering Information
Standard Pack
Base Part Number Package Type Form Quantity Complete Part Number
Tube/Bulk 45 AUIRS2092S
AUIRS2092 SOIC16N
Tape and Reel 2500 AUIRS2092STR
AUIRS2092S
www.irf.com © 2007 International Rectifier
22
IMPORTANT NOTICE
Unless specifically designated for the automotive market, International Rectifier Corporation and its subsidiaries (IR)
reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products
and services at any time and to discontinue any product or services without notice. Part numbers designated with the
“AU” prefix follow automotive industry and / or customer specific requirements with regards to product discontinuance
and process change notification. All products are sold subject to IR’s terms and conditions of sale supplied at the time
of order acknowledgment.
IR warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with
IR’s standard warranty. Testing and other quality control techniques are used to the extent IR deems necessary to
support this warranty. Except where mandated by government requirements, testing of all parameters of each product
is not necessarily performed.
IR assumes no liability for applications assistance or customer product design. Customers are responsible for their
products and applications using IR components. To minimize the risks with customer products and applications,
customers should provide adequate design and operating safeguards.
Reproduction of IR information in IR data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information
with alterations is an unfair and deceptive business practice. IR is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of IR products or serviced with statements different from or beyond the parameters stated by IR for that product
or service voids all express and any implied warranties for the associated IR product or service and is an unfair and
deceptive business practice. IR is not responsible or liable for any such statements.
IR products are not designed, intended, or authorized for use as components in systems intended for surgical implant
into the body, or in other applications intended to support or sustain life, or in any other application in which the failure
of the IR product could create a situation where personal injury or death may occur. Should Buyer purchase or use IR
products for any such unintended or unauthorized application, Buyer shall indemnify and hold International Rectifier
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that IR was negligent regarding the
design or manufacture of the product.
IR products are neither designed nor intended for use in military/aerospace applications or environments unless the IR
products are specifically designated by IR as military-grade or “enhanced plastic.” Only products designated by IR as
military-grade meet military specifications. Buyers acknowledge and agree that any such use of IR products which IR
has not designated as military-grade is solely at the Buyer’s risk, and that they are solely responsible for compliance
with all legal and regulatory requirements in connection with such use.
IR products are neither designed nor intended for use in automotive applications or environments unless the specific
IR products are designated by IR as compliant with ISO/TS 16949 requirements and bear a part number including the
designation “AU”. Buyers acknowledge and agree that, if they use any non-designated products in automotive
applications, IR will not be responsible for any failure to meet such requirements.
For technical support, please contact IR’s Technical Assistance Center
http://www.irf.com/technical-info/
WORLD HEADQUARTERS:
101 N. Sepulveda Blvd., El Segundo, California 90245
Tel: (310) 252-7105
AUIRS2092S
www.irf.com © 2007 International Rectifier
23
Revision History
Date Comment
April 30, 2010 Converted from Industrial version
Aug. 5, 2010 Added tri-temp graphs;
Aug. 23, 2010 Updated Iqaa1,2,VOH,VOL,DT1,2,3,4, TOCH,TOCL,VOS, ICSD+/-, VREF, UVAA/CC/BS+/-;
added Iqaa1-25,Iqaa2-25,DT1,2,3,4-25 parameters.
Sep. 1, 2010 Corrected DT1-25 max to 35. Added ESD and latchup classification
Jan. 19, 2011 Updated DT1-to-4, Vos, Iqaa1,2 tri-temp spec
Jan. 20, 2011 Added leadfree and automotive grade heading
Jan. 21, 2011 Added typical for IO on front page, merged DT,Vos, Iqaa repeated descriptions.
Mar. 11,2011 Changed notice address