@wy 2GS-THOMSON SG1525A/27A MICROELECTRONICS SG2525A-3525A/27A REGULATING PULSE WIDTH MODULATORS TO 35 V OPERATION .1 V REFERENCE TRIMMED TO + 1 % 00 Hz TO 500 KHz OSCILLATOR RANGE EPARATE OSCILLATOR SYNC TERMINAL DJUSTABLE DEADTIME CONTROL (TERNAL SOFT-START ULSE-BY-PULSE SHUTDOWN {PUT UNDERVOLTAGE LOCKOUT WITH YSTERESIS ATCHING PWM TO PREVENT MULTIPLE ULSES UAL SOURCE/SINK OUTPUT DRIVERS CRIPTION 3G1525A/1527A series of pulse width modula- tegrated circuits are designed to offer impro- yerformance and lowered external parts count | used in designing all types of switching power lies. The on-chip + 5.1 V reference is trimmed | % and the input common-mode range of the amplifier includes the reference voltage elimi- g external resistors. A sync input to the oscilla- lows multiple units to be slaved or a single unit synchronized to an external system clock. A 3 resistor between the Cr and the discharge nals provide a wide range of dead time ad- ient. These devices also feature built-in soft- circuitry with only an external timing capacitor red. Ashutdown terminal controls both the soft- sircuity and the output stages, providing instan- sus turn off through the PWM latch with pulsed yer 1991 shutdown, as well as soft-start recycle with longer shutdown commands. These functions are also controlled by an undervoltage lockout which keeps the outputs off and the soft-start capacitor dischar- ged for sub-normal input voltages. This lockout cir- cuitry includes approximately 500 mV of hysteresis for jitter-free operation. Another feature of these PWM circuits is a latch following the comparator. Once a PWM pulses has been terminated for any reason, the outputs will remain off for the duration of the period. The latch is reset with each clock pulse. The output stages are totem-pole designs ca- pable of sourcing or sinking in excess of 200 mA. The SG1525A output stage features NOR logic, gi- ving a LOW output for an OFF state. The SG1527A utilizes OR logic which results in a HIGH output le- vel when OFF. DIP-16 (Plastic -0.25 and Ceramic) 1/10 6615G1525A/27A-SG2525A/27A-SG3525A/27A CONNECTION DIAGRAM AND ORDERING NUMBERS (top view) LT INV. INPUT ( 1 sf] Vaer nuweut ff? fl i Plastic | Ceramic Type $O016J SYNC 3 if) output 6 yp DIP DIP ) SG1525A - SG1525AJ - 3 Ve ose. oureur [fe SG1527A - SG1527AJ - or fs 2 ) GROUND SG2525A | SG2525AN | SG2525AJ | SG2525AP Ry {ls vil] ourTeuT 4 SG2527A | SG2527AN | SG2527AJ | SG2527AP SG3525A | SG3525AN | SG3525AJ | SG3525AP piscHance - []7 10[} SHUTDOWN SG3527A_ | SG3527AN | SG3527AJ | SG3527AP SOFT - START |} 8 9} cOMP S- 6414 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit Vi Supply Voltage 40 Vv Vo Collector Supply Voltage 40 Vv lose Oscillator Charging Current 5 mA lo Output Current, Source or Sink 500 mA In Reference Output Current 50 mA It Current through C7 Terminal 5 mA Logic Inputs -0.31t0+5.5 Vv Analog inputs 0.3 to Vi Vv Prot Total Power Dissipation at Tamp = 70 C 1000 mw Tj Junction Temperature Range 55 to 150 c Tstg Storage Temperature Range 65 to 150 C Top Operating Ambient Temperature : SG1525A/27A ~ 55 to 125 ae) SG2525A/27A ~ 25 to 85 C SG3525A/27A 0 to 70 C THERMAL DATA (DIP-16) Ceramic Plastic Rth j-pins Thermal Resistance Junction-pins Max - 50 C/ Rth j-amb Thermal Resistance Junction-ambient Max 150 C/W 80 C/V THERMAL DATA (SO16J) Rth j-atumina | Thermal Resistance Junction-alumina Max 50 C/W * Thermal resistance junction-alumina with the device soldered on the middle of an alumina supporting substrate measuring 15 x 20 mm ; 0 thickness with infinite heatsink. 2/10 ik 662 SGS-THOMSON MICROELECTRONICS$G1525A/27A-SG2525A/27A-SG3525A/27A OCK DIAGRAM 8 SHUTDOWN SK 10 Sy - VRer : : 16 i ' vi I - On ' REE uN, . \ a 4 8 OT one > LOCK = Sjany ' our + OUTPUT A j ] 1 -On ' GROUND TO INTERNAL | i t 2 O_____________-+# CIRCUITRY 1 1 1 ' SYNC _ OSCILLATOR | t ' 1 O_____---- - - OUTPUT ' ' ay | 94 | ' ' 6 | : 1 1 FUP 1 ~ 1 Cr osc. FLOP HH : non y 50 |___ oT OUTPUT B 1 -~O 4 : DISCHARGE : ' 7 O0_, i -. I t [ | | > COMP. 5 R ! _ ' 3 COMP. SG16254 OUTPUT STAGE i Pw pom mm et -- 1 INV. INPUT s| Arce \ y i 1 Oo x, 1 Cc ( REF 1 On : fF RROR i NOL INPUT AMP. 2 oO SOua QUIPUT A I oO 1 SOF T- START | l ' O_+4 , } ! t 4 I | I \ i Y ska OUTPUT B 1 O is ' t a U 1 i) 1 1 S- 63467 t CTRICAL CHARACTERISTICS = 20 V, and over operating temperature, unless otherwise specified) $G1525A/2525A SG3525A mbol Parameter Test Conditions SG1527A/2527A SG3527A Unit Min. [ Typ. [Max. Min. [ Typ. | Max. FERENCE SECTION VREF Output Voltage Tj = 25 C 5.05 | 5.1 | 5.15] 5 5.1 | 5.2 Vv VRee Line Regulation Vi=8to35V 10 20 10 20 mV VREF Load Regulation IL =O to 20 mA 20 50 20 50 mV 3eF/AT*| Temp. Stability Over Operating Range 20 50 20 50 mV Total Output * Variation pu Line, Load and Temperature| 5 5.2 | 4.95 5.25 Vv _ Short Circuit Current | Vaer =0 Tj = 25 C 80 | 100 80 | 100 | mA 10Hz< f<1 : . Output Noise Voltage| 7 _ 55 0 kHz 40 | 200 40 | 200 |yvrms i= Yree | Long Term Stability | T; = 125 C, 1000 hrs 20 50 20 50 mV / 57 SGS-THOMSON 310 T7 iacrorecvnomes 663$G1525A/27 A-SG2525A/27A-SG3525A/27A ELECTRICAL CHARACTERISTICS (continued) SG1525A/2525A SG3525A Symbol Parameter Test Conditions SG1527A/2527A SG3527A UI Min. [ Typ. | Max. Min. | Typ. [ Max. OSCILLATOR SECTION** * Initial Accuracy T) = 25 C +2 |+6 +2 /|4+6 Voltage Stability Vi=8 to 35V +03] +1 1] +2 AfiAT* Temperature Stability | Over Operating Range +3) +6 +3 [246 fin Minimum Frequency | Rr =200 KQ Cy =0.1 uF 120 120 | | fax Maximum Frequency | Rr = 2 KQ Cr = 470 pF | 400 400 K Current Mirror Int =2mA 1.7 2 2.2 17 2 2.2 e Clock Amplitude 3 3.5 3 3.5 e Clock Width T, =25 C 03 | 05 1 03 | 0.5 1 I Syne Threshold 1.2 2 28 1.2 2 2.8 Sync Input Current Sync Voltage =3.5 V 1 2.5 1 25 r ERROR AMPLIFIER SECTION (Voy = 5.1 V) Vos Input Offset Voltage 0.5 5 2 10 r ly Input Bias Current 1 10 1 10 1 los Input Offset Current 1 1 ! DC Open Loop Gain | Ry = 10 MQ 60 75 60 75 . Gain Bandwidth G,=00dB 1, =25C 1 2 1 2 N Product "2 DC Transconduct. 30 KO < Ri < 1 MQ 11 15 11 1.5 I T, =25 C Output Low Level 02 | 05 02 | 05 Output High Level 3.8 | 56 3.8 | 56 CMR Comm. Mode Reject. | Vom = 1.5 to 5.2 V 60 75 60 75 PSR Supply Voltage Vi =8 to 35 V 50 60 50 60 Rejection PWM COMPARATOR Minimum Duty-cycle 0 0 Maximum Duty-cycle 45 49 45 49 . Input Threshold Zero Duty-cycle 07 | 09 0.7 | 09 Maximum Duty-cycle 3.3 | 3.6 3.3 | 36 * Input Bias Current 0.05 1 0.05 1 ano 57 ScS:THomson MICROELECTRONICS 664$SG1525A/27A-SG2525A/27A-SG3525A/27A CTRICAL CHARACTERISTICS (continued) $G1525A/2525A SG3525A mbol Parameter Test Conditions SG1527A/2527A SG3527A Unit Min. [ Typ. [Max. Min. [ Typ. | Max. TDOWN SECTION Soft Start Current Vsp =O V, Vss =O V 25 50 80 25 50 80 HA Soft Start Low Level | Vsp =2.5 V 0.4 | 0.7 0.4 | 0.7 Vv Shutdown Threshold | To outputs, Vsg =5.1 V 0.6 0.8 1 0.6 | 0.8 1 Vv T) =25 C Shutdown Input Vsp =2.5V 0.4 1 0.4 1 mA Current * Shutdown Delay Vsp =25V Tj = 25 C 0.2 0.5 0.2 0.5 ps PUT DRIVERS {each output) (Vc = 20 V) Output Low Level lsink = 20 MA 0.2 | 0.4 02 | 0.4 Vv Isink = 100 MA 1 2 1 2 Vv Output High Level Isource = 20 MA 18 19 18 19 Vv Iscurce = 100 mA 17 | 18 17 | 18 V Under-Voltage Vcomp and Vs, = High 6 7 8 6 7 8 v Lockout c Collector Leakage Vo =35V 200 200 | WA r Rise Time C,. =1 nF, Tj =25 C 100 | 600 100 | 600 ns '" Fall Time C, =1 oF, Tj =25 C 50 | 300 50 | 300 ns \L STANDBY CURRENT 5 Supply Current Vi =35V | | 14 | 20 | [| 14 | 20 | ma | se parameters, although guaranteed over the recommended operating conditions, are not 100 % tested in production. @d at fose = 40 KHz (Rt = 3.6 KQ, Cr = 0.1 LF, Rp = 0 ). Approximate oscillator frequency is defined by : 1 Cr (0.7 Rr+ 3 Ro) ransconductance (gm) relates to DC apen-loop voltage gain (G,) according to the following equation : Gy = gu Ri where R_ is the resistance pin 9 to ground. The minimum gm specification is used to calculate minimum G, when the error amplifier output is loaded. KY7 Sicponacronnes 5/10 665$G1525A/27A-SG2525A/27A-SG3525A/27A TEST CIRCUIT Usi79-$ (te (s)"Z SOq=1 ONneu~-stIrF OR yO1V1N9D3Y 32N3N35348 MICROELECTRONICS i SGS-THOMSON 6/10 666$G1525A/27A-SG2525A/27A-SG3525A/27A COMMENDED OPERATING CONDITIONS (:) Parameter Value put Voltage (Vj) 8 to 35 V wlector Supply Voltage (Vc) 45 to 35 V nk/Source Load Current (steady state) 0 to 100 mA nk/Source Load Current (peak) 0 to 400 mA 0 to 20 mA xference Load Current scillator Frequency Range scillator Timing Resistor scillator Timing Capacitor 100 Hz to 400 KHz 2 KQ to 150 KQ 0.001 uF to 0.1 pF 2ad Time Resistor Range 0 to 500 Q tange over which the device is functional and parameter limits are guaranteed. ure 1: Oscillator Charge Time vs. Rt Figure 2 : Oscillator Discharge Time vs. Rp and Cr. and Cr. . 6-5 G-5144 ~5142 R, CKN)| 400 gfa 50 a re ./ / 300 2 / rs r& <f 20 2/\2 ty 10 200 y / : V/A) 100 4 - - WI). 1 2 5 10 20 50 100 200 500 ims 2ms Tips) 02 OS 1 2 5 10 20 0 T(ys) Jre 3: SG1525A Output Saturation Figure 4 : Error Amplifier Voltage Gain and Characteristics. Phase vs. Frequency. G-Sieert Gy (dB) 80 60 40 OPEN LOOP PHASE Values 29 | OKA will begin to limit the maximum duty cycle 3 ~180* SINK SAT, Yo. ~270 360 0.01 oA Ip (A) 100 10K 100K iM Hz} K57 SGS;THOMSON 70 MICROELECTRONICS 667SG1525A/27A-SG2525A/27A-SG3525A/27A Figure 5 : SG1525A Error Amplifier. o_o INV. INPUT NI. inpuTK2 pA S- 6420 -_ TO PWM COMPARATOR PRINCIPLES OF OPERATION SHUTDOWN OPTIONS (see Block Diagram) Since both the compensation and soft-start termi- nals (Pins 9 and 8) have current source pull-ups, ei- ther can readily accept a pull-down signa! which on- ly has to sink a maximum of 100 yA to turn off the outputs. This is subject to the added requirement of discharging whatever external capacitance may be attached to these pins. An alternate approach is the use of the shutdown circuitry of Pin 10 which has been improved to en- hance the available shutdown options. Activating this circuit by applying a positive signal on Pin 10 performs two functions : the PWM latch is immedia- tely set providing the fastest turn-off signal to outputs ; and a 150 WA current sink begins to charge the external soft-start capacitor. If the s down command is short, the PWM signal is te nated without significant discharge of the soft-: capacitor, thus, allowing, for example, a conver implementation of pulse-by-pulse current limit Holding Pin 10 high for a longer duration, howe will ultimately discharge this external capacitor cycling slow turn-on upon release. Pin 10 should not be left floating as noise pic could conceivably interrupt normal operation. & SGS-THOMSON MICROELECTRONICS$G1525A/27A-SG2525A/27A-SG3525A/27A jure 6 : SG1525A Oscillator Schematic. Vrer (16) at Qs as hy 4K a RT a3 Qo Qs ag 2K hs Ka RAMP. > TO PWM 2Kn a 25K2 sYNC.G)} fom Gio any KG 400 a a BA BLANKING O * To ouTPUT DISCHARGE 1 aiz Qu 3 D Ko Ko 250 0 GND CLOCK = 53-6419 xn | hoxn | lioxn i CLOCK FIF PWM S- 64161 K57 86S:THomson 910 MIGROELECTRONICS 669$G1525A/27A-SG2525A/27A-SG3525A/27A Figure 8. Figure 9. Vs TO OUTPUT _. FILTER y 5 , 1 AN i RZ | ct | 13 a 3 +e > R2 ve " aft c2 5G1525A az A3 a {4 GNO 12 S- 641 S-6418 For single-ended supplies, the driver outputs are grounded. The Vc terminal is switched to ground by the totem-pole source transistors on alternate oscil- tn conventional push-pull bipolar designs, form base drive is controlled by Ri - Rs. Rapid turr times for the power devices are achieved lator cycles. speed-up capacitors C1 and Co. Figure 10. Figure 11. os Ni c MV A Ty GND Q2 ira S- 6348 SG 1525A GND 12 Cd $- 6347 The low source impedance of the output drivers pro- vides rapid charging of Power Mos input capaci- tance while minimizing external components. 10/10 670 ky SGS-THOMSON MICRORLECTROMICS Low power transformers can be driven directh the SG1525A. Automatic reset occurs during time, when both ends of the primary winding switched to ground.