MRF151G - Motorola / Freescale Semiconductor

MRF151GMOTOROLA RF DEVICE DATA

The RF MOSFET Line

   

N–Channel Enhancement–Mode MOSFET

Designed for broadband commercial and military applications at frequencies

to 175 MHz. The high power, high gain and broadband performance of this

device makes possible solid state transmitters for FM broadcast or TV channel

frequency bands.

•Guaranteed Performance at 175 MHz, 50 V:

Output Power — 300 W

Gain — 14 dB (16 dB Typ)

Efficiency — 50%

•Low Thermal Resistance — 0.35°C/W

•Ruggedness Tested at Rated Output Power

•Nitride Passivated Die for Enhanced Reliability

MAXIMUM RATINGS

Rating Symbol Value Unit

Drain–Source Voltage VDSS 125 Vdc

Drain–Gate Voltage VDGO 125 Vdc

Gate–Source Voltage VGS ±40 Vdc

Drain Current — Continuous ID40 Adc

Total Device Dissipation @ TC = 25°C

Derate above 25°CPD500

2.85 Watts

W/°C

Storage Temperature Range Tstg –65 to +150 °C

Operating Junction Temperature TJ200 °C

THERMAL CHARACTERISTICS

Characteristic Symbol Max Unit

Thermal Resistance, Junction to Case RθJC 0.35 °C/W

NOTE — CAUTION — MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and

packaging MOS devices should be observed.

Order this document

by MRF151G/D

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SEMICONDUCTOR TECHNICAL DATA



300 W, 50 V, 175 MHz

N–CHANNEL

BROADBAND

RF POWER MOSFET

CASE 375–04, STYLE 2

 Motorola, Inc. 1997

(FLANGE)

REV 8

MRF151G

2MOTOROLA RF DEVICE DATA

ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted.)

Characteristic Symbol Min Typ Max Unit

OFF CHARACTERISTICS (Each Side)

Drain–Source Breakdown Voltage (VGS = 0, ID = 100 mA) V(BR)DSS 125 — — Vdc

Zero Gate Voltage Drain Current (VDS = 50 V, VGS = 0) IDSS — — 5.0 mAdc

Gate–Body Leakage Current (VGS = 20 V, VDS = 0) IGSS — — 1.0 µAdc

ON CHARACTERISTICS (Each Side)

Gate Threshold Voltage (VDS = 10 V, ID = 100 mA) VGS(th) 1.0 3.0 5.0 Vdc

Drain–Source On–V oltage (VGS = 10 V, ID = 10 A) VDS(on) 1.0 3.0 5.0 Vdc

Forward T ransconductance (VDS = 10 V, ID = 5.0 A) gfs 5.0 7.0 — mhos

DYNAMIC CHARACTERISTICS (Each Side)

Input Capacitance (VDS = 50 V, VGS = 0, f = 1.0 MHz) Ciss —350 — pF

Output Capacitance (VDS = 50 V, VGS = 0, f = 1.0 MHz) Coss —220 — pF

Reverse Transfer Capacitance (VDS = 50 V, VGS = 0, f = 1.0 MHz) Crss —15 — pF

FUNCTIONAL TESTS

Common Source Amplifier Power Gain

(VDD = 50 V, Pout = 300 W , IDQ = 500 mA, f = 175 MHz) Gps 14 16 — dB

Drain Efficiency

(VDD = 50 V, Pout = 300 W, f = 175 MHz, ID (Max) = 11 A) η50 55 — %

Load Mismatch

(VDD = 50 V, Pout = 300 W , IDQ = 500 mA,

VSWR 5:1 at all Phase Angles)

ψNo Degradation in Output Power

Figure 1. 175 MHz Test Circuit

+R1

C5C4 C10C9

BIAS 0–6 V

INPUT

D.U.T. OUTPUT

–

T2 L1

C11

C1 T1 C12

50 V

C7 C8

R1 — 100 Ohms, 1/2 W

R2 — 1.0 kOhm, 1/2 W

C1 — Arco 424

C2 — Arco 404

C3, C4, C7, C8, C9 — 1000 pF Chip

C5, C10 — 0.1 µF Chip

C6 — 330 pF Chip

C11 — 0.47 µF Ceramic Chip, Kemet 1215 or

C11 — Equivalent (100 V)

C12 — Arco 422

L1 — 10 T urns AWG #18 Enameled Wire,

L1 — Close Wound, 1/4″ I.D.

L2 — Ferrite Beads of Suitable Material for

L2 — 1.5–2.0 µH Total Inductance

Unless Otherwise Noted, All Chip Capacitors are ATC Type 100 or

Equivalent.

T1 — 9:1 RF T ransformer. Can be made of 15–18 Ohms

T1 — Semirigid Co–Ax, 62–90 Mils O.D.

T2 — 1:4 RF T ransformer. Can be made of 16–18 Ohms

T2 — Semirigid Co–Ax, 70–90 Mils O.D.

Board Material — 0.062″ Fiberglass (G10),

1 oz. Copper Clad, 2 Sides, εr = 5.0

NOTE: For stability, the input transformer T1 must be loaded

NOTE: with ferrite toroids or beads to increase the common

NOTE: mode inductance. For operation below 100 MHz. The

NOTE: same is required for the output transformer.

See Figure 6 for construction details of T1 and T2.

–

MRF151GMOTOROLA RF DEVICE DATA

Figure 2. Capacitance versus

Drain–Source Voltage* Figure 3. Common Source Unity Gain Frequency

versus Drain Current*

Figure 4. Gate–Source Voltage versus

Case Temperature* Figure 5. DC Safe Operating Area

TYPICAL CHARACTERISTICS

Figure 6. RF Transformer

*Data shown applies to each half of MRF151G.

VGS , DRAIN-SOURCE VOL TAGE (NORMALIZED)

1000

500

200

100

0 1020304050

C, CAPACITANCE (pF)

VDS, DRAIN–SOURCE VOLTAGE (VOL TS)

1.04

0.9–25 0 25 50 75 100

TC, CASE TEMPERATURE (

1.03

1.02

1.01

0.99

0.98

0.97

0.96

0.95

0.94

0.93

0.92

0.91

Ciss

Coss

Crss

ID = 5 A

4 A

2 A

1 A

250 mA

100 mA

100

12 20 200

VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)

2000

0048121620

, DRAIN CURRENT (AMPS)

1000

VDS = 30 V

ID, DRAIN CURRENT (AMPS)

2 6 10 14 18

15 V

TC = 25

fT, UNITY GAIN FREQUENCY (MHz)

HIGH IMPEDANCE

WINDINGS

CENTER

TAP

CENTER

TAP

4:1

IMPEDANCE

RATIO

9:1

IMPEDANCE

RATIO

CONNECTIONS

TO LOW IMPEDANCE

WINDINGS

MRF151G

4MOTOROLA RF DEVICE DATA

Figure 7. Output Power versus Input Power Figure 8. Power Gain versus Frequency

TYPICAL CHARACTERISTICS

Figure 9. Input and Output Impedance

52 5 10 30 100 200

f, FREQUENCY (MHz)

VDD = 50 V

IDQ = 2 x 250 mA

Pout = 150 W

350

00510

in, INPUT POWER (W ATTS)

300

250

200

150

100

VDD = 50 V

IDQ = 2 x 250 mA

200 MHz

GPS, POWER GAIN (dB)

out, OUTPUT POWER (WATTS)

175 MHz

f = 150 MHz

150

f = 175 MHz

Zo = 10

Ω

ZOL* = Conjugate of the optimum load impedance

ZOL* = into which the device output operates at a

ZOL* = given output power, voltage and frequency.

f = 175 MHz

125

100 INPUT, Zin

(GATE TO GATE)

OUTPUT, ZOL*

(DRAIN TO DRAIN)

150

125

100

MRF151GMOTOROLA RF DEVICE DATA

RF POWER MOSFET CONSIDERATIONS

MOSFET CAPACITANCES

The physical structure of a MOSFET results in capacitors

between the terminals. The metal anode gate structure de-

termines the capacitors from gate–to–drain (Cgd), and gate–

to–source (Cgs). The PN junction formed during the

fabrication of the RF MOSFET results in a junction capaci-

tance from drain–to–source (Cds).

These capacitances are characterized as input (Ciss), out-

put (Coss) and reverse transfer (Crss) capacitances on data

sheets. The relationships between the inter–terminal capaci-

tances and those given on data sheets are shown below . The

Ciss can be specified in two ways:

1. Drain shorted to source and positive voltage at the gate.

2. Positive voltage of the drain in respect to source and zero

volts at the gate. In the latter case the numbers are lower.

However, neither method represents the actual operat-

ing conditions in RF applications.

Cgd

GATE

SOURCE

Cgs

DRAIN

Cds Ciss = Cgd = Cgs

Coss = Cgd = Cds

Crss = Cgd

LINEARITY AND GAIN CHARACTERISTICS

In addition to the typical IMD and power gain data pres-

ented, Figure 3 may give the designer additional information

on the capabilities of this device. The graph represents the

small signal unity current gain frequency at a given drain cur-

rent level. This is equivalent to fT for bipolar transistors.

Since this test is performed at a fast sweep speed, heating of

the device does not occur. Thus, in normal use, the higher

temperatures may degrade these characteristics to some ex-

tent.

DRAIN CHARACTERISTICS

One figure of merit for a FET is its static resistance in the

full–on condition. This on–resistance, VDS(on), occurs in the

linear region of the output characteristic and is specified un-

der specific test conditions for gate–source voltage and drain

current. For MOSFETs, VDS(on) has a positive temperature

coefficient and constitutes an important design consideration

at high temperatures, because it contributes to the power

dissipation within the device.

GATE CHARACTERISTICS

The gate of the MOSFET is a polysilicon material, and is

electrically isolated from the source by a layer of oxide. The

input resistance is very high — on the order of 109 ohms —

resulting in a leakage current of a few nanoamperes.

Gate control is achieved by applying a positive voltage

slightly in excess of the gate–to–source threshold voltage,

VGS(th).

Gate Voltage Rating — Never exceed the gate voltage

rating. Exceeding the rated VGS can result in permanent

damage to the oxide layer in the gate region.

Gate Termination — The gates of these devices are es-

sentially capacitors. Circuits that leave the gate open–cir-

cuited or floating should be avoided. These conditions can

result in turn–on of the devices due to voltage build–up on

the input capacitor due to leakage currents or pickup.

Gate Protection — These devices do not have an internal

monolithic zener diode from gate–to–source. If gate protec-

tion is required, an external zener diode is recommended.

Using a resistor to keep the gate–to–source impedance

low also helps damp transients and serves another important

function. Voltage transients on the drain can be coupled to

the gate through the parasitic gate–drain capacitance. If the

gate–to–source impedance and the rate of voltage change

on the drain are both high, then the signal coupled to the gate

may be large enough to exceed the gate–threshold voltage

and turn the device on.

HANDLING CONSIDERATIONS

When shipping, the devices should be transported only in

antistatic bags or conductive foam. Upon removal from the

packaging, careful handling procedures should be adhered

to. Those handling the devices should wear grounding straps

and devices not in the antistatic packaging should be kept in

metal tote bins. MOSFETs should be handled by the case

and not by the leads, and when testing the device, all leads

should make good electrical contact before voltage is ap-

plied. As a final note, when placing the FET into the system it

is designed for, soldering should be done with a grounded

iron.

DESIGN CONSIDERATIONS

The MRF151G is an RF Power, MOS, N–channel en-

hancement mode field–effect transistor (FET) designed for

HF and VHF power amplifier applications.

Motorola Application Note AN211A, FETs in Theory and

Practice, is suggested reading for those not familiar with the

construction and characteristics of FETs.

The major advantages of RF power MOSFETs include

high gain, low noise, simple bias systems, relative immunity

from thermal runaway, and the ability to withstand severely

mismatched loads without suffering damage. Power output

can be varied over a wide range with a low power dc control

signal.

DC BIAS

The MRF151G is an enhancement mode FET and, there-

fore, does not conduct when drain voltage is applied. Drain

current flows when a positive voltage is applied to the gate.

RF power FETs require forward bias for optimum perfor-

mance. The value of quiescent drain current (IDQ) is not criti-

cal for many applications. The MRF151G was characterized

at IDQ = 250 mA, each side, which is the suggested minimum

value of IDQ. For special applications such as linear amplifi-

cation, IDQ may have to be selected to optimize the critical

parameters.

The gate is a dc open circuit and draws no current. There-

fore, the gate bias circuit may be just a simple resistive divid-

er network. Some applications may require a more elaborate

bias sytem.

GAIN CONTROL

Power output of the MRF151G may be controlled from its

rated value down to zero (negative gain) by varying the dc

gate voltage. This feature facilitates the design of manual

gain control, AGC/ALC and modulation systems.

MRF151G

6MOTOROLA RF DEVICE DATA

PACKAGE DIMENSIONS

CASE 375–04

ISSUE D

STYLE 2:

PIN 1. DRAIN

2. DRAIN

3. GATE

4. GATE

5. SOURCE

RADIUS 2 PL

–B–

–T–

SEATING

PLANE

0.25 (0.010) B M

–A–

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A1.330 1.350 33.79 34.29

B0.370 0.410 9.40 10.41

C0.190 0.230 4.83 5.84

D0.215 0.235 5.47 5.96

E0.050 0.070 1.27 1.77

G0.430 0.440 10.92 11.18

H0.102 0.112 2.59 2.84

J0.004 0.006 0.11 0.15

K0.185 0.215 4.83 5.33

N0.845 0.875 21.46 22.23

Q0.060 0.070 1.52 1.78

R0.390 0.410 9.91 10.41

U1.100 BSC 27.94 BSC

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

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MRF151G/D

*MRF151G/D*

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