A AWT921S11 Integrated High Power Amp 900 MHz Advanced Product information Rev. 6 DESCRIPTION The AWT921 is a monolithic amplifier for use in communication systems that require high gain and output intercept point. This device has been specifically designed for multi carrier and micro cell base station applications. FEATURES l High output power levels l High Efficiency l True Surface Mount Package with Integrated Heat Slug l Internal Bias Circuit Requiring Nominal Input Voltages +10% l Low Cost l Off Chip Output Matching Circuit Allows Application Optimization S11 SSOP-28 Wide Body 28 Pin Wide Body w/ Heat Slug ABSOLUTE MAXIMUM RATINGS PIN SIGNAL MAX RATING PIN SIGNAL 2 VDD +7VDC 11 VREF +7 VDC 3 RFIN +20 dBm 12 VSS -7 VDC 4,5 VD1 +10 VDC 18,19,20,21,22,23,24,25 VD3 +10 VDC 8,9 VD2 +10 VDC Operating Temperature: -30 to + 85o C Storage Temperature: -55 to + 100o C MAX RATING AWT921S11 Advanced Product Information - Rev. 6 ELECTRICAL SPECIFICATIONS: (1) (Pin +12 dBm, fo = 925-960 MHz, VDS1 = VDS2 = VDS3 = 8.5V, VSS = - 3V,VREF=+5V,VDD=+5V,Tc=25C, 50W System (2) PARAMETER Frequency Power Output Power Added Efficiency Gain @ POUT = +39 dBm @ POUT = +30 dBm (3) Harmonics 2nd 3rd 4th Stability: - 60 dBc all spurious outputs relative to desired signal SYMBOL fo POUT Eff Bias supply currents PG - MAX 960 - - 29 30 - 37 47 50 - - 10 0.5 0.5 - PG - dB dBc - 8 1.2 8 - UNITS MHz dBm % - 3:1 - IDQ1 IDQ2 IDQ3 Input Return Loss Gain Flatness vs. Frequency @ Pout = +39 dBm @ Pout = +30 dBm 4 Thermal Resistance TYP + 39 40 - ISS IREF IDD Quiescent Currents MIN 925 - VSWR load, all phase angles - mA mA mA 100 250 200 - - mA mA mA dB - - 4.5 - dB dB C/W NOTES: 1: As measured in ANADIGICS test fixture, see application section 2: 50W Measurement system after off chip matching circuit, input terminated in 50W 3: Measured at Pout =+ 39 dBm 4: Thermal resistance for junction to bottom of slug. Qjc= (Tj-Tc)/((ID1+ID2 +ID3)*VSUP - POUT) CHARACTERIZATION DATA (1) Conditions unless otherwise stated (Pin +12 dBm, fo = 925-960 MHz, VDS1 = VDS2 = VDS3 = 8.5V, VSS = - 3V, VREF = +5V, VDD =+ 5 V, Tc=25C, 50 W system (2)) Pout & Eff vs. Pin 34 32 30 0 A 2 4 6 8 Pin (dBm) Pout Eff 60 50 40 30 20 10 930 940 950 Freq (MHz) Padd Eff (%) 36 43 42 41 40 39 38 37 36 35 920 Pout (dBm) 38 100 90 80 70 60 50 40 30 20 10 0 10 12 14 Padd Eff (%) Pout (dBm) 40 Pout & Eff vs. Frequency Pout Eff 0 960 2 AWT921S11 Advanced Product Information - Rev. 6 Idq3 vs Vdd Pout vs. Supply Voltage 41 120 100 39 38 Pout 37 36 AWT921S11 80 Idq3 (mA) Pout (dBm) 40 60 40 20 35 5 6 7 8 9 Vsup (V) 10 11 0 0 2 8 Idq3 vs Vss 500 600 450 500 Rref=1.5 K 400 300 Rref=3 K 200 Rref=6 K 100 400 Idq3 (mA) Idq3 (mA) 6 ADC ADC Idq3 vs Vref 4 Vdd (Volts) 350 300 250 200 0 0 2 4 6 Vref (Volts) 150 8 100 -7 -6 -5 -4 Vss (Volts) -3 -2 Notes: 1: As measured in ANADIGICS test fixture, see application section 2: 50W Measurement system after off chip matching circuit, input terminated in 50W CHARACTERIZATION DATA: (1) Conditions unless otherwise stated (Pin +12 dBm, fo = 925-960 MHz, VDS1 = VDS2 = VDS3 = 8.5V, VSS = - 3V, VREF = + 5V, VDD =+ 5V, Tc=25OC, 50W system) (2) 120 400 1.3 115 350 1.25 110 300 1.2 250 1.15 200 1.1 150 1.05 Idq3/Iref 105 100 95 90 2 A 3 4 5 6 Vref (Volts) 7 8 Iref (mA) Iq3 & Iref vs Temperature Iq3 (mA) Bias Ckt Current Gain Bias Ckt Gain vs Vref Iq3 Iref 100 1 -40 -20 0 20 40 60 80 100 Temperature (C) 3 AWT921S11 Advanced Product Information - Rev. 6 40 43 39 41 38 37 39 36 37 35 34 35 33 32 33 -40 -20 0 20 40 60 80 100 Temperature (C) Eff (%) Pout (dBm) & SS Gain (dB) Pout,PG,& Eff vs Temperature Pout Eff SS PG S 1 1 R E V E R S E R E F L E C T IO N IM P E D A N C E C H 4 1 .5 2 1 .2 5 0 .2 .5 1 2 2 5 1 0 0 0 G H z 6 j M A R K E R M A R K E R T O -5 3 4 -2 -1 T O Load + 3.7 + 3.9 j Output Load Impedance as seen by the device M A X M IN 0 .0 9 8 1 2 5 0 0 0 G H z 3 6 .9 1 9 -1 3 .5 0 1 j 1 .9 2 0 0 0 0 0 0 0 G H z 1 1 .4 4 6 -1 1 1 .6 4 1 j 2 .8 0 0 0 0 0 0 0 0 G H z 3 .1 3 3 -2 4 .5 5 0 j 3 -.5 S 1 1 M A R K E R 0 .9 5 7 5 0 0 7 .0 7 4 1 3 1 .9 0 2 -.2 4 - R E F E R E N C E P L A N E 9 .0 8 2 1 c m M A R K E R R E A D O U T F U N C T IO N S 0 .0 5 0 0 0 0 0 0 0 - 2 .8 0 0 0 0 0 0 0 0 G H z S 1 1 R E V E R S E R E F L E C T IO N IM P E D A N C E Impedance as seen by VDS1 C H 4 1 .2 1 .5 3 T R A C E M E M O R Y D IS K O P E R A T IO N S 2 C H A N N E L 4 4 .2 5 1 0 .2 1 .5 2 S A V E M E M O R Y T O H A R D D IS K S A V E M E M O R Y T O F L O P P Y D IS K 5 -5 -.2 R E C A L L M E M O R Y F R O M H A R D D IS K R E C A L L M E M 0 O R Y F R O M F L O P P Y D IS K -.5 2 .5 -2 -1 P R E S S < E N T E R > T O S E L E C T 0 5 .2 .5 2 M A R K E R T O M A R K E R T O 5 2 1 2 3 -.2 3 -5 4 4 -.5 -2 -1 0 . 0 5 0 0 0 0 0 0 0 -2 . 8 0 0 0 0 0 0 0 0 G H z S 1 1 R E F E R E N C E P L A N E 9 .0 8 2 1 c m M A R K E R 1 0 .9 5 7 5 0 0 0 0 0 G H z 7 .6 5 9 1 6 1 .1 8 1 j 1 S 2 2 R E V E R S E R E F L E C T IO N IM P E D A N C E - 0 .0 9 8 1 2 5 0 3 7 .2 3 7 -1 1 .8 1 7 1 .9 2 0 0 0 0 0 1 3 .3 0 8 -1 7 1 .1 2 6 2 .8 0 0 0 0 0 0 4 .4 6 6 -6 0 .0 4 4 M A X M IN 0 0 G H z j 0 0 G H z j 0 0 G H z j M A R K E R R E A D O U T F U N C T IO N S Impedance as seen VDS2 0 .0 5 0 0 0 0 0 0 0 - 2 .8 0 0 0 0 0 0 0 0 G H z Output Impedance as seen by VDS3 A 4 AWT921S11 Advanced Product Information - Rev. 6 PACKAGE OUTLINE DRAWING D C T L L E H E A T S IN K S L U G S E ADC h a A A 2 A Notes: 1. Controlling dimensions : inches. 2. Dimension d does not include mold flash, protrusions or gate burrs. Mold flash, protrusions and gate burrs shall not exceed 0.006 (0.16mm). 3. Dimension e does not include inter-lead or protrusions. Inter-lead flash and protrusions shall not exceed 0.010 (0.25mm) per side. 4. Maximum lead twist/skew to be 0.002 (0.05mm). 5. Mold flash shall not extend more than 0.010 (0.25mm) on any edge of heat slug. INCHES 1 SYMBOL e MILLIMETERS NOTE MIN. MAX. MIN. MAX. A 0.087 0.093 2.21 2.36 A1 0.000 0.004 0.00 0.10 A2 0.087 0.089 2.21 2.25 B 0.008 0.012 0.36 0.46 C 0.007 0.009 0.18 0.25 D 0.400 0.408 10.16 10.36 2 E 0.292 0.296 7.42 7.52 2 e 0.025 BSC 0.64 BSC 4 H 0.410 0.418 10.41 40.62 h 0.018 0.024 0.48 0.61 L 0.034 0.038 0.86 0.97 LE 0.84 1.37 a 0 8 0 8 S 0.139 0.141 3.54 3.55 5 T 0.349 0.351 8.86 8.92 5 ANADIGICS, Inc. 35 Technology Drive Warren, New Jersey 07059 Tel: (908) 668-5000 / Fax: (908) 668-5132 Email: Mkg@anadigics.com www.anadigics.com IMPORTANT NOTICE ANADIGICS, Inc. reserves the right to make changes to its products or discontinue any product at any time without notice. The Advanced Product data sheets and product specifications contained in this data sheet are subject to change prior to a products formal introduction. The information in this data sheet has been carefully checked and is assumed to be reliable. However, ANADIGICS assumes no responsibility for inaccuracies. ANADIGICS strongly urges customers to verify that the information they are using is current before placing orders. WARNING ANADIGICS products are not intended for use in life support appliances, device, or systems. Use of an ANADIGICS product in any such application without written consent is prohibited. A 5