TL103W, TL103WA www.ti.com SLOS437K - APRIL 2004 - REVISED OCTOBER 2010 DUAL OPERATIONAL AMPLIFIERS WITH INTERNAL REFERENCE Check for Samples: TL103W, TL103WA FEATURES TYPICAL APPLICATIONS * * * * * 1 * OPERATIONAL AMPLIFIER - Low Offset Voltage Max of: - TL103WA...3 mV (25C) and 5 mV (Full Temperature) - TL103W...4 mV (25C) and 5 mV (Full Temperature) - Low Supply Current...350 mA/Channel (Typ) - Unity Gain Bandwidth...0.9 MHz (Typ) - Input Common-Mode Range Includes GND - Large Output-Voltage Swing... 0 V to VCC - 1.5 V - Wide Supply-Voltage Range...3 V to 32 V - 2-kV ESD Protection (HBM) VOLTAGE REFERENCE - Fixed 2.5-V Reference - Tight Tolerance Max of: - TL103WA...0.4% (25C) and 0.8% (Full Temperature) - TL103W . . . 0.7% (25C) and 1.4% (Full Temperature) - Low Temperature Drift...7 mV (Typ) Over Operating Temperature Range - Wide Sink-Current Range . . . 0.5 mA (Typ) to 100 mA - Output Impedance...0.2 (Typ) Battery Chargers Switch-Mode Power Supplies Linear Voltage Regulation Data-Acquisition Systems D (SOIC) PACKAGE (TOP VIEW) 1OUT 1IN- 1IN+ VCC- 1OPAMP1 8 OPAMP2 7 2 - + 3 + 4 - VCC+ 2OUT 6 2IN- 5 2IN+ VREF DRJ (QFN) PACKAGE (TOP VIEW) 1OUT 1 8 VCC+ 1IN- 2 7 2OUT 1IN+ 3 6 2IN- VCC- 4 5 2IN+ NOTE: Exposed thermal pad is connected internally to VCC- via die attach. DESCRIPTION/ORDERING INFORMATION The TL103W and TL103WA combine the building blocks of a dual operational amplifier and a fixed voltage reference - both of which often are used in the control circuitry of both switch-mode and linear power supplies. OPAMP1 has its noninverting input internally tied to a fixed 2.5-V reference, while OPAMP2 is independent, with both inputs uncommitted. For the A grade, especially tight voltage regulation can be achieved through low offset voltages for both operational amplifiers (typically 0.5 mV) and tight tolerances for the voltage reference (0.4% at 25C and 0.8% over operating temperature range). The TL103W and TL103WA are characterized for operation from -40C to 105C. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2004-2010, Texas Instruments Incorporated TL103W, TL103WA SLOS437K - APRIL 2004 - REVISED OCTOBER 2010 www.ti.com ORDERING INFORMATION MAX VIO AND VREF TOLERANCE (25C) TA PACKAGE (1) QFN (DRJ) A grade 3 mV, 0.4% SOIC (D) -40C to 105C QFN (DRJ) Standard grade 4 mV, 0.7% (1) SOIC (D) ORDERABLE PART NUMBER Reel of 1000 TL103WAIDRJR Tube of 75 TL103WAID Reel of 2500 TL103WAIDR Reel of 1000 TL103WIDRJR Tube of 75 TL103WID Reel of 2500 TL103WIDR TOP-SIDE MARKING PREVIEW Z103WA PREVIEW Z103W Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Typical Application Circuit R1 Opto Isolator R2 R8 OPAMP2 _ AC Line SMPS + Constant Current Control Battery R3 Current R6 Sense R4 R5 OPAMP1 _ 2.5 V R7 + Constant Voltage Control R9 TL103W/A Figure 1. TL103W/A in a Constant-Current and Constant-Voltage Battery Charger 2 Submit Documentation Feedback Copyright (c) 2004-2010, Texas Instruments Incorporated Product Folder Link(s): TL103W TL103WA TL103W, TL103WA www.ti.com SLOS437K - APRIL 2004 - REVISED OCTOBER 2010 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN VCC Supply voltage VID Operational amplifier input differential voltage VI Operational amplifier input voltage range IKA Voltage reference cathode current qJA Package thermal impedance TJ Maximum junction temperature Tstg Storage temperature range (1) (2) (3) (4) -0.3 D package (2) (3) DRJ package (2) (4) MAX V 36 V 36 V 100 mA 97 TBD -65 UNIT 36 C/W 150 C 150 C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability Maximum power dissipation is a function of TJ(max), qJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) - TA)/qJA. Selecting the maximum of 150C can affect reliability. The package thermal impedance is calculated in accordance with JESD 51-7. The package thermal impedance is calculated in accordance with JESD 51-5. Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VIN Supply voltage 3 32 V IK Cathode current 1 100 mA TA Operating free-air temperature -40 105 C Copyright (c) 2004-2010, Texas Instruments Incorporated Product Folder Link(s): TL103W TL103WA Submit Documentation Feedback 3 TL103W, TL103WA SLOS437K - APRIL 2004 - REVISED OCTOBER 2010 www.ti.com OPAMP1, Operational Amplifier With Noninverting Input Connected to the Internal VREF Electrical Characteristics VCC+ = 5 V, VCC = GND, TA = 25C (unless otherwise noted) PARAMETER VIO TEST CONDITIONS TL103W Vicm = 0 V TL103WA Vicm = 0 V Input offset voltage TA MIN 25C TYP MAX 1 4 Full range 5 25C 0.5 Full range 3 UNIT mV 5 aVIO Input offset-voltage drift 25C 7 mV/C IIB Input bias current (negative input) 25C 20 nA AVD Large-signal voltage gain VCC+ = 15 V, RL = 2 k, Vicm = 0 V 25C 100 V/mV kSVR Supply-voltage rejection ratio VCC+ = 5 V to 30 V, Vicm = 0 V 25C 65 100 dB IO(source) Output source current VCC+ = 15 V, VO = 2 V, Vid = 1 V 25C 20 40 mA ISC Short circuit to GND VCC+ = 15 V 25C IO(sink) Output sink current VCC+ = 15 V, VO = 2 V, Vid = -1 V VCC+ = 15 V, VO = 0.2 V, Vid = -1 V VCC = 30 V, RL = 2 k VOH High-level output voltage VCC = 30 V, RL = 10 k 25C 40 60 mA 10 12 mA 12 50 mA 27 25C 26 Full range 26 25C 27 Full range 27 25C V 28 5 20 VOL Low-level output voltage RL = 10 k SR Slew rate at unity gain VCC+ = 15 V, CL = 100 pF, RL = 2 k, VI = 0.5 V to 2 V, unity gain 25C 0.2 0.4 V/ms GBW Gain bandwidth product VCC+ = 30 V, VI = 10 mV, CL = 100 pF, RL = 2 k, f = 100 kHz 25C 0.5 0.9 MHz THD Total harmonic distortion VCC+ = 30 V, VO = 2 Vpp, CL = 100 pF, RL = 2 k, f = 1 kHz, AV = 20 dB 25C 0.02 % 4 Submit Documentation Feedback Full range 20 mV Copyright (c) 2004-2010, Texas Instruments Incorporated Product Folder Link(s): TL103W TL103WA TL103W, TL103WA www.ti.com SLOS437K - APRIL 2004 - REVISED OCTOBER 2010 OPAMP2, Independent Operational Amplifier Electrical Characteristics VCC+ = 5 V, VCC = GND, VO = 1.4 V, TA = 25C (unless otherwise noted) PARAMETER VIO TEST CONDITIONS TL103W Vicm = 0 V TL103WA Vicm = 0 V Input offset voltage aVIO Input offset voltage drift IIO Input offset current IIB Input bias current AVD Large-signal voltage gain VCC+ = 15 V, RL = 2 k, VO = 1.4 V to 11.4 V kSVR Supply-voltage rejection ratio VCC+ = 5 V to 30 V VICR Input common-mode voltage range VCC+ = 30 V (1) CMRR Common-mode rejection ratio IO(source) Output source current ISC Short circuit to GND IO(sink) Output sink current MIN TYP MAX 1 4 Full range 25C 0.5 Full range 7 25C 2 20 25C 50 Full range 25 25C 65 150 nA 100 V/mV 100 dB 25C 0 VCC+ - 1.5 Full range 0 VCC+ - 2 25C 70 60 VCC+ = 15 V, VO = 2 V, Vid = 1 V 25C 20 VCC+ = 15 V 25C VCC = 30 V, RL = 10 k nA 200 Full range High-level output voltage mV/C 75 150 25C VCC+ = 15 V, VO = 0.2 V, Vid = -1 V mV 3 5 25C Full range VCC+ = 15 V, VO = 2 V, Vid = -1 V UNIT 5 Full range VCC = 30 V, RL = 2 k VOH TA 25C V 85 dB 40 40 mA 60 mA 10 12 mA 12 50 mA 25C 26 27 Full range 26 25C 27 Full range 27 25C 25C V 28 5 20 VOL Low-level output voltage RL = 10 k SR Slew rate at unity gain VCC+ = 15 V, CL = 100 pF, RL = 2 k, VI = 0.5 V to 3 V, unity gain 25C 0.2 0.4 V/ms GBW Gain bandwidth product VCC+ = 30 V, VI = 10 mV, CL = 100 pF, RL = 2 k, f = 100 kHz 25C 0.5 0.9 MHz THD Total harmonic distortion VCC+ = 30 V, VO = 2 Vpp, CL = 100 pF, RL = 2 k, f = 1 kHz, AV = 20 dB 25C 0.02 % Vn Equivalent input noise voltage VCC = 30 V, RS = 100 , f = 1 kHz 25C 50 (1) Full range mV 20 nV/Hz The input common-mode voltage of either input should not be allowed to go below -0.3 V. The upper end of the common-mode voltage range is VCC+ - 1.5 V, but either input can go to VCC+ + 0.3 V (but 36 V) without damage. Copyright (c) 2004-2010, Texas Instruments Incorporated Product Folder Link(s): TL103W TL103WA Submit Documentation Feedback 5 TL103W, TL103WA SLOS437K - APRIL 2004 - REVISED OCTOBER 2010 www.ti.com Voltage Reference Electrical Characteristics PARAMETER TEST CONDITIONS TL103W VREF IK = 10 mA Reference voltage TL103WA IK = 10 mA VREF Reference input voltage deviation over temperature range VKA = VREF, IK = 10 mA Imin Minimum cathode current for regulation VKA = VREF |zka| Dynamic impedance (1) VKA = VREF, IK = 1 mA to 100 mA, f < 1 kHz |z ka| + (1) The dynamic impedance is defined as DVKA DI K TA MIN TYP MAX 2.5 2.518 25C 2.482 Full range 2.465 25C 2.49 Full range 2.48 Full range 2.535 2.5 2.51 UNIT V 2.52 7 30 mV 25C 0.5 1 mA 25C 0.2 0.5 TYP MAX 0.7 1.2 . Total Device Electrical Characteristics PARAMETER ICC 6 Total supply current, excluding cathode-current reference TEST CONDITIONS VCC+ = 5 V, No load VCC+ = 30 V, No load TA Full range Submit Documentation Feedback MIN 2 UNIT mA Copyright (c) 2004-2010, Texas Instruments Incorporated Product Folder Link(s): TL103W TL103WA TL103W, TL103WA www.ti.com SLOS437K - APRIL 2004 - REVISED OCTOBER 2010 REVISION HISTORY Changes from Revision J (September 2010) to Revision K * Page Changed topside marking to fix typo Z103WQ to Z103WA .................................................................................................. 2 Copyright (c) 2004-2010, Texas Instruments Incorporated Product Folder Link(s): TL103W TL103WA Submit Documentation Feedback 7 PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (C) Top-Side Markings (3) (4) TL103WAID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 105 Z103WA TL103WAIDE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 105 Z103WA TL103WAIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 105 Z103WA TL103WAIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 105 Z103WA TL103WAIDRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 105 Z103WA TL103WAIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 105 Z103WA TL103WID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 105 Z103W TL103WIDE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 105 Z103W TL103WIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 105 Z103W TL103WIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 105 Z103W TL103WIDRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 105 Z103W TL103WIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 105 Z103W (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TL103WAIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL103WIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TL103WAIDR SOIC D 8 2500 340.5 338.1 20.6 TL103WIDR SOIC D 8 2500 340.5 338.1 20.6 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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