TFS757-764HG HiperTFS Family TM Combined Two-Switch Forward and Flyback Power Supply Controllers with Integrated High Voltage MOSFETs Key Benefits * Single chip solution for two-switch forward main and flyback standby * High integration allows smaller form factor and higher power density designs * Incorporates control, gate drivers, and three power MOSFETS * Level shift technology eliminates need for pulse transformer * Protection features include: UV, OV, OTP, OCP, and SCP * Transformer reset control * Prevents transformer saturation under all conditions * Allows >50% duty cycle operation * Reduces primary side RMS currents and conduction losses * Standby supply provides built-in overload power compensation * Up to 434 W total output power in a highly compact package * Up to 550 W peak * High efficiency solution easily enables design to meet stringent efficiency specifications * >90% efficiency at full load * No-load regulation and low losses at light-load * Simple clip mounting to heat sink without need for insulation pad * Halogen free and RoHS compliant Applications * PC * Printer * LCD TV * Video game consoles * High-power adapters * Industrial and appliance high-power adapters Output Power Table Product TFS757HG TFS758HG TFS759HG TFS760HG TFS761HG TFS762HG TFS763HG TFS764HG Table 1. Two-Switched Forward 380 V Continuous Continuous Peak (25 C) (50 C) (50 C) 193 W 163 W 228 W 236 W 200 W 278 W 280 W 235 W 309 W 305 W 258 W 358 W 326 W 276 W 383 W 360 W 304 W 407 W 388 W 327 W 455 W 414 W 344 W 530 W Flyback 100 V - 400 V 50 C 20 W 20 W 20 W 20 W 20 W 20 W 20 W 20 W Output Power Table (See Notes on page 13). Main Output HiperTFS VDDH HD HS L D Two-Switch Forward Transformer Auxiliary/Standby Output RTN DC Input FB Control, Gate Drivers, Level Shift R DSB Flyback Transformer FB EN FB BP EN EN G S PI-6200-102910 Figure 1. Simplified Schematic of Two-Switch Forward and Flyback Converter. www.powerint.com February 2011 TFS757-764HG Section List Description................................................................................................................................................................... 3 Product Highlights....................................................................................................................................................... 3 Pin Functional Description.......................................................................................................................................... 5 Pin Configuration....................................................................................................................................................... 5. Functional Block Diagram......................................................................................................................................6-7. Functional Description ................................................................................................................................................ 8 Output Power Table................................................................................................................................................ 13 Design, Assembly, and Layout Considerations..................................................................................................... 14 Application Example.................................................................................................................................................. 20 Absolute Maximum Ratings...................................................................................................................................... 23 Parameter Table...................................................................................................................................................... 23 Typical Performance Characteristics..................................................................................................................29-33. Package Details ......................................................................................................................................................... 34 Part Ordering Information......................................................................................................................................... 35 Part Marking Information ......................................................................................................................................... 35 2 Rev. C 02/11 www.powerint.com TFS757-764HG Description The HiperTFS device family members incorporate both a high-power two-switch-forward converter and a mid-power flyback (standby) converter into a single, low-profile eSIPTM power package. The single chip solution provides the controllers for the two-switch-forward and flyback converters, high- and low-side drivers, all three of the high-voltage power MOSFETs, and eliminates the converter's need for costly external pulse transformers. The device is ideal for high power applications that require both a main power converter (two-switch forward) up to 414 W, and standby converter (flyback) up to 20 W. HiperTFS includes Power Integrations' standard set of comprehensive protection features, such as integrated soft-start, fault and over-load protection, and hysteretic thermal shutdown. HiperTFS utilizes advanced power packaging technology that simplifies the complexity of two-switch forward layout, mounting and thermal management, while providing very high power capabilities in a single compact package. The devices operate over a wide input voltage range, and can be used following a power-factor correction stage such as HiperPFS. Two-switch-forward power converters are often selected for applications demanding cost-effective efficiency, fast transient response, and accurate tolerance to line voltage fluctuation. The two-switch-forward controller incorporated into HiperTFS devices improves on the classic topology by allowing operation considerably above 60% duty cycle. This improvement reduces RMS currents conduction losses, minimizes the size and cost of the bulk capacitor, and minimizes output diode voltage ratings. The advanced design also includes transformer flux reset control (saturation protection) and charge-recovery switching of the high-side MOSFET, which reduces switching losses. This combination of innovations yields an extremely efficient power supply with smaller MOSFETs, fewer passives and discrete components, and a lower-cost transformer. HiperTFS's flyback standby controller and MOSFET solution is based on the highly popular TinySwitchTM technology used in billions of power converter ICs due to its simplicity of operation, light load efficiency, and rugged, reliable, performance. This flyback converter can provide up to 20 W of output power and the built in overload power compensation reduces component design margin. Product Highlights Protected Two-Switch Forward and Flyback Combination Solution * Incorporates three high-voltage power MOSFETs, main and standby controllers, and gate drivers * Level shift technology eliminates need for pulse transformer * Programmable line undervoltage (UV) detection prevents turn-off glitches * * * * * * * Programmable line overvoltage (OV) detection; latching and non-latching Accurate hysteretic thermal shutdown (OTP) Accurate selectable current limit (main and standby) * Output over-current protection (OCP) Fully integrated soft-start for minimum start-up stress Simple fast AC reset Reduced EMI * Synchronized 66 kHz forward and 132 kHz flyback converters * Frequency jitter Eliminates up to 30 discrete components for higher reliability and lower cost Asymmetrical Two-Switch Forward Reduces Losses * Allows >50% duty cycle operation * Reduces primary side RMS currents and conduction losses * Minimizes the size and cost of the bulk capacitor * Allows reduced capacitance or longer hold-up time * Allows lower voltage output diodes * Transformer reset control * Prevents transformer saturation under all conditions * Extends duty cycle to satisfy AC cycle drop out ride through * Duty cycle soft-start with 115% current limit boost * Satisfies 2 ms ~ 20 ms start-up with large capacitance at output * Output short circuit protection (SCP) with auto-restart * Remote ON/OFF function * Voltage mode controller with current limit 20 W Flyback with Selectable Power Limit * TinySwitch-III based converter * Selectable power limit (10 W, 12.5 W, 15 W, or 20 W) * Built-in overload power compensation * Flat overload power vs. input voltage * Reduces component stress during overload conditions * Reduces required design margin for transformer and output diode * Output overvoltage (OV) protection with fast AC reset * Latching, non-latching, or auto-restart * Auto-restart Advanced Package for High Power Applications * 434 W output power capability in a highly compact package * Up to 550 W peak * Simple clip mounting to heat sink * Can be directly connected to heat sink without insulation pad * Provides thermal impedance equivalent to a TO-220 * Heat slug connected to ground potential for low EMI * Staggered pin arrangement for simple routing of board traces and high-voltage creepage requirements * Single power package for two power converters reduces assembly costs layout size 3 www.powerint.com Rev. C 02/11 TFS757-764HG Typical Two-Switch Forward HiperTFS Advantages of HiperTFS Nominal Duty Cycle 33% 45% Maximum Duty Cycle <50% 63% Wider duty cycle reduces RMS switch currents by 17%. Reduces RDS(ON) losses by 31% Function Switch Current (RMS) 100% 83% VO + VD/DMAX VO + VD/DMAX Reset diodes from zero to VIN Reset from zero to (VIN + 130) With fast/slow diode combination, allows charge recovery to limit high-side COSS loss --- 118 C Shutdown / 55 C hysteresis HiperTFS provides integrated OTP device protection Current Sense Resistor 0.5 V drop (0.33 W at 300 W) Sense resistor not required Improved efficiency. MOSFET RDS(ON) sense eliminated need for sense resistor High-Side Drive Requires gate-drive transformer (high cost) Built in high-side drive Output Catch Diode Clamp Voltage Thermal Shutdown Component Count Lower losses. Wider DMAX lowers catch diode rating by (1-(50%/63%)) = 21% reduction in catch diode voltage rating Lower cost; component elimination. Removes high-cost gate-drive transformer (EE10 or toroid) Higher Lower --- Built-in compensation Safer design; easier to design power supply. Flattens overload output power over line voltages Package Creepage TO-220 = 1.17 mm eSIP16/12 = 2.3 mm/ 3.3 mm HiperTFS meets functional safety spacing at package pins Package Assembly 2 x TO-220 package, 2 x SIL (insulation) 1 Package TinySwitch Overload Power Compensation vs. Input Voltage Table 2. Saves up to 50 components, depending on specification. No SIL (insulation) pad required Summary of Differences Between HiperTFS and Other Typical High Power Supplies. 4 Rev. C 02/11 www.powerint.com TFS757-764HG MAIN DRAIN (D) Pin Drain of the low-side MOSFET transistor forward converter. STANDBY DRAIN (DSB) Pin Drain of the MOSFET of standby power supply. GROUND (G) Pin This pin gives a signal current path to the substrate of the low-side controller. This pin is provided to allow a separate Kelvin connection to the substrate of the low-side controller to eliminate inductive voltages that might be developed by high switching currents in the SOURCE pin. The GROUND pin is not intended to carrier high currents, instead it is intended as a voltage-reference connection only. SOURCE (S) Pin SOURCE pin that is common to both the standby and main supplies. RESET (R) Pin This pin provides information to limit the maximum duty cycle as a function of the current fed into the RESET pin during the off-time of the main converter MOSFET. This pin can also be pulled up to bypass to signal remote ON/OFF of the main converter only. BYPASS (BP) Pin This is the decoupled operating voltage pin for the low-side controller. At start-up the bypass capacitor is charged from an internal device current source. During normal operation the capacitor voltage is maintained by drawing current from the low-side bias winding on the standby power supply. This pin is also used to implement remote ON/OFF for the main controller. This is done by driving extra current into the BYPASS pin when we want to turn-on the Main controller. The BYPASS pin also implements a latch-off function to disable standby and main when the BP pin current exceeds latching threshold. Latch is reset when LINE-SENSE pin falls below UV (off) standby threshold. HIGH-SIDE OPERATING VOLTAGE (VDDH) Pin This is the high-side bias (VDD) of approximately 11.5 V. This voltage is maintained with current from a high-side bias winding on the main transformer and/or from a bootstrap diode from the low-side standby bias supply. HIGH-SIDE SOURCE (HS) Pin SOURCE pin of the high-side MOSFET. HIGH-SIDE DRAIN (HD) Pin DRAIN pin of the high-side MOSFET. This MOSFET is floating with respect to low-side source and ground. ENABLE (EN) Pin This is the ENABLE pin for the standby controller. Prior to the start-up a resistor connected from ENABLE to BYPASS, can be detected to select one of several internal current limits. BP FB L EN R S G HD HD HS S 5 6 7 8 9 10 11 13 14 16 FEEDBACK (FB) Pin This pin provides feedback for the main two transistor forward converter. An increase in current sink from FEEDBACK pin to ground, will lead to a reduction in operating duty cycle. This pin also selects the main device current limit at start-up (in a similar manner to ENABLE pin). HD 3 HS VDDH 1 DSB Exposed Metal (On Edge) Internally Connected D LINE-SENSE (L) Pin This pin provides input bulk voltage line-sense function. This information is used by the undervoltage and overvoltage detection circuits for both main and standby. The pin can also be pulled up to BYPASS or be pulled down to SOURCE to implement a remote ON/OFF of both standby and main supplies simultaneously. The LINE-SENSE pin works in conjunction with the RESET pin to implement a duty-cycle limit function. Also the LINE-SENSE pin compensates the value of standby current limit so as to flatten the output overload response as a function of input voltage. H Package (eSIP-16/12) S Pin Functional Description Exposed Pad (Backside) Internally Connected to SOURCE Pin (see eSIP-16B Package Drawing) PI-5290-110510 Figure 2. Pin Configuration. 5 www.powerint.com Rev. C 02/11 TFS757-764HG HIGH-SIDE OPERATING VOLTAGE (VDDH) HIGH-SIDE DRAIN (HD) VDDH UNDERVOLTAGE + HSD1 11.1 V 9.9 V 12 V HSD2 S DISCRIMINATOR Q R HIGH-SIDE SOURCE (HS) PI-5516-060410 BYPASS (BP) HSD1 FAULT PRESENT MAIN REMOTE-ON GATE HS PWM INPUT SOFT-START DSS 3 V+VT POWER ON ILIMIT SELECT RESET (R) + DMAX R CURRENT LIMIT COMPARATOR DUTY GATE CYCLE LIMIT CLK REMOTE OFF ON L LINE-SENSE (L) DRAIN (D) VILIMIT REMOTE OFF FEEDBACK (FB) and MAIN CURRENT LIMIT SELECT HSD2 CONTROLLED TURN-ON GATE DRIVER STOP VBG LINE SENSE LV S - Q R + LEADING EDGE BLANKING PWM COMPARATOR LV Figure 3. D2MAX CLK2 SAW PWM INPUT PI-5263-021511 THERMAL SD SOURCE (S) Functional Block Diagram for Two-Switch Forward Converter. 6 Rev. C 02/11 www.powerint.com TFS757-764HG LV (LINE VOLTAGE) BYPASS (BP) STANDBY DRAIN (DSB) REGULATOR 5.7 V 115 A FAULT PRESENT 6.0 V + AUTORESTART COUNTER ENABLE PULL UP RESISTOR SELECT AND CURRENT LIMIT STATE MACHINE RESET BYPASS PIN UNDER-VOLTAGE - 5.7 V 4.7 V VI VIN ILIMIT ADJUST LIMIT CURRENT LIMIT COMPARATOR ENABLE ENABLE (EN) and STANDBY CURREN LIMIT SELECT 1.0 V + VT + JITTER CLOCK CLK2 THERMAL SHUTDOWN DCMAX D2MAX SAW 1.0 V OSCILLATOR S Q R Q LEADING EDGE BLANKING MAIN REMOTE ON/ OVP LATCH OFF SOURCE (S) SAW MAIN REMOTE ON Figure 4. D2MAX CLK2 FAULT PRESENT THERMAL SD PI-5264-020510 Functional Block Diagram for Flyback/Standby Converter. 7 www.powerint.com Rev. C 02/11 TFS757-764HG The HiperTFS contains two switch-mode power supply controllers and associated low-side MOSFET's along with high-side driver and high-side MOSFET. * * The HiperTFS two-switch forward includes a controller along with low-side power MOSFET, high-side power MOSFET and high-side driver. This device operates in voltage mode (linear duty-cycle control) at fixed frequency (exactly half the operating frequency of the standby controller). The control converts a current input (FEEDBACK pin), to a duty-cycle at the open drain MOSFET MAIN DRAIN pin decreasing duty-cycle with increasing sourced current from the FEEDBACK pin. The HiperTFS flyback includes a controller and power MOSFET which is based on TinySwitch-III. This device operates in multi-level ON/OFF current limit control mode. The open drain MOSFET (STANDBY DRAIN pin) is turned on when the sourced current from the ENABLE pin is below the threshold and switching is disabled when the ENABLE pin current is above the threshold. In addition to the basic features, such as the high-voltage start-up, the cycle-by-cycle current limiting, loop compensation circuitry, auto-restart and thermal shutdown, the HiperTFS main controller incorporates many additional functions that reduce system cost, increase power supply performance and design flexibility. Main Converter General Introduction The Main converter for the HiperTFS, is a two-switch forward converter (although the HiperTFS could be used with other two-switch topologies). This topology involves a low-side and high-side power MOSFET, both of which are switched at the same time. In the case of the HiperTFS, the low-side MOSFET is a 725 V MOSFET (with the substrate connected to the SOURCE pin). The high-side MOSFET is a 530 V MOSFET (with the substrate connected to the HIGH-SIDE DRAIN (HD) pin). As such the substrate of both low-side and high-side MOSFET's are tied to quiet circuit nodes (0 V and VIN respectively), meaning that both MOSFETs have electrically quiet substrates - good for EMI. The low-side MOSFET has a very low COSS capacitance and thus can be hard-switched without performance penalty. Due to the external clamp configuration it is possible to substantially soft-switch the high-side MOSFET at high-loads (thus eliminating a large proportion of high-side capacitive switching loss) and improving efficiency. The higher breakdown voltage on the low-side MOSFET allows the transformer reset voltage to exceed the input voltage, and thus allow operation at duty cycles greater than 50%. Higher duty cycle operation leads to lower RMS switch currents and also lower output diode voltage-rating, both of which contribute to improved efficiency. The HiperTFS also contains a high-side driver to control the high-side MOSFET. This internal high-side driver eliminates the need for a gate-driver transformer, an expensive component that is required for many other two-switch forward circuits. Switching Frequency PI-4530-041107 Functional Description fOSC + fOSC 4 ms VDRAIN Time Figure 5. Switching Frequency Jitter (Idealized VDRAIN Waveforms). Main Start-Up Operation Once the flyback (standby) converter is up and running, the main converter can be enabled by two functions. The first condition is that the BYPASS pin remote-on current must exceed the remote-on threshold (IBP(ON)), provided by an external remote ON/OFF circuit. This current threshold has a hysteresis to prevent noise interference. Once the BYPASS remote-on has been achieved, the HiperTFS also requires that the LINESENSE pin current exceeds the UV Main-on (IL(MA-UVON)), which corresponds to approximately 315 VDC input voltage when using a 4 MW LINE-SENSE pin resistor. Once this LINE-SENSE pin threshold has been achieved the HiperTFS will enter a 12 ms pre-charge period (tD(CH)) to allow the PFC-boost stage to reach regulation before the main applies a load to the bulk-capacitor. Also during this pre-charge period the high-side driver is charged via the boot-strap diode from the low-side auxiliary voltage, and is charged when the main low-side MOSFET turns VIN 385 V t Standby Output t Main Output 12 ms Main Primary Current 12 ms t 32 ms 115% ILIM 100% ILIM t Remote ON t PI-5619a-102710 Figure 6. Supply Start-Up Sequence by Remote ON. 8 Rev. C 02/11 www.powerint.com TFS757-764HG on, while the main high-side MOSFET is held off. By the end of the pre-charge period, the PFC-boost voltage should be at or above the nominal boost voltage. The HiperTFS begins switching, going through the soft-start period (tSS). During the soft-start period the maximum duty cycle starts at 30% and is ramped during a 12 ms period to the maximum. The ramped duty cycle controls the rise slew rate of the output during start-up, allowing well controlled start-up and also facilitates a smooth transition when the control loop takes over regulation towards the end of soft-start. Also during a 32 ms period (starting at the beginning of soft-start), the main current limit is boosted to 115% of the nominal selected Main current. This allows the main to start-up within the required period for the application (typically < 20 ms for PC main applications), when there is a substantial capacitive load on the output. After the soft-start period, the current limit returns to 100% of the nominal selected current limit. Main Converter Control FEEDBACK (FB) Pin Operation The FEEDBACK pin is the input for control loop feedback from the main control loop. During normal operation the FEEDBACK pin is used to provide duty cycle control for the main converter. The system output voltage is detected and converted into a feedback current. The main converter duty cycle will reduce as more current is sourced from the FEEDBACK pin, reaching zero duty cycle at approximately 2.1 mA. The nominal voltage of the FEEDBACK pin is maintained at approximately 3.5 V. An internal pole on the FEEDBACK pin is set to approximately 12 kHz, in order to facilitate optimal control loop response. The maximum duty cycle of the main converter is defined by the LINE-SENSE pin and RESET pin behavior and is a dynamically calculated value according to cycle-by-cycle conditions on the LINE-SENSE pin and RESET pin. Duty (D) 78% IL = 60 A IR = 170 A 63% Typical IL and IR currents at VMIN Limited by L & R pin duty limit FEEDBACK Pin Current IFB 0% 1 mA Figure 7. 2.1 mA PI-5885-082610 PWM Duty Cycle vs. Control Current. Main High-Side Driver The high-side driver is a device that is electrically floating at the potential of the HIGH-SIDE MOSFET SOURCE (HS) pin. This device provides gate-drive for the high-side Main MOSFET. The low-side main and high-side main MOSFET's switch simultaneously. The high-side driver has a HIGH-SIDE OPERATING VOLTAGE supply pin. External circuitry provides a current source into this HIGH-SIDE OPERATING VOLTAGE pin. The high-side operating voltage has an internal 12 V shunt-regulator. The device consumes approximately 2 mA when driving the high-side MOSFET. The HIGH-SIDE OPERATING VOLTAGE pin has an undervoltage lock-out threshold, to prevent gate-drive when the supply voltage drops below a safe threshold. At power-up the high-side driver remains in the off-state, until the HIGH-SIDE OPERATING VOLTAGE pin is charged above 10.5 V, at which point the high-side driver becomes active. The high-side driver is initially charged via a boot-strap diode connected via a diode to the HIGH-SIDE OPERATING VOLTAGE pin from the low-side standby auxiliary supply (approximately 12 V). During start-up the high-side MOSFET remains off, but the low-side MOSFET is turned on for a period of 14 ms to allow pre-charge of the high-side operating voltage to 12 V. After this period, the highside operating voltage is supplied by a forward-winding coupled to the main transformer. This floating winding provides energy every time the main converter switches one cycle. The operating power for high-side operating voltage can also be provided from a floating winding on the standby supply. However this would continue delivering power even when the main converter is in remote-off, and thus is considered undesirable from a standby light-load efficiency point of view. Once the high-side driver is operating it receives level-shifted drive commands from the low-side device. These drive commands cause both turn-on and turn-off drive of the high-side main MOSFET simultaneously with that of the low-side main MOSFET. The high-side driver also contains a thermal shutdown on-chip, but this is set to a temperature above the thermal shutdown temperature of the low-side device. Thus the low-side will always shutdown first. Main Converter Maximum Duty Cycle The LINE-SENSE pin resistor converts the input voltage into an LINE-SENSE pin current signal. The RESET pin resistor converts the reset voltage into an RESET pin current signal. The LINE-SENSE pin and RESET pin currents allow the HiperTFS to determine a maximum duty cycle envelope on a cycle-by-cycle basis. This feature ensures sufficient time for transformer reset on a cycle-by-cycle basis and also protects against single-cycle transformer saturation and at high-input voltage by limiting the maximum duty cycle to prevent the transformer from reaching an unsafe flux density during the on-time period. Both of these features allow the optimal performance to be obtained from the main transformer. The duty cycle limit is trimmed during production. The LINE-SENSE pin and RESET pin are sampled just before the turn-on of the next main cycle. This is done to sample at a point when there is minimal noise in the system. Due to the low current signal input to the LINE-SENSE pin and RESET pin, care should be taken to prevent noise injection on these pins (see Applications section layout guidelines for details). Main On-Chip Current Limit with External Selection During start-up, the FEEDBACK pin and ENABLE pin are both used to select internal current limits for the main and standby converters respectively. The detection period occurs at the initial start-up of the device, and before the main or standby MOSFETs start switching. This is done to minimize noise interference. 9 www.powerint.com Rev. C 02/11 TFS757-764HG PI-5977-061010 0.7 Duty Cycle Limit IL = 60 A IL = 90 A 0.6 IL = 100 A 0.5 IL = 115 A 0.4 0.5 1.0 1.5 2.0 2.5 3.0 IR/IL Figure 8. Duty Cycle Limit vs. Ratio of R Pin Current Over L Pin Current. A resistor RFB is connected from the BYPASS pin to the FEEDBACK pin. This resistor feeds current into the FEEDBACK pin (who's voltage is clamped to approximately 1 V during this detection period). The current into the FEEDBACK pin is determined by the value of the resistor, and thus the input current (and indirectly the resistor value), select an internal current limit according to the following table. IFB (Threshold) REN(SELECT) (1%) ILIMIT 0.0-5.1 mA L1 60% mA Open kW 5.1-11.9 mA L2 80% mA 511.0 kW 11.9-23.8 mA L3 100% mA 232.0 kW Table 3. FEEDBACK Pin Main Current Limit Selection. UV(ON)STANDBY, I(L) = 25 A I(L) V(BP) 4.7 V 5.7 V 1V V(FB) V(EN) 6.0 V after standby acheives regulation Main Line Undervoltage Detection (UV) The LINE-SENSE pin resistor is connected to VIN and generates a current signal proportional to VIN. The LINE-SENSE pin voltage is held by the device at 2.35 V. The LINE-SENSE pin current signal is used to trigger under/overvoltage thresholds for both the standby and main converters. Assuming a LINE-SENSE pin resistor of 4 MW, the standby will begin operating when the LINE-SENSE pin current exceeds the (IL(SB-UVON)) threshold, nominally approximately 100 V. However the main is still held in the off-state, until the LINE-SENSE pin current exceeds the (IL(MA-UVON)) threshold, nominally 315 V for 4 MW. There is hysteresis for both main and standby undervoltage-off thresholds, to allow sufficient margin to avoid accidental triggering, and to provide sufficient margin to meet hold-up time requirements. Bear in mind that the main converter may start to loose regulation before it finally shuts down. This is because the dynamic duty cycle limit may clamp the duty cycle below that required for regulation at lower input voltages. Once the input voltage falls below the 215 V (IL(MA_UVOFF)) threshold, the main will shutdown but standby will continue to operate. The standby will turn off when the input voltage drops below approximately 40 V (IL(SB-UVON)). 2.7 V 2.2 V TSELECT - current limit selection occurs here during device start-up and before power supply switching PI-5975-102610 Figure 9. Current Limit Selection. 10 Rev. C 02/11 www.powerint.com TFS757-764HG Standby Power General Introduction The standby is a wide range power supply, typically a flyback converter, operating over a wide input range (85-265 VAC) and delivering up to 20 W continuous output power. The standby power supply provides two functions in most high-power applications. It provides a direct secondary output but also provide bias power to other primary-side devices (in particular typically a PFC boost converter). Supply Start-Up Sequence VIN 385 V 315 V 100 V The HiperTFS standby retains most features of the TinySwitch-III, such as auto-restart, thermal shutdown, multi-level current limit ON/OFF control, etc. The HiperTFS standby controller has a few differences versus TinySwitch-III: 30 V Standby Output 12 ms 2-20 ms Main Output 6.0 V VBP 4.7 V 5.7 V PI-5611a-062710 Figure 10. Main and Standby Start-Up. Main Reset Overvoltage Detection There is also an overvoltage threshold for the RESET pin. When triggered, the RESET overvoltage will shutdown only the Main, leaving the Standby in operation. To VIN 300 V RL To Clamp Reset Circuit 240 V R L 40 V Standby Output Main Output tHOLDUP 20 ms Typically turned off by secondary supervisor circuit, once regulation below limit t1 t2 t3 In a high-power system, the standby power supply is the first power supply to begin operating. The main converter cannot begin working until the standby is in operation. Likewise the main converter will shutdown at a higher-voltage than the standby and thus the standby is always the last power supply to shutdown. Standby On-Chip Current Limit with External Selection During start-up, the FEEDBACK pin and ENABLE pin are both used to select internal current limits for the Main and Standby converters respectively. The detection period occurs at the initial start-up of the device (just after BYPASS pin voltage of 4.7 V is achieved), and before the main or standby MOSFETs start switching. This is done to minimize noise interference. RR HiperTFS VIN 385 V 1. There are 4 current limits that are selected via the ENABLE pin (rather than by using different BYPASS pin capacitors as in TinySwitch-III). There are 4 user selectable current limits 500, 550, 650, 750 mA design for secondary standby output power of 10, 12.5, 15 and 20 W. 2. Secondary OVP latching shutdown. This is triggered via a current in excess of the BYPASS pin latching shutdown threshold (IBP(SD) = 15 mA). 3. Dedicated LINE-SENSE pin for line-voltage detection providing absolute UV and OV ON/OFF thresholds (unlike TinySwitch-III which detects input voltage only during restart). 4. Current limit is compensated as a function of input voltage to maintain a flat overload characteristic versus input voltage. t4 PI-5612a-060910 I EN (Threshold) R EN (Select) (1%) ILIMIT 0.0-8.5 mA L1 500 mA Open kW 8.5-17.7 mA L2 650 mA 280.0 kW 17.7-33.0 mA L3 750 mA 137.0 KW 33.0-66.0 mA L4 550 mA 63.4 kW Table 4. ENABLE Pin Standby Current Limit Selection. The ENABLE pin works in a similar way to the FEEDBACK pin selection. The only difference being that the ENABLE pin is not clamped to 1 V during selection, instead remaining at 2.35 V during the detection period. Thus the selection resistor values Figure 11. L and R Pin Duty Limit Mode. 11 www.powerint.com Rev. C 02/11 TFS757-764HG are slightly different for the ENABLE pin versus the FEEDBACK pin. The ENABLE pin internal current selection is chosen according to the above table. The current limit selection for both FEEDBACK pin and ENABLE pin takes place when the BYPASS pin first reaches 4.7 V. Once the short detection period is complete, the BYPASS pin is ramped on up to 5.7 V, and the FEEDBACK pin is allowed to float to it's nominal voltage of 3.5 V. Standby Line Compensated Current Limit to Flatten Output Overload For many power supplies, the power output capability of the power supply increases dramatically as the input voltage increases. This means that most power supplies are able to deliver much more power (up to 30-40% more power), into a fault overload when operating at higher input voltage (versus operating at lower input voltage). This can cause a problem since many specifications require that the output overload power capability of the device is more tightly managed. Output Overload Power (%) 150 140 Not Compensated 130 PI-5884-052510 In the case of the HiperTFS, the standby current limit is adjusted as a function of line (input voltage), in such a ways as to always provide substantially the same maximum overload power capability. The input voltage is detected via the LINE-SENSE pin current and the internal standby current limit of the device is adjusted accordingly on a cycle-by-cycle basis. This means that the HiperTFS standby will only deliver approximately 5% more overload power at high-line as it did at low-line. This feature provides a much safer design. 120 110 Compensated 100 90 80 50 100 150 200 250 300 350 400 450 VIN DC (V) Figure 12. Shows Output Overload Power for Both Compensated and Uncompensated Standby Current Limits. Standby Line Undervoltage Detection (UV) The LINE-SENSE pin resistor is connected to VIN and generates a current signal proportional to VIN. The LINE-SENSE pin voltage is held by the device at 2.35 V. The LINE-SENSE pin current signal is used to trigger under/overvoltage thresholds for both the standby and main converters. Assuming a LINE-SENSE pin resistor of 4 MW, the standby will begin operating at approximately 100 V (as defined by IL(SB_UVON)). The standby will shutdown if regulation is lost when input voltage is below 100 V. However the standby will be forced to shutdown if this input voltage drops below approximately 40 V (as defined by IL(SB-UVOFF)). Main and Standby Oscillator and Switching Frequency The standby converter operates at a frequency of 132 kHz. The main converter operates at exactly half that frequency at 66 kHz. The two converters both include a common frequency jitter profile that varies the switching frequency 4 kHz for the main (twice the jitter frequency range 8 kHz for the standby), during a 4 ms jitter period. The frequency jitter helps reduce quasipeak and average EMI emissions. It should be noted that the HiperTFS has a collision avoidance scheme in which the main converter is the master and the standby is the slave, which avoids the main and standby switching at exactly simultaneous moments. The most common condition would be close to 50% duty cycle, if the main (master) is about to switch (turn-off), then the standby (slave), waits for short instant (200 ns) before starting it's next cycle. The standby is used as the slave, since the ON/OFF control of the HiperTFS standby is less easily disrupted by sudden delays in switching, versus the linear control loop of the main converter. Standby and Main Thermal Shutdown The HiperTFS provides a thermal shutdown function, (OTP) that protects the HiperTFS. This hysteretic thermal shutdown allows the device to automatically recover from any thermal fault event. The thermal shutdown is triggered at a die-temperature of approximately 118 C and has a high hysteresis to ensure the average device temperature is within safe levels. In a well designed system the HiperTFS thermal shutdown is not triggered during any normal operation and is only present as a safety feature to protect against abnormal or fault conditions. BYPASS (BP) Pin Operation The BYPASS (BP) pin is the supply pin for the entire HiperTFS device. The BYPASS pin is internally connected to a high-voltage current source via the STANDBY DRAIN power MOSFET. This high-voltage source will charge the BYPASS pin to 4.7 V during initial power up. Once the BYPASS pin reaches 4.7 V, the BYPASS pin will check the main and standby current limit selection (FEEDBACK pin and ENABLE pin resistors respectively). This selection takes a very short period, thereafter the BYPASS pin continues being charged until it reaches 5.7 V, at which point the standby power supply is ready to begin operation. Like the TinySwitch-III the high-voltage current source will continue to charge the BYPASS pin if it droops below 5.7 V. However in most typical applications, a resistor (typically 7.5 kW) is connected from primary bias (12 V) to the BYPASS pin. This resistor provides the operating current to the BYPASS pin, preventing the need to draw power from the high-voltage current source. Like the TinySwitch-III, the BYPASS pin contains a shunt regulator, which will be enabled if the BYPASS pin voltage is externally driven above 5.7 V. The BYPASS pin shunt current is used for two functions: 1. First, for a 4 mA threshold (IBP(ON)) for main remote-on. When the BYPASS pin current exceeds this threshold, the main is enabled. 12 Rev. C 02/11 www.powerint.com TFS757-764HG 2. Second a 15 mA threshold (IBP(SD))for standby secondary OVP latch-off. When the BYPASS pin current exceeds this threshold, the standby and main converters are latched-off. This latch can be reset by pulling the LINE-SENSE pin below the line undervoltage threshold (IL(SB-UVOFF)), or by discharging the BYPASS pin below 4.7 V. Note: unlike the TinySwitch-III the HiperTFS BYPASS pin capacitor does not provide any programming capability. Instead the recommended BYPASS pin capacitor should always be a 1 mF (ceramic) capacitor. Main and Standby Line Overvoltage Detection (OV) The overvoltage threshold is included in the device, and can be used to disable the device during overvoltage (with the use of an additional external signal Zener). The overvoltage threshold is set sufficiently high to prevent accidental triggering during boost PFC overshoot conditions. When the overvoltage condition is triggered, it will simultaneously shutdown both the Main and Standby. The overvoltage feature is intended for use with external components (circuitry), to program the overvoltage threshold independently of the undervoltage thresholds (see the Applications section for details). Output Power Table Product TFS757HG TFS758HG TFS759HG TFS760HG TFS761HG TFS762HG TFS763HG TFS764HG 2 Two-Switched Forward 380 V Continuous1 Continuous1 Peak (25 C) (50 C) (50 C) 193 W 163 W 228 W 236 W 200 W 278 W 280 W 235 W 309 W 305 W 258 W 358 W 326 W 276 W 383 W 360 W 304 W 407 W 388 W 327 W 455 W 414 W 344 W 530 W Flyback 100 V - 400 V 50 C 20 W 20 W 20 W 20 W 20 W 20 W 20 W 20 W Table 5. Output Power Table. Notes: 1. Maximum practical continuous power in an open frame design with adequate heat sinking (assuming heat sink C-A of <4 C/W), measured at specified ambient temperature (see Key Applications Considerations for more information). 2. Package: eSIP16/12. (Note: Direct attach to heat sink, does not require insulation SIL pad) High-Power eSIP Package The HiperTFS package is designed to minimize the physical size of the device, while maintaining a low thermal impedance and sufficient electrical spacing for the pins. The package has 12 functional pins with 4 pins removed for increased pin-to-pin spacing between high-voltage pins. The low-side two-switch forward and flyback MOSFETs have a thermal impedance of less than 1 C/W to the exposed pad on the back of the package. Since this pad is referenced to the SOURCE pin (Source), it is at electrical ground potential and thus can be connected to the heat sink without need for electrical insulation. The high-side MOSFET is over-molded to achieve electrical isolation and thus also allows direct connection to the heat sink. 13 www.powerint.com Rev. C 02/11 Design, Assemble and Layout Considerations 80 Power Table 70 PI-2576-010600 TFS757-764HG Hold-Up Time The input capacitor is a critical component in designing for a guaranteed minimum hold-up time. Proper design of the transformer's nominal duty cycle and sufficient primary winding clamp voltage for rest of Main transformer are also essential. PIXLS (PI Expert Design Spreadsheet) can compute these values or refer to formula in AN-51. Bias Support for High-Side Driver Bias support for HiperTFS high-side switch is sourced from a forward phased winding of the Main transformer and should provide a minimum of 17 V at 300 VDC input (or minimum input voltage at which regulation can be maintained) to guarantee the 12 V bias required for the high-side driver is maintained. 40 30 20 -10 EN55022B (QP) EN55022B (AV) -10 -20 0.15 10 Frequency (MHz) 80 70 60 50 40 30 20 -10 0 EN55022B (QP) EN55022B (AV) -10 -20 0.15 1 10 30 Frequency (MHz) Figure 14. Full Range EMI Scan (132 kHz with Jitter) With Identical Circuitry and Conditions. 150 V +VBUS HiperTFS VDDH HD CONTROL R HS L DR1 D FB EN DSB BP RTN Figure 15. G S DR2 PI-5846-111810 Typical Primary Winding Clamp-to-Rail. 14 Rev. C 02/11 30 Figure 13. Fixed Frequency Operation Without Jitter. Primary Bias Support The standby converter provides a minimum 17 V output that biases the BYPASS pin of HiperTFS. It is also the source for remote ON/OFF control and OVP. This output should be capable of delivering a minimum of 20 mA. The primary bias filter capacitor should be at 330 mF to hold up the bias during the start-up transient. Start-Up There is a duty factor soft-start function at start-up that slews from 30% duty factor to max duty factor in approximately 15 ms. The current limit during start-up is actually boosted by 115% for the first 32 ms to provide the ability to drive heavy capacitive loads and meet less than 20 ms output rise time requirement. 1 PI-5856-030810 HiperTFS Selection Selecting the optimum HiperTFS depends upon the continuous output power, thermal management, (heat sinking, etc.), and maximum ambient operating temperature. OEM applications are typically 50 C max ambient while clone PC supplies are usually specified at 25 C ambient. Higher efficiency can be achieved with the larger devices. The maximum output power can be tailored for any given device by programming primary ILIMIT(MA). 50 0 Amplitude (dBV) 1. Typical multi-output PC main with the following outputs +12 V, +5 V, +3.3 V, -12 V, and +5 V standby. 2. A boost regulated DC input for Main 300 VDC to 385 VDC minimum nominal of 375 VDC. 3. HiperTFS total efficiency at least 85% at full load. 4. Schottky high-efficiency output diodes. 5. DC input for Standby 130 VDC to 385 VDC. 6. Sufficient heat sinking and fan cooling to keep device temperature below 100 C. 7. Transformer designed with nominal duty factor of 45%. Amplitude (dBV) 60 The data sheet power table (Table 1, page 1) represents the maximum advised continuous power based on the following conditions; www.powerint.com TFS757-764HG HiperTFS VDDH HD CONTROL R HS L D FB ~50 Newtons EN DSB BP To Bulk Capacitor G Minimum Clearance is 0.078 inches S PI-5883-032410 PI-5882-111710 Figure 16. HiperTFS Layout Considerations. Figure 17. HiperTFS Heat Sink Mounting. EMI The frequency jitter feature modulates the switching frequency over a narrow band as a means to reduce conducted EMI average and quasi-peaks associated with the harmonics of the fundamental switching frequency. This is particularly beneficial for average conduction mode where the sampling bandwidth is narrow. The modulation rate is nominally 250 Hz which is high enough to reduce EMI but low enough to have negligible effect on output ripple (rejected by control loop). an over-molded, electrically isolated section of the package backside that provides isolation between the heat sink and the internal high-side switch. Thermal heat sink compound, and a mounting clip providing a minimum torque of 50 Newtons, are required for good thermal performance. The heat sink temperature behind device should not exceed 95 C to avoid activating the over-temperature shutdown of HiperTFS. Since some of the HiperTFS pins are bent towards the heat sink, there needs to be a minimum of 0.078 inches clearance between heat sink and PC board. Transformer Design It is recommended that the transformer be designed for a maximum flux density of 3000 Gauss during continuous maximum output power and a maximum peak transient flux density no greater than 4000 Gauss. The turns ratio should be chosen for a nominal duty factor of 45% at 385 VDC input to guarantee transformer reset with typical primary winding clamp-to-rail (Figure 15). For nominal duty factor of higher value it is recommend to refer to AN-51 and use PIXLS spreadsheet for optimal transformer design. Typically the transformer should have foil secondary windings for outputs above 10 amps. The primary winding should be split primary type to keep leakage inductance low. Standby Mode Consumption The HiperTFS standby converter is essentially a TinySwitch-III controller which uses whole-cycle ON/OFF control. This has the benefit of operating at a low average frequency at lighter loads which increases efficiency and reducers no-load consumption. Heat Sinking The HiperTFS package is eSIP-16/12. There is a metal exposed pad that provides a low thermal path to the heat sink for the low-side power device and standby power device. There is also Layout Considerations Use a single point connection between, SOURCE pin, GROUND pin and bypass capacitor. Typically the bypass capacitor is a surface mount type and is located directly under the HiperTFS package between the GROUND pin and the BYPASS pin. The FEEDBACK pin and ENABLE pin along with the LINESENSE and RESET pins should be kept away from noisy, high voltage switching areas. If it is unavoidable to have long traces connecting to FEEDBACK pins then route these traces close to quiet, low impedance traces, that act as a Faraday shield. The LINE-SENSE and RESET pins are associated with multiple series resistor sections due to the high-voltage sensing. Make sure the last resistor in series chain is SMD type and place it very close to the pin. This will minimize the pick-up of noise. The primary auxiliary bias output rectifier and filter should be star referenced to bulk capacitor. Any Y capacitors referenced to DC primary should also be tied to quiet nodes of bulk capacitor negative or positive terminal. 15 www.powerint.com Rev. C 02/11 TFS757-764HG VIN R1 VHIGH_BIAS R1_MAX = VHIGH_BIAS -VDDH 1 mA Minimum Supply Current to VDDH = 1 mA VHIGH_BIAS_(MIN) = VAUX_(MIN) = 14 V C1 HiperTFS VDDH C2 HD CONTROL Main Transformer R CR1 HS L D FB EN DSB VAUX BP G Standby Transformer C3 S PI-5881-082610 Figure 18. High-Side Bias. HiperTFS VOUT(OV) = (15 mA x R1) + V1 + 1 VOUT VDDH HD CONTROL R R1 VBIAS IC1 (CTR = 1) HS L D FB EN V1 DSB BP IOVP 15 mA G S PI-5879-111710 Figure 19. Latching Output OVP. 16 Rev. C 02/11 www.powerint.com TFS757-764HG VIN VBIAS VOUT(OV) = V1 + 1 V HiperTFS VDDH R1 VOUT HD CONTROL R L FB HS R1 VAUX - VCE_OPTO IL(MA_OVOFF) D R1 12 V - 0.3 V 146 A EN V1 DSB BP G S PI-5878-111710 Figure 20. Non-Latching Output OVP. VBIAS Standby Out HiperTFS VDDH IREMOTE_MIN = 1 mA HD CONTROL R REM ISTANDBY_MIN = 900 A R3 10 k Remote ON 13 V R2 Q1 D FB VON R4 1 k HS L EN R1 DSB 6V BP ION_MIN = 5 mA R1 = VON - 6.7 V 5 mA R2 = G VAUX(MIN) - 6 V 900 A S PI-5877-111710 Figure 21. Remote ON and Standby Bias. 17 www.powerint.com Rev. C 02/11 TFS757-764HG VIN VBIAS R2 3.9 M 100 k 10 k HiperTFS VDDH HD CONTROL Q1 R R1 90 k HS L 300 k EN R1 + R2 = 4 M IL(OV) = R1 = D FB VR1 (+12 V) DSB VIN(OV) R1 + R2 BP VR1 - 1.9 V IL(OV) G S PI-5876-111710 Figure 22. Input OVP (Latching). VIN VBIAS R2 3.9 M HiperTFS VDDH 100 k 10 k HD CONTROL R1 90 k 20 k VR1 (+12 V) R HS L D FB R1 + R2 = 4 M IL(OV) = R1 = VIN(OV) R1 + R2 VR1 - 1.9 V IL(OV) EN DSB BP G S PI-5875-111710 Figure 23. Non-latching Input OVP. 18 Rev. C 02/11 www.powerint.com TFS757-764HG HiperTFS VDDH HD CONTROL R VBIAS HS L L 6.8 M AC Input N D FB 100 k EN 6.8 M 0.1 F 1 M DSB Q2 1 M BP Q1 G S PI-5874-111710 Figure 24. Fast AC Reset of BP Latch. R1 = R2 = 4 M R1 150 V R2 HiperTFS VDDH HD CONTROL R HS L D FB EN DSB BP G S PI-5873-020411 Figure 25. L and R Pin Reset and Duty Limit Circuit. 19 www.powerint.com Rev. C 02/11 TFS757-764HG L and R Pin Transformer Reset and Forward Duty Clamp Protection Duty Factor Regulation (FB) duty cycle 60% Hard limit Reset duty clamp To VIN RL To Clamp Reset Circuit RR R This region for transient response 45% 75 A (300 V) L Forward duty clamp 100 A L Pin Current (385 V) (VIN with RL = 4 M) HiperTFS Available duty cycle range PI-5880-111710 Figure 26. L and R Pin Duty Limit With RL = 4 MW and RR = 4 MW. Applications Example High Efficiency +12 V, 25 A Main Output and +5 V 2.5 A Standby Power Supply The circuit in Figure 26 is an example of a design using HiperTFS providing a 300 W +12 V output forward derived Main converter and a 12 W +5 V Standby output from the flyback controller of HiperTFS. The very high integration of two full converters within a single package immediately shows the result of very low external parts count for the entire design. Both the main converter and the flyback section of HiperTFS are designed to give very high-efficiency. The main converter takes advantage of the ability to operate above 50% duty factor which lowers RMS switch currents and allows using lower voltage more efficient Schottky diodes on the output. The flyback section uses Power Integrations TinySwitch technology which is often used in designs that demand high-efficiency and low no-load input power consumption. The design in Figure 27 is intended to work with a PFC boost front end that nominally provides a 385 VDC input. The main converter will regulate to full load between 300 VDC and 385 VDC. This voltage range guarantees greater than 20 ms hold-up time with C1 (270 mF). The standby section is designed to operate whether the boost PFC stage is on or off. The standby therefore is designed to operate from 100 VDC to 385 VDC which covers the normal universal input of 90 VAC to 265 VAC. The start-up sequence is initiated with HiperTFS charging the BYPASS pin capacitor via internal high-voltage current source. Current limit selection then follows via FEEDBACK pin and ENABLE pin resistors. The HiperTFS then senses the input voltage via the LINE-SENSE pin resistor series chain R12, R13, R35. When the input voltage reaches 100 V VDC the LINESENSE pin UV standby threshold is reached and the standby converter turns on. After several milliseconds the standby output will reach regulation and the primary VON +12 V bias will be stable. When the input bulk voltage reaches 315 VDC which is the UV threshold for the main converter, the main converter will initiate a turn on sequence once the remote-on command from secondary is activated. The remote-on switch (SW1) on the secondary-side for this particular design allows the user to manually activate that main converter by turning on the remote-on optocoupler. In actual PC designs the remoteon would be controlled by a computer start-up command. This optocoupler sources 5 mA into the BYPASS pin of the HiperTFS which is the threshold current to start the turn on sequence for 20 Rev. C 02/11 www.powerint.com TFS757-764HG the Main converter. The Main converter will first turn on the bottom switch to allow the high-side drive to receive the bootstrap bias. After 14 ms the Main converter will start switching both switches at 66 kHz and the main output voltage will rise. Once the regulator U5 becomes active, current will flow through the optocoupler U1. The collector of U1 will sink current out of the FEEDBACK pin to adjust for appropriate duty cycle to maintain regulation. The normal operating sink current is between 1 mA and 2 mA. There is a forward phased bias winding off the main transformer that provides sustained bias for the high-side driver. During normal and brownout operation the RESET pin senses the turn off clamp voltage via the resistor chain R6, R18, R19 and the internal controller determines the maximum safe duty factor by comparing the RESET pin current with the LINE-SENSE pin current. This features guarantees that J3-1 saturation of the transformer is completely avoided in all conditions including brownout and load transients. The LINE- SENSE pin also has a UV low threshold which turns off the Main converter when the input voltage is below 215 V. This design in particular is intended to operate with a minimum of 30 CFM airflow at full load. Both the main and standby output have overvoltage protection from sense circuit around U4 which will source >15 mA during fault into bypass pin to cause latching shut-off of both converters. The standby uses auto-restart to protect the standby output from overpower and over-current. The main output is current limited by the selected internal primary current limit of the main switch path. VR1 ZMM5242B-7 12 V 12 V 380 VDC R1 2.2 VR3 P6KE150A C2 3.3 nF R12 1.33 M R6 100 R16 7.5 k D13* 1N5404 Q1 MMBT4401 R23 1 k R22 4.7 k D10 BAS16HT1G J4-1 VR4 MMSZ5243BT1G 13 V 13 VDDH CONTROL R36 1.33 M U4B PC817X1J00F 7 R L 9 R25 232 k FB 10 R29 470 BP 11 R27 280 k U1B PC817XI1J00F 16 HD C6 100 nF C3 100 nF R3 100 5 G C19 1 nF R4 150 RTN +12 V R15 750 R9 15 k U1A PC817XI1J00F R21 2 k D6 M6060C-E3/45 2 1 D 6 2 R26 47 D11 STPS1045B C4 100 nF C9 1 nF R11 43.2 k C5 47 nF C10 3300 F 6 S D9 UF4005 C12 1 F 14 - 25 V C21 2.2 nF D12 RGP100 C20 330 F *Optional component for accidental reverse connection C17 2200 F C11 3300 F R24 3.92 k RTN L2 2.2 H 9,10 1 R10 221 C8 100 nF U5 LM431 9,10 C13 100 nF TSTANDBY 3 DSB EN D7 M6060C-E3/45 14 HS U2B PC817XI1J00F J3-3 D2 +5 V R28 100 C14 470 nF SW1 Remote ON/OFF 8 EN 5V L1 3.3 H T 1 MAIN 13,14 D8 UF4005 FB C18 1 nF R14 2 k D5 BAV20 U6 TFS762HG R19 1.33 M VR2 ZMM5230B-7 4.7 V D4 1N4007 R18 1.33 M R17 820 R35 1.33 M R20 4.7 k R7 4.7 R8 4.7 R13 1.33 M U3B PC817X1J00F C1 270 F D3 1N4007 R5 4.7 U4A PC817XI1JD0F F2 4A U2A PC817XI1J00F R30 1 k R34 4.75 k C15 2200 F R32 4.7 k R33 1 k U7 LM431 3 5 6,7 C16 330 nF U3A PC817XI1J00F R31 4.75 k PI-5969-102810 RTN Figure 27. Schematic of High-Efficiency +12 V, 25 A Main Output and +5 V, 2.5 A Standby Power Supply. 21 www.powerint.com Rev. C 02/11 TFS757-764HG - HV + Y Capacitor F1 C21 D5 R35 D1 Transformer D9 R13 D6 C10+ R15 R36 R9 TP1 C8 C13 C9 T2 HF LC Post-Filter C11+ R10 R18 D3 R21 R6 R15 D4 R24 R7 R8 R11 C2 C4 R27 C12 R1 C16 C2 VR3 L1 D7 C3 C6 R25 R12 C13 R14 + C1 D8 J3 J1 - R26 U4 J2 R31 R34 C14 C16 R28 U3 R30 U2 U7 R33 R3 R17 R20 R22 R29 VR4 R23 D10 C18 R16 C20 J4 + VR2 VR1 C17 + D12 12 V R32 L2 5V - R4 C15 SW1 D2 C7 PI-5872-042710 Figure 28. Layout of High-Efficiency +12 V, 25 A Main Output and +5 V, 2.5 A Standby Power Supply. 22 Rev. C 02/11 www.powerint.com TFS757-764HG Absolute Maximum Ratings(1,5) DRAIN Voltage High-Side MOSFET .......................-0.3 V to 530 V DRAIN Peak Current High-Side: TFS757.................... 3.1 (5.9)4 A TFS758....................4.5 (8.4)4 A TFS759....................5.0 (9.3)4 A TFS760.................. 5.7 (10.7)4 A TFS761...................6.1 (11.4)4 A TFS762...................6.4 (12.1)4 A TFS763.................. 7.2 (13.4)4 A TFS764.................. 8.3 (15.5)4 A DRAIN Voltage Low-Side MOSFET..................... -0.3 V to 725 V DRAIN Peak Current Low-Side: TFS757.................... 3.1 (5.9)4 A TFS758....................4.5 (8.4)4 A TFS759....................5.0 (9.3)4 A TFS760.................. 5.7 (10.7)4 A TFS761...................6.1 (11.4)4 A TFS762...................6.4 (12.1)4 A TFS763.................. 7.2 (13.4)4 A TFS764................. 8.3 (15.5)4 A DRAIN Voltage Standby MOSFET....................... -0.3 V to 725 V DRAIN Peak Current Standby MOSFET................. 1.20 (2.25)4 A Enable (EN) Pin Voltage ............................................. -0.3 V to 9 V Enable (EN) Pin Current ................................................... 100 mA Feedback (FB) Pin Voltage ........................................ -0.3 V to 9 V Feedback (FB) Current ..................................................... 100 mA Line Sense (L) Pin Voltage ............................................-0.3 V to 9 V Line Sense (L) Pin Current ....................................................100 ma Reset (R) Pin Voltage ................................................. -0.3 V to 9 V Reset (R) Pin Current .......................................................... 100 mA Bypass Supply (BP) Pin Voltage ............................... -0.3 V to 9 V Bypass Supply (BP) Pin Current ......................................... 100 mA High Side (VDDH) Supply Pin Voltage ..................-0.3 V to 13.4 V High Side (VDDH) Supply Pin Current ..................................50 mA Storage Temperature .............................................-65 C to 150 C Operating Junction Temperature(2).......................-40 C to 150 C Lead Temperature(3) ..................................................................260 C Notes: 1. All voltages referenced to SOURCE, TJ = 25 C. 2. Normally limited by internal circuitry. 3. 1/16 in. (1.59 mm) from case for 5 seconds. 4. The higher peak DRAIN current is allowed while the DRAIN voltage is simultaneously less than 400 V. 5. Maximum ratings specified may be applied one at a time, without causing permanent damage to the product. Exposure to Absolute Rating conditions for extended periods of time may affect product reliability. Thermal Resistance High-Side MOSFET (qJC) TFS757, TFS758..................... 15 C/W TFS759, TFS760..................... 14 C/W TFS761, TFS762..................... 13 C/W TFS763, TFS764..................... 12 C/W Parameter Symbol Low-Side MOSFET (qJC) .................................................1 C/W Notes: 1. All voltages referenced to SOURCE, TA = 25 C. Conditions SOURCE = 0 V; TJ = 0 C to 100 C (Unless Otherwise Specified) Min Typ Max 62 66 4 70 Units Control Functions Switching Frequency - PC Main Frequency Jitter Modulation Rate Remote-ON Main BYPASS Pin Remote-ON Current BYPASS Pin RemoteOFF Current Hysteresis BYPASS Pin Latching Shutdown Threshold Main/Standby RemoteON Delay Main/Standby RemoteOFF Delay Main/Standby RemoteOFF Long Time Period Soft-Start High-Side Start-Up Charge Time Main Current Limit at Start-Up Soft-Start Period fS(MA) TJ = 25 C Average Peak-to-Peak Jitter fM(MA) IBP(ON) 250 VEN = Open 3.2 IBP(OFF) 3.8 Hz 4.4 1.1 IBP(SD) 13 15.5 kHz mA mA 17.5 mA tR(ON) 2.5 ms tR(OFF) 2.5 ms tR(PERIOD) 80 ms tD(CH) 14 ms 115 % ILIM(SS) See Note A 12 ms 23 www.powerint.com Rev. C 02/11 TFS757-764HG Symbol Conditions SOURCE = 0 V; TJ = 0 C to 100 C (Unless Otherwise Specified) PWM Gain DCREG(MA) -1800 mA < IFB < -1500 mA, IL = 60 mA, IR = 160 mA PWM Gain Temperature Drift TCDCREG Parameter Min Typ Max Units FEEDBACK Pin FEEDBACK Pin Feedback Onset current IFB(ON) FEEDBACK Pin Current at Zero Duty Cycle IFB(OFF) FEEDBACK Pin Internal Filter Pole PFB FEEDBACK Pin Voltage VFB IL = 60 mA, IR = 170 mA TJ = 25 C IFB (OFF), IFB = IFB(ON) -70 %/mA 0.05 %/C -1.1 mA -2.1 mA 12 kHz 3.56 V LINE-SENSE Pin (Line Voltage) Line Undervoltage Threshold - Standby Line Undervoltage Threshold - Main IL(SB-UVON) TJ = 25 C Threshold 25 IL(SB-UVOFF) IL(MA-UVON) IL(MA-UVOFF) Line Overvoltage Threshold - Main and Standby IL(MA-OVOFF) LINE-SENSE Pin Voltage VL LINE-SENSE Pin Short Circuit IL(SC) IL(MA-OVON) mA 10 TJ = 25 C TJ = 25 C Threshold 76 80 84 Threshold 47 53 58 Threshold 119 135 146 Threshold 135 146 164 IL = 79 mA IL = 149 mA VL = VBP mA mA 2.4 2.5 V 375 mA RESET Pin (Duty Limit/Main Only Remote-OFF) Reset Overvoltage Threshold IR(MA-OVON) IR(MA-OVOFF) RESET Pin Voltage VR RESET Pin Short Circuit Current Duty Cycle - Programmable Limit TJ = 25 C IR(SC) DCLIMIT(MA) DCMAX(MA) Threshold 165 205 245 Threshold 175 215 255 IR = 155 mA mA 2.5 V VR = VBP 375 mA IL = 100 mA, IR = 110 mA 50.5 IL = 115 mA, IR = 140 mA 47.5 IL = 100 mA, IR = 170 mA 63 % Current Limit Programming FEEDBACK Pin Current Limit Detection Range #1 ILIM(1)(MA) Start-up See Note C 0-5 mA FEEDBACK Pin Current Limit Detection Range #2 ILIM(2)(MA) Start-up See Note C 5-12 mA FEEDBACK Pin Current Limit Detection Range #3 ILIM(3)(MA) Start-up See Note C 12-24 mA 24 Rev. C 02/11 www.powerint.com TFS757-764HG Parameter Symbol Conditions SOURCE = 0 V; TJ = 0 C to 100 C (Unless Otherwise Specified) Min Typ Max Units Maximum Current Limit Current Limit ILIM(1)(MA) ILIM(2)(MA) ILIM(3)(MA) ILIM(1)(MA) ILIM(2)(MA) ILIM(3)(MA) ILIM(1)(MA) ILIM(2)(MA) ILIM(3)(MA) ILIM(1)(MA) ILIM(2)(MA) ILIM(3)(MA) ILIM(1)(MA) ILIM(2)(MA) ILIM(3)(MA) ILIM(1)(MA) ILIM(2)(MA) ILIM(3)(MA) ILIM(1)(MA) ILIM(2)(MA) ILIM(3)(MA) ILIM(1)(MA) ILIM(2)(MA) ILIM(3)(MA) TFS757 TJ = 25 C TFS758 TJ = 25 C TFS759 TJ = 25 C TFS760 TJ = 25 C TFS761 TJ = 25 C TFS762 TJ = 25 C TFS763 TJ = 25 C TFS764 TJ = 25 C di/dt = 175 mA/ms di/dt = 233 mA/ms di/dt = 291 mA/ms di/dt = 250 mA/ms di/dt = 335 mA/ms di/dt = 420 mA/ms di/dt = 258 mA/ms di/dt = 344 mA/ms di/dt = 430 mA/ms di/dt = 324 mA/ms di/dt = 432 mA/ms di/dt = 540 mA/ms di/dt = 338 mA/ms di/dt = 450 mA/ms di/dt = 564 mA/ms di/dt = 360 mA/ms di/dt = 480 mA/ms di/dt = 600 mA/ms di/dt = 402 mA/ms di/dt = 402 mA/ms di/dt = 670 mA/ms di/dt = 468 mA/ms di/dt = 624 mA/ms di/dt = 780 mA/ms 1.58 2.28 2.55 2.88 3.07 3.25 3.60 4.18 1.02 1.36 1.70 1.45 1.95 2.45 1.62 2.16 2.70 1.86 2.48 3.10 1.95 2.65 3.30 2.10 2.80 3.50 2.35 3.10 3.90 2.70 3.60 4.50 1.82 2.62 2.94 3.30 A 3.53 3.75 4.16 4.81 Low-Side Main MOSFET TFS757 ID = ILIM(3)(MA) TFS758 ID = ILIM(3)(MA) TFS759 ID = ILIM(3)(MA) ON-State Resistance RDS(ON) TFS760 ID = ILIM(3)(MA) TFS761 ID = ILIM(3)(MA) TFS762 ID = ILIM(3)(MA) TFS763 ID = ILIM(3)(MA) TFS764 ID = ILIM(3)(MA) OFF-State Drain Leakage Current IDSS(D) TFS757 TFS758 TFS759 TFS760 TFS761 TFS762 TJ = 25 C TJ = 100 C TJ = 25 C TJ = 100 C TJ = 25 C TJ = 100 C TJ = 25 C TJ = 100 C TJ = 25 C TJ = 100 C TJ = 25 C TJ = 100 C TJ = 25 C TJ = 100 C TJ = 25 C TJ = 100 C VL, VR = 0 V, IBP = 6 mA, VDS = 560 V, TJ = 100 C 4.87 7.69 3.25 4.90 2.35 3.60 1.96 2.80 1.60 2.30 1.40 2.00 1.20 1.70 1.10 1.53 5.60 9.05 3.73 5.83 2.70 4.21 2.24 3.29 1.85 2.75 1.60 2.35 1.40 2.05 1.26 1.80 150 150 150 150 470 470 W mA 25 www.powerint.com Rev. C 02/11 TFS757-764HG Parameter Symbol Conditions SOURCE = 0 V; TJ = 0 C to 100 C (Unless Otherwise Specified) Min Typ Max Units Low-Side Main MOSFET (cont.) OFF-State Drain Leakage Current Breakdown Voltage IDSS(D) BVDSS(D) TFS763 TFS764 470 VL, VR = 0 V, IBP = 6 mA, VDS = 560 V, TJ = 100 C VL, VR = 0 V, IBP = 6 mA, TJ = 25 C 470 725 mA V Rise Time tR(D) 100 ns Fall Time tF(D) 50 ns High-Side Main MOSFET TJ = 25 C TFS757 ID = ILIM(3)(MA) TJ = 100 C TJ = 25 C TJ = 100 C TJ = 25 C TJ = 100 C TJ = 25 C TJ = 100 C TJ = 25 C TJ = 100 C TJ = 25 C TJ = 100 C TJ = 25 C TJ = 100 C TJ = 25 C TJ = 100 C TFS758 ID = ILIM(3)(MA) TFS759 ID = ILIM(3)(MA) ON-State Resistance RDS(ON)(HD) TFS760 ID = ILIM(3)(MA) TFS761 ID = ILIM(3)(MA) TFS762 ID = ILIM(3)(MA) TFS763 ID = ILIM(3)(MA) TFS764 ID = ILIM(3)(MA) Effective Output Capacitance Breakdown Voltage COSS(EFF)(HD) TFS757 TFS758 TFS759 TFS760 TFS761 TFS762 TFS763 TFS764 BVDSS(HD) 2.12 1.15 1.40 0.88 1.06 0.88 1.06 0.69 W 0.84 0.58 0.7 0.46 0.56 0.46 0.56 55 82 110 110 140 165 205 205 TJ = 25 C, VGS = 0 V VDS = 0 V to 80% VDSS(HD) TJ = 25 C TFS757 TFS758 TFS759 TFS760 TFS761 TFS762 TFS763 TFS764 1.76 pF 530 V 60 60 60 60 65 80 110 110 OFF-State Drain Current Leakage IDSS(HD) Turn-on Voltage Rise Time tR(HD) 30 ns Turn-off Voltage Fall Time tF(HD) 25 ns VD = 424 V, TJ = 100 C mA 26 Rev. C 02/11 www.powerint.com TFS757-764HG Parameter Symbol Conditions SOURCE = 0 V; TJ = 0 C to 100 C (Unless Otherwise Specified) Min Typ Max Units High-Side Main MOSFET (cont.) High-Side Bias Shunt Voltage VDDH(SHUNT) See Note B IDDH = 2 mA 11.4 12.1 12.8 V High-Side Undervoltage ON-Threshold VDDH(UVON) See Note B 10.7 11.1 11.5 V High-Side Undervoltage OFF-Threshold VDDH(UVOFF) See Note B 9.5 9.9 10.3 V High-Side Shunt Hysteresis Voltage VDDH(HYST) See Note B 0.7 1.2 1.5 V TJ = 25 C 3.7 4.37 TJ = 100 C 5.5 6.25 Standby MOSFET ON-State Resistance RDS(ON)(DS) IDSB = ILIM(3)(DSB) W VBP = 6.2 V IDSS1(DS) OFF-State Drain Leakage Current IDSS2(DS) Breakdown Voltage BVDSS(DS) DRAIN Supply Voltage VDSB(START) VEN = 0 V VDS = 560 V TJ = 100 C 200 mA VBP = 6.2 V VDS = 375 V, TJ = 50 C VEN = 0 V VBP = 6.2 V, VEN = 0 V, TJ = 25 C 15 725 V 50 V Standby Controller Output Frequency in Standard Mode Maximum Duty Cycle fS(SB) TJ = 25 C DCMAX(DSB) ENABLE Pin Upper Turnoff Threshold Current IDIS ENABLE Pin Voltage VEN BYPASS Pin Charge Current Average 124 Peak-to-peak Jitter IL = 40 mA 132 140 8 kHz 67 70 73 % -150 -115 -80 mA IEN = 25 mA 2.0 2.4 2.8 IEN = -25 mA 0.8 1.2 1.6 -3.2 -2 V ICH1 VBP = 0 V, TJ = 25 C -5 ICH2 VBP = 4 V, TJ = 25 C -4 -1.5 0 5.50 5.70 5.90 V 0.80 1.0 1.20 V 5.8 6.0 6.2 V BYPASS Pin Voltage VBP BYPASS Pin Voltage Hysteresis VBP(HYST) BYPASS Pin Shunt Voltage VBP(SHUNT) mA VDS = 50 V IBP = 2 mA Standby Circuit Protection ENABLE Pin Current Limit Selection Range #1 ILIM(1)(DSB) Start-up 0-8.5 mA 27 www.powerint.com Rev. C 02/11 TFS757-764HG Parameter Symbol Conditions SOURCE = 0 V; TJ = 0 C to 100 C (Unless Otherwise Specified) Min Typ Max Units Standby Circuit Protection (cont.) ENABLE Pin Current Limit Selection Range #2 ILIM(2)(DSB) Start-up 8.5-18 mA ENABLE Pin Current Limit Selection Range #3 ILIM(3)(DSB) Start-up 18-33 mA ENABLE Pin Current Limit Selection Range #4 ILIM(4)(DSB) Start-up 33-60 mA ILIM(1)(DSB) IL = 20 mA, di/dt = 95 mA/ms, TJ = 25 C 450 500 550 ILIM(2)(DSB) IL = 20 mA, di/dt = 125 mA/ms, TJ = 25 C 600 650 700 ILIM(3)(DSB) IL = 20 mA, di/dt = 143 mA/ms, TJ = 25 C 675 750 825 ILIM(4)(DSB) IL = 20 mA, di/dt = 105 mA/ms, TJ = 25 C 495 550 605 ILIM ILIM (IL = 100 mA) / ILIM (IL = 20 mA) di/dt = 125 mA/ms Power Coefficient I2f I2f = ILIM(2)(DSB)(TYP)x fS(SB)(OSC)(TYP) TJ = 25 C 0.9 x I2f Initial Current Limit IINIT TJ = 25 C 0.75 x ILIM(MIN) tLEB(D) TJ = 25 C 170 215 ns tLEB(DSB) TJ = 25 C 170 215 ns tILD(D) TJ = 25 C 150 ns tILD(DSB) TJ = 25 C 150 ns Standby Current Limit 80 mA % General Circuit Protection Leading Edge Blanking Time (Main) Leading Edge Blanking Time (Standby) Current Limit Delay (Main) Current Limit Delay (Standby) I2f 1.12 x I2f A2Hz Thermal Shutdown Temperature TSD 118 C Thermal Shutdown Hysteresis TSD(HYST) 55 C Auto-Restart ON-Time at fOSC Standby Auto-Restart Duty Cycle Standby tAR TJ = 25 C 64 ms DCAR TJ = 25 C 2.2 % IS1 EN Current > IDIS (No MOSFETs Switching) 400 IS2 EN Open (Standby MOSFET Switching at fOSC) 600 Supply Current DRAIN Supply Current NOTES: A. B. C. D. 750 1000 mA 950 1200 The current limit is boosted for the first 34 ms of main supply switching and returns to normal level after this period. VDDH(SHUNT) minus VDDH(UV_ON) is equal to 250 mV minimum. Level 1 RFB = open, Level 2 RFB = 511 kW, Level 3 RFB = 232 kW. Level 1 REN = open, Level 2 REN = 280 kW, Level 3 REN = 137 kW, Level 4 REN = 63.4 kW. 28 Rev. C 02/11 www.powerint.com TFS757-764HG 1.0 1.0 0.9 75 100 125 150 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 150 Junction Temperature (C) 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 50 75 100 125 150 1.2 1.0 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 Figure 32. Standby Supply. Frequency vs. Temperature. PI-6002-060210 1.0 25 Junction Temperature (C) Figure 31. Main Supply. Frequency vs. Temperature. 1.2 0 Figure 30. Standby Supply. Breakdown vs. Temperature. PI-6000-060210 MAIN DRAIN Pin Output Frequency (Normalized to 25 C) 1.0 -50 -25 Junction Temperature (C) Figure 29. Main Supply. Breakdown Voltage vs. Temperature. 1.2 0.9 PI-6001-060210 50 75 100 125 150 Junction Temperature (C) Figure 33. Main Supply. Internal Current Limit vs. Temperature. 1.2 PI-6003-060210 25 STANDBY DRAIN Pin Output Frequency (Normalized to 25 C) 0 STANDBY DRAIN Pin Current Limit (Normalized to 25 C) -50 -25 Junction Temperature (C) MAIN DRAIN Pin Current Limit (Normalized to 25 C) 1.1 PI-5999-060210 PI-5998-060210 MAIN DRAIN Pin Breakdown Voltage (Normalized to 25 C) 1.1 STANDBY DRAIN Pin Breakdown Voltage (Normalized to 25 C) Typical Performance Characteristics 1.0 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 150 Junction Temperature (C) Figure 34. Standby Supply. External Current Limit vs. Temperature with RIL = 10.5 kW 29 www.powerint.com Rev. C 02/11 TFS757-764HG 5 4 L Pin Voltage (V) 1.0 0.8 0.6 0.4 0.2 3 2 1 0 -25 0 25 50 75 0 100 125 0 Junction Temperature (C) 60 80 100 120 140 160 Figure 36. L Pin Voltage vs. L Pin Current. 4 3 2 1 1 FEEDBACK Pin Current (mA) PI-5954-050510 5 0 -1 -2 -3 -4 -5 0 0 50 100 150 200 0 250 1 2 3 4 5 6 7 FEEDBACK Pin Voltage (V) R Pin Current (A) Figure 38. FEEDBACK Pin Current vs. FEEDBACK Pin Voltage. 400 300 200 100 0 -100 -200 30 PI-5951-050510 PI-5952-051210 500 BYPASS Pin Current (mA) Figure 37. R Pin Voltage vs. R Pin Current. ENABLE Pin Current (A) 40 L Pin Current (A) Figure 35. Standby Supply. Undervoltage Threshold vs. Junction Temperature. 20 10 0 0 1 2 3 4 5 6 0.0 7 ENABLE Pin Current vs. ENABLE Pin Voltage. 2.0 4.0 6.0 8.0 BYPASS Pin Voltage (V) ENABLE Pin Voltage (V) Figure 39. 20 PI-5953-051210 -50 R Pin Voltage (V) PI-5955-051210 1.2 PI-5959-060210 STANDBY DRAIN Pin Undervoltage Threshold (Normalized to 25 C) Typical Performance Characteristics (cont.) Figure 40. BYPASS Pin Current vs. BYPASS Pin Voltage. 30 Rev. C 02/11 www.powerint.com TFS757-764HG Typical Performance Characteristics (cont.) Duty Cycle (%) 20 10 0 0 4 8 12 PI-5949-052510 100 PI-5950-012711 VDDH Current (mA) 30 75 50 25 0 16 -50 -25 0 VDDH Votage (V) 75 100 125 Figure 42. Duty Cycle vs. Temperature (TJ = 100 mA, JR = 110 mA). 75 50 25 PI-5942-060110 2.5 DRAIN Current (A) PI-5948-052510 100 Duty Cycle (%) 50 Temperature (C) Figure 41. VDDH Current vs. VDDH Voltage. 2 1.5 1 TCASE = 25 C TCASE = 100 C .5 0 0 -50 -25 0 25 50 75 0 100 125 4 3 2 1 TCASE = 25 C TCASE = 100 C Scaling Factors: TFS757 0.4 TFS758 0.6 TFS759 0.8 TFS760 1.0 TFS761 1.2 TFS762 1.4 TFS763 1.6 TFS764 1.8 0 0 2 4 6 8 10 12 14 16 18 20 DRAIN Voltage (V) Figure 45. Drain Supply. Output Characteristics. 6 8 10 12 14 16 18 20 1000 PI-5944-060110 PI-5943-091010 5 4 Figure 44. Standby Supply. Output Characteristics. DRAIN Capacitance (pF) Figure 43. Duty Cycle vs. Temperature (IL = 115 mA, IR = 140 mA) 2 STANDBY DRAIN Voltage (V) Temperature (C) DRAIN Current (A) 25 100 10 0 0 100 200 300 400 500 600 STANDBY DRAIN Pin Voltage (V) Figure 46. Standby Supply. Drain Capacitance vs. Drain Voltage. 31 www.powerint.com Rev. C 02/11 TFS757-764HG Typical Performance Characteristics (cont.) PI-5946-060110 Scaling Factors: TFS757 0.4 TFS758 0.6 TFS759 0.8 TFS760 1.0 TFS761 1.2 TFS762 1.4 TFS763 1.6 TFS764 1.8 200 132 kHz Power (mW) 1000 250 PI-5945-091010 100 150 100 100 10 0 100 200 300 400 500 0 600 0 DRAIN Pin Voltage (V) Figure 47. Main Supply. Drain Capacitance vs. Drain Voltage. Power (mW) 300 200 66 kHz 100 Standby Supply. Power vs. Drain Voltage. 20 DRAIN Current (A) Scaling Factors: TFS757 0.4 TFS758 0.6 TFS759 0.8 TFS760 1.0 TFS761 1.2 TFS762 1.4 TFS763 1.6 TFS764 1.8 400 Figure 48. PI-5947-091010 500 100 200 300 400 500 600 700 STANDBY DRAIN Pin Voltage (V) TJ = 25 C TJ = 100 C 15 10 Scaling Factors: TFS757 0.17 TFS758 0.25 TFS759/760 0.33 TFS761 0.42 TFS762 0.50 TFS763/764 0.63 5 0 0 0 100 200 300 400 500 600 700 0 1 DRAIN Pin Voltage (V) COSS (pF) PI-5971-083110 Figure 50. Scaling Factors: TFS757 0.17 TFS758 0.25 TFS759/760 0.33 TFS761 0.42 TFS762 0.50 TFS763/764 0.63 100 0 100 200 300 3 4 5 6 7 400 Drain Voltage (VHD-VHS) Figure 51. High-Side MOSFET Drain Current vs. Drain Voltage. High-Side MOSFET Drain Current vs. Drain Voltage. 1.1 PI-5972-051210 Main Supply. Power vs. Drain Voltage. 1000 2 DRAIN Voltage (V) Breakdown Voltage (Normalized to 25 C) Figure 49. 100 C 25 C PI-5970-091010 DRAIN Capacitance (pF) 10000 1.0 0.9 -50 -25 0 25 50 75 100 125 150 Temperature (C) Figure 52. High-Side MOSFET Breakdown Voltage vs. Temperature. 32 Rev. C 02/11 www.powerint.com TFS757-764HG Typical Performance Characteristics (cont.) Scaling Factors: TFS757 0.17 TFS758 0.25 TFS759/760 0.33 TFS761 0.42 TFS762 0.50 TFS763/764 0.63 1.5 Power (mW) PI-5973-083110 2 1 66 kHz 0.5 0 0 100 200 300 400 DRAIN Voltage (VD) Figure 53. High-Side MOSFET Power vs. Drain Voltage. 33 www.powerint.com Rev. C 02/11 Rev. C 02/11 A 1 5 10 11 13 14 9 10 11 16 B 2 0.035 (0.89) Ref. 0.027 (0.70) 0.023 (0.58) 0.020 (0.50) 0.118 (3.00) 0.016 (0.41) 12x 0.011 (0.28) 0.020 M 0.51 M C 3 0.016 (0.41) Ref. 0.290 (7.37) Ref. Detail A (N.T.S) SIDE VIEW 5 C 0.076 (1.93) 0.519 (13.18) Ref. 16 13 13 11 7 5 9 8 7 3 6 0.076 (1.94) 3 1 MOUNTING HOLE PATTERN (N.T.S) All dimensions in inches (mm) 0.114 (2.91) 0.164 (4.18) 5 0.152 (3.88) 3 1 4 0.207 (5.26) 0.187 (4.75) 0.201 (5.11) Ref. 0.024 (0.61) 12x 0.019 (0.48) 0.010 M 0.25 M C A B 6 0.076 0.076 (1.94) (1.94) 10 0.114 0.114 (2.91) (2.91) 16 14 0.114 (2.91) 8 BACK VIEW 11 10 9 0.012 (0.30) Ref. 14 0.381 (9.68) Ref. 34 www.powerint.com 10 11. Tied to HD (pin 16). 9. Tied to HS (pin 14). 5. Pin #6 is the only straight (unformed) lead. 6. Controlling dimensions in inches (mm). 7 8. Tied to SOURCE (pin 6). 4. Does not include inter-lead flash or protrusions. PI-5300-021411 2. Dimensions noted are determined at the outermost extremesof the plastic body exclusive of mold flash, tie bar burrs, gate burrs, and interlead flash, but including any mismatch between the top and bottom of the plastic body. Maximum mold protrusion is 0.007 (0.18) per side. 3. Dimensions noted are inclusive of plating thickness. 1. Dimensioning and tolerancing per ASME Y14.5M-1994. Notes: 0.118 (3.00) 0.012 (0.30) Typ. 0.235 (5.96) Ref. 0.167 (4.24) Ref. 0.101 (2.57) Ref. 0.048 (1.22) 0.046 (1.17) 0.081 (2.06) 0.077 (1.96) Detail A 0.140 (3.56) 0.120 (3.05) 0.021 (0.53) 0.019 (0.48) 10 Ref. All Around 0.056 (1.42) Ref. 0.325 (8.25) 0.320 (8.13) B TOP-END VIEW B-B Location of Exposed Metal Tie-Bars 0.041 (1.04) Ref. 0.010 (0.25) Typ. 8 BOTTOM-END VIEW 0.020 (0.51) Ref. Pin 1 5 9 FRONT VIEW 7 8 0.628 (15.95) Ref. 0.060 (1.52) Ref. 7 5 6 Pin 1 I.D. 2 0.653 (16.59) 0.647 (16.43) 0.038 (0.97) 3 0.019 (0.48) Ref. B eSIP-16B (H Package) TFS757-764HG TFS757-764HG Part Ordering Information Part Number Option Quantity PFS757HG Tube 30 PFS758HG Tube 30 PFS759HG Tube 30 PFS760HG Tube 30 PFS761HG Tube 30 PFS762HG Tube 30 PFS763HG Tube 30 PFS764HG Tube 30 Part Marking Information * HiperTFS Product Family * TFS Series Number * Package Identifier H Plastic eSIP-16B * Pin Finish G TFS 757 Halogen Free and RoHS Compliant H G 35 www.powerint.com Rev. C 02/11 Revision Notes Date B Initial Release. C Updated Absolute Maximum Ratings section. Updated TFS759 ILIMIT, Figures 3, 25, 41, and Package drawing. 11/09/10 02/11 For the latest updates, visit our website: www.powerint.com Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. Patent Information The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents, or Power Integrationslly by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations patents may be found at www.powerint.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm. Life Support Policy POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein: 1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in significant injury or death to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. The PI logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, PeakSwitch, CAPZero, SENZero, LinkZero, HiperPFS, HiperTFS, Qspeed, EcoSmart, Clampless, E-Shield, Filterfuse, StakFET, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. (c)2011, Power Integrations, Inc. Power Integrations Worldwide Sales Support Locations World Headquarters 5245 Hellyer Avenue San Jose, CA 95138, USA. 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