2SK2553(L), 2SK2553(S)
Silicon N Channel MOS FET
High Speed Power Switching
ADE-208-357H (Z)
9th. Edition
Feb. 1999
Application
High speed power switching
Features
Low on-resistance
RDS(on) = 7 m typ.
High speed switching
4 V gate drive device can be driven from 5 V source
Outline
3
2
1
4
3
2
1
4
LDPAK
1. Gate
2. Drain
3. Source
4. Drain
D
G
S
2SK2553
2
Absolute Maximum Ratings (Ta = 25°C)
Item Symbol Ratings Unit
Drain to source voltage VDSS 60 V
Gate to source voltage VGSS ±20 V
Drain current ID50 A
Drain peak current ID(pulse) Note 1 200 A
Body to drain diode reverse drain current IDR 50 A
Avalanche current IAP Note 3 45 A
Avalanche energy EAR Note 3 174 mJ
Channel dissipation Pch Note 2 75 W
Channel temperature Tch 150 °C
Storage temperature Tstg –55 to +150 °C
Notes 1. PW 10 µs, duty cycle 1 %
2. Value at Tc = 25°C
3. Value at Tch = 25°C, Rg 50
2SK2553
3
Electrical Characteristics (Ta = 25°C)
Item Symbol Min Typ Max Unit Test Conditions
Drain to source breakdown
voltage V(BR)DSS 60 V ID = 10 mA, VGS = 0
Gate to source breakdown
voltage V(BR)GSS ±20 V IG = ±100 µA, VDS = 0
Gate to source leak current IGSS ——±10 µAV
GS = ±16 V, VDS = 0
Zero gate voltage drain current IDSS ——10µAV
DS = 60 V, VGS = 0
Gate to source cutoff voltage VGS(off) 1.0 2.0 V ID = 1 mA, VDS = 10 V
Static drain to source on state
resistance RDS(on) 7 10 mID = 25 A
VGS = 10 V Note 1
—1016mI
D
= 25 A
VGS = 4 V Note 1
Forward transfer admittance |yfs|3555SI
D
= 25 A
VDS = 10 V Note 1
Input capacitance Ciss 3550 pF VDS = 10 V
Output capacitance Coss 1760 pF VGS = 0
Reverse transfer capacitance Crss 500 pF f = 1 MHz
Turn-on delay time td(on) 35 ns ID = 25 A
Rise time tr 230 ns VGS = 10 V
Turn-off delay time td(off) 470 ns RL = 1.2
Fall time tf 360 ns
Body to drain diode forward
voltage VDF 0.85 V IF = 50 A, VGS = 0
Body to drain diode reverse
recovery time trr 135 ns IF = 50 A, VGS = 0
diF / dt = 50 A / µs
Note 1. Pulse Test
See characteristic curves of 2SK2529.
2SK2553
4
100
75
50
25
0
Channel Dissipation Pch (W)
50 100 150 200
Case Temperature Tc (°C)
Power vs. Temperature Derating
Drain to Source Voltage V (V)
DS
Drain Current I (A)
D
Maximum Safe Operation Area
500
200
100
20
50
10
2
5
1
0.5
0.1 0.3 1 310 30 100
Operation in
this area is
limited by R DS(on)
Ta = 25 °C
10 µs
100 µs
1 ms
PW = 10 ms (1shot)
DC Operation (Tc = 25°C)
3
1
0.3
0.1
0.03
0.01
10 µ 100 µ 1 m 10 m
Pulse Width PW (S)
Normalized Transient Thermal Impedance
100 m 1 10
s (t)
γ
DM
P
PW
T
D = PW
T
ch – c(t) = s (t) • ch – c
ch – c = 1.67 °C/W, Tc = 25 °C
θ γ θ
θ
Tc = 25°C
D = 1
0.5
0.2
0.1
0.05
0.02
0.01
1shot pulse
Normalized Transient Thermal Impedance vs. Pulse Width
2SK2553
5
Vin Monitor
D.U.T.
Vin
10 V
RL
V
= 30 V
DD
tr
td(on)
Vin
90% 90%
10%
10%
Vout
td(off)
Vout
Monitor
50
90%
10%
tf
Switching Time Test Circuit Waveform
D. U. T
Rg
I
Monitor
AP
V
Monitor
DS
VDD
50
Vin
15 V
0
ID
VDS
IAP
V(BR)DSS
L
VDD
E = • L • I •
2
1V
V – V
AR AP DSS
DSS DD
2
Avalanche Test Circuit Avalanche Waveform
2SK2553
6
Package Dimensions
Hitachi Code
JEDEC
EIAJ
Mass
(reference value)
LDPAK (L)
1.4 g
10.2 ± 0.3
0.86
0.76 ± 0.1
2.54 ± 0.5
2.54 ± 0.5
+ 0.2
– 0.1
1.2 ± 0.2
4.44 ± 0.2
1.3 ± 0.15
2.59 ± 0.2
0.4 ± 0.1
11.0 ± 0.5
8.6 ± 0.3
10.0
11.3 ± 0.5
+ 0.3
– 0.5
(1.4)
1.27 ± 0.2
As of January, 2001
Unit: mm
2SK2553
7
Hitachi Code
JEDEC
EIAJ
Mass
(reference value)
LDPAK (S)-(1)
1.3 g
10.2 ± 0.3
1.27 ± 0.2
(1.5)
(1.4)
8.6 ± 0.3
10.0 + 0.3
– 0.5
4.44 ± 0.21.3 ± 0.15
0.1 + 0.2
– 0.1
0.4 ± 0.1
0.86 + 0.2
– 0.1
2.54 ± 0.5
2.54 ± 0.5
1.2 ± 0.2
3.0+ 0.3
– 0.5
(1.5)
7.8
6.6
2.2
1.7
7.8
7.0
As of January, 2001
Unit: mm
2SK2553
8
Hitachi Code
JEDEC
EIAJ
Mass
(reference value)
LDPAK (S)-(2)
1.35 g
10.2 ± 0.3
1.27 ± 0.2
(1.5)
(1.4)
8.6 ± 0.3
10.0 + 0.3
– 0.5
4.44 ± 0.21.3 ± 0.2
0.1 + 0.2
– 0.1
0.4 ± 0.1
0.86 + 0.2
– 0.1
2.54 ± 0.5
2.54 ± 0.5
1.2 ± 0.2
5.0+ 0.3
– 0.5
(1.5)
7.8
6.6
2.2
1.7
7.8
7.0
As of January, 2001
Unit: mm
2SK2553
9
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