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Bulletin I27179 22 - Sep
PIIPM15P12D007
Programmable Isolated IPM
PI-IPM Features:
Power Module:
• NPT IGBTs 15A, 1200V
• 10us Short Circuit capability
Square RBSOA
Low Vce(on) (2.7Vtyp @ 15A, 25°C)
Positive Vce(on) temperature coefficient
• Gen III HexFred Technology
Low diode VF (2.32Vtyp @ 15A, 25°C)
Soft reverse recovery
• 10mΩ sensing resistors on all phase outputs
Thermal coefficient < 50ppm/°C
Embedded driving board
• Programmable 40 Mips DSP
• Current sensing feedback from two phases
• Full protection from ground and line
to line faults
• UVLO, OVLO on DCbus voltage
• Embedded flyback smps for floating
stages (single 15Vdc @ 300mA input required)
• Asynchronous isolated 2.5Mbps serial port for
DSP communication and/or programming
• Synchronous isolated 10Mbps serial port for DSP
communication and/or programming
• IEEE standard 1149.1 (JTAG port interface)
for program downloading and debugging
• Separated turn on / turn off outputs for
IGBTs di/dt control
• Hall effect sensors, sin/cos and quadrature encoder
interfaces
• On board 64kbits I2C EEprom
Description
The PIIPM15P12D007 is a fully integrated Intelligent Power
Module for high performances Servo Motor Driver
applications.
The device core is a state of the art DSP, the
TMS320LF2406A at 40 Mips, interfaced with a full set of
peripherals designed to handle all analog feedback and
control signals needed to correctly manage the power
section of the device. A 64kbits EEPROM is also available to
store calibration data. The PIIPM has been designed and
tailored to implement internally all functions needed to close
the current, speed and position loops of a high performances
servo motor driver.
The use of the flash memory version of the DSP and the
JTAG port connector allows the user to easily develop and
download his own proprietary algorithm.
Package:
PIIPM – BBI (EconoPack 2 outline compatible)
Power Module schematic:
Out 1
Out 2
Out 3
IN1
IN2
IN3
DC+
OUT
DC+
IN
BRK
DC- DC- (signal)
DC+ (signal)
Input bridge, brake and three phases inverter (BBI) with current
sensing resistors on all output phases and thermistor
PIIPM15P12D007 System Block Schematic:
The device comes in the EMPTM package, fully compatible in
length, width and height with the popular EconoPack 2
outline.
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PIIPM15P12D007 I27179 22 - Sep
Embedded driving board block schematic
Power Supply
3.3V, 5V
15V
flyback
5V
15V iso-1
15V iso-2
15V iso-3
5V ref
3.3V
15V
3.3V ref
V
in
COM
V
in
COM
TMS320LF2406A
40Mips
Boot-en~
TMS
TDi
TDo
Tck
TRST-
EMU0
EMU1
PD
Start / stop
CANTX
CANRX
JTAG/CAN interface connector
Th+
Th-
ADCin4 ; 70
PWM1 ; 39
PWM2 ; 37
PWM3 ; 36
PWM4 ; 33
PWM5 ; 31
PWM6 ; 28
5V
Li n Reg
400kHz
R2 +
R2 -
Current
Sense
&
Level
Shifter
ADCin1
5V
Li n Reg
400kHz
R3 +
R3 -
Current
Sense
&
Level
Shifter
11kHz
ADCin2
11kHz
15V iso-2
5V
15V iso-3
5V
Gate
Drivers
IR2214
Based
G6
E6
G3
E3
15V
iso-1
15V
3.3V
Gate
Drivers
IR2214
Based
G5
E5
G2
E2
15V
iso-2
15V
3.3V
Gate
Drivers
IR2214
Based
15V
iso-3
15V
3.3V
Hin
Lin
Hin
Li n
Hin
Li n
G4
E4
G1
E1
C1
C4
C2
C5
C3
C6
ADCin1 ; 77
ADCin2 ; 74
ADCin3 ; 72
PDPintA~ ; 6
ADCin5 ; 69
DCB mon
22kHz
DC -
3.3V
Comp
3.3V
3.3V
DC
+
RS485
line
driver
Tx-
Tx +
Rx+
Rx-
Opto-
isolation
SpiTXout
SpiRXin
SpiCKout
Opto-
isolation
Opto-
isolation
SciTx ; 17
SciRx ; 18
SpiSOMI ; 22
QEP1 ; 57
QEP2 ; 55
Vin iso
GND iso
5V iso
5V
5V
5V
GND iso
SpiCLK ; 24
SinCos1/QE1
Homing/Direction.
SinCos2/QE2
SpiSIMO ;21
IOPA2 ; 16
ADCin7 ; 66
ADCin6 ; 67
Hall1
Contactor
Hall2
Hall3 - Excitation
Cap3/TdirB ; 2 , 52
IOPB6-TdirA ; 11
Cap4 ; 60
Cap5 ;56
Cap6/PWM7 ; 45 , 48
Counter
TCLKinB ; 89
ADCin
ADCin8 ; 80
DE
n.c.
Latch
Latc h-reset~
Fault~
Fault~
FaultMem~
PDPintB~ ; 95
EEPROM
I2C-clock
IOPE3 ; 41
FaultCLR
FaultCLR
FaultCLR
FaultCLR
Gate
Drivers
IR2214
Based
CB
GB
EB
15V 3.3V
Pin on RS485 connector
Pin on JTAG connector
Module connectors
FaultCLR
BrakeFault~
T3PWM ; 7
BrakeFault~
FaultMem~
BrakeFault~
Fault~
Fault~
I2C-Data
3.3V
IOPE4 ; 38
IOPE2 ; 43
DIV
Li n
Latc h-reset~
IOPD0 ; 15
SCI_Tx_en
Watchdog
WD
85
RS~
93
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PIIPM15P12D007 I27179 22 - Sep
Signal pins on RS485 connector
Signal pins on IEEE1149.1 JTAG connector
CAUTION: DO NOT APPLY DC BUS VOLTAGE WHEN JTAG INTERFACE IS CONNECTED, SEVERE
DAMAGE MAY OCCUR ON POWER MODULE AND ON YOUR EQUIPMENT!
Symbol Lead Description State
Connector
pin number
PD
Presence detect.
Indicates that the emulation cable is connected and that the PIIPM logic is
powered up. PD is tied to the DSP 3.3V supply through a 1k resistor.
Output 3
Homing / Direction Homing signal / Counter direction Input 4
Start/Stop Start/Stop signal Input 5
CAN Tx CAN transmitter signal Output 6
CAN Rx CAN receiver signal Input 7
EMU1/OFF~ Emulation pin 1 I/O 8
Counter Counter signal Output 9
EMU0 Emulation pin 0 I/O 10
TRST~ JTAG test reset Input 13
Symbol Lead Description State Connector pin number
Tx+ RS485 Trasmitter Non inverting Driver Output Output 1
Tx- RS485 Trasmitter Inverting Driver Output Output 2
Rx- RS485 Receiver Inverting Driver Input Input 3
Rx+ RS485 Receiver Non inverting Driver Input Input 4
SpiCKout SPI clock output (GND iso referenced) Output 5
Vin iso External 5V supply voltage for opto-couplers and line driver
supply Input 6
GND iso Extenal 5V supply ground reference for opto-couplers and line
driver supply Input 7
SpiTXout SPI transmitter output (GND iso referenced) Output 8
SpiRXin SPI receiver input (GND iso referenced) Input 10
SinCos1 / QE1 SinCos encoder input 1 / Quadrature encoder input 1 Input 11
SinCos2 / QE2 SinCos encoder input 2 / Quadrature encoder input 2 Input 12
Contactor General purpose I/O I/O 13
Hall1 Hall effect sensor input 1 Input 14
Hall2 Hall effect sensor input 2 Input 15
Hall3 / Excitation Hall effect sensor input 3 / Resolver excitation I/O 16
Vin External 15V supply voltage. Internally referred to DC bus minus
pin (DC -) Input 17-18
COM External 15V supply ground reference. This pin is directly
connected to DC - Input 19-20
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PIIPM15P12D007 I27179 22 - Sep
TMS JTAG test mode select Input 14
TDO JTAG test data output Output 15
TDI JTAG test data input Input 16
TCKRET JTAG test clock return. Test clock input to the emulator.
Internally short circuited to TCK. Output 17
TCK JTAG test clock. TCK is a 10MHz clock source from the emulation pod. This
signal can be used to drive the system test clock. Input 18
Boot-En~
Boot ROM enable. This pin is sampled during DSP reset, pulling it low
enables DSP boot ROM through SCI serial line at 40Mhz operation (Flash
versions only). 47k internal pull up.
Input 19
ADCin General purpose analog input Input 20
COM External 15V supply ground reference. This pin is directly connected to DC - input 1-11
Vin External 15V supply voltage. Internally referred to DC bus minus pin (DC-) Input 2-12
Following pins are intended for signal communication between driving board and
power module only, though here described for completeness, they are on purpose
not available to the user.
Symbol Lead Description Pin number
DC + DC Bus plus input signal
DC - DC Bus minus input signal (internally connected to COM)
Th + Thermal sensor positive input
Th - Thermal sensor negative input (internally connected to COM)
G1/2/3 Gate connections for high side IGBTs
E1/2/3 Emitter connections for high side IGBTs (Kelvin points)
R1/2/3 + Output current sensing resistor positive input (IGBTs emitters 1/2/3 side, Kelvin points)
R1/2/3 - Output current sensing resistor negative input (Motor side, Kelvin points)
G4/5/6 Gate connections for low side IGBTs
E4/5/6 Emitter connections for low side IGBTs (Kelvin points)
Gb Gate connections for brake IGBT
Eb Emitter connection for brake IGBT (Kelvin point)
Brk Collector connection for brake IGBT (Kelvin point)
Lateral
connectors on
embedded
driving board
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PIIPM15P12D007 I27179 22 - Sep
Power Module Frame Pins Mapping
IN1
IN2
IN3
OUT1
OUT2
OUT3
JTAG conn. Pin1
RS485 conn.
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PIIPM15P12D007 I27179 22 - Sep
Absolute Maximum Ratings (TC=25ºC)
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur.
All voltage parameters are absolute voltages referenced to VDC-, all currents are defined positive into any lead.
Thermal Resistance and Power Dissipation ratings are measured at still air conditions.
Symbol Parameter Definition Min. Max. Units
VDC DC Bus Voltage 0 1000
VCES Collector Emitter Voltage 0 1200
V
IC @ 100C IGBTs continuous collector current (TC = 100 ºC, fig. 1) 15
IC @ 25C IGBTs continuous collector current (TC = 25 ºC,fig 1) 30
ICM Pulsed Collector Current (Fig. 3, Fig. CT.5) 60
IF @ 100C Diode Continuous Forward Current (TC = 100 ºC) 15
IF @ 25C Diode Continuous Forward Current (TC = 25 ºC) 30
IFM Diode Maximum Forward Current 60
A
VGE Gate to Emitter Voltage -20 +20 V
PD @ 25°C Power Dissipation (One transistor) 140
Inverter and
Brake
PD @ 100°C Power Dissipation (One transistor, TC = 100 ºC) 55
W
VRRM repetitive peak reverse voltage (Tj = 150 ºC) 1400
VRSM non repetitive peak reverse voltage
Tj = 150 ºC
Irrm(max)=5mA 1500
V
Io Diode Continuous Forward Current (TC = 100 ºC, 120º Rect conduction angle) 45
100% VRRM reapplied 225
IFSM One-cycle forward. Non-repetitive on state
surge current (t=10ms, Initial Tj = 150ºC) No voltage reapplied 270
A
100% VRRM reapplied 253
I2t Current I2t for fusing (t=10ms, Initial Tj = 150ºC) No voltage reapplied 365
A2s
Bridge
I2√t Current I2√t for fusing (t=0.1 to 10ms, no voltage reapplied, Initial Tj = 150ºC) 3650
A2√s
Vin Non isolated supply voltage (DC- referenced) -20 20
Vin-iso Isolated supply voltage (GND iso referenced) -5 5.5
Rx RS485 Receiver input voltage (GND iso referenced) -7 12
V
TA--EDB Operating Ambient Temperature Range -25 +70
TSTG-EDB Board Storage Temperature Range -40 +125
ºC
VISO-CONT
R485 Input-Output Continuous Withstand Voltage (RH ≤ 50%, -40°C ≤ TA ≤ 85°C ) AC
DC
800
1000
Embedded
Driving
Board
VISO-TEMP
RS485 Input-Output Momentary Withstand Voltage (RH ≤ 50%, t = 1 min, TA = 25°C) RMS 2500
V
MT Mounting Torque 3.5 Nm
T J Operating Junction Temperature -40 +150
TSTG Storage Temperature Range -40 +125
ºC
Power
Module
Vc-iso Isolation Voltage to Base Copper Plate -2500 +2500 V
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PIIPM15P12D007 I27179 22 - Sep
Electrical Characteristics: Inverter and Brake
For proper operation the device should be used within the recommended conditions.
TJ = 25°C (unless otherwise specified)
Symbol Parameter Definition Min. Typ. Max. Units Test Conditions Fig.
V(BR)CES Collector To Emitter Breakdown Voltage 1200 V VGE = 0V, IC = 250µA
∆V(BR)CES / ∆T Temperature Coeff. of Breakdown Voltage +1.2 V/ºC VGE = 0V, IC = 1mA (25 - 125 ºC)
2.70 3.00 IC = 15A, VGE = 15V 5, 6
3.74 4.24 IC = 30A, VGE = 15V 7, 9
VCE(on) Collector To Emitter Saturation Voltage
3.14 3.61
V
IC = 15A, VGE = 15V, TJ = 125 ºC 10, 11
VGE(th) Gate Threshold Voltage 4.68 4.89 5.30 V VCE = VGE, IC = 250µA
∆VGE(th) / ∆Tj Temp. Coeff. of Threshold Voltage -9.80
mV/ºC VCE = VGE, IC = 1mA (25 - 125 ºC)
12
gfe Forward Trasconductance 8 9 10 S
VCE = 50V, IC = 15A, PW = 80µs
125 VGE = 0V, VCE = 1200V
376 1110 VGE = 0V, VCE = 1200V, TJ = 125 ºC
ICES Zero Gate Voltage Collector Current
2000
µA
VGE = 0V, VCE = 1200V, TJ = 150 ºC
2.32 2.52 IC = 15A
VFM Diode Forward Voltage Drop
2.47 2.64
V
IC = 15A, TJ = 125 ºC
8
IGES Gate To Emitter Leakage Current ±100 nA VGE =± 20V
R1/2/3 Sensing Resistors 9.9 10 10.1
mΩ
Electrical Characteristics: Bridge
For proper operation the device should be used within the recommended conditions.
TJ = 25°C (unless otherwise specified)
Symbol Parameter Definition Min. Typ. Max. Units Test Conditions Fig.
1.24 1.76 tp = 400µs, Ipk = 30A
VFM Forward Voltage Drop
1.08 1.27
V
tp = 400µs, Ipk = 15A
24
VF(TO) Threshold voltage 0.78 V
TJ = 125 ºC
Irm Reverse Leakage Current 5 mA TJ = 125 ºC VR = 1200V
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PIIPM15P12D007 I27179 22 - Sep
Switching Characteristics: Inverter and Brake
For proper operation the device should be used within the recommended conditions.
TJ = 25°C (unless otherwise specified)
Symbol Parameter Definition Min Typ Max Units Test Conditions Fig.
Qg Total Gate Charge (turn on) 84 127
Qge Gate – Emitter Charge (turn on) 10 15
Qgc Gate – Collector Charge (turn on) 43 64
nC
IC = 15A
VCC = 600V
VGE = 15V
23
CT1
Eon Turn on Switching Loss 838 1207 IC = 15A, VCC = 600V, TJ = 25 ºC CT4
Eoff Turn off Switching Loss 632 900 VGE = 15V, RG =10Ω, L = 500µH WF1
Etot Total Switching Loss 1470 2107
µJ
Tail and Diode Rev. Recovery included WF2
Eon Turn on Switching Loss 1154 1512
Eoff Turn off Switching Loss 933 1030
Etot Total Switching Loss 2087 2542
µJ
IC = 15A, VCC = 600V, TJ = 125 ºC
VGE = 15V, RG =10Ω, L = 500µH
Tail and Diode Rev. Recovery included
13,
15
CT4
WF1
WF2
td (on) Turn on delay time 98 104 14,16
Tr Rise time 14 25
IC = 15A, VCC = 600V, TJ = 125 ºC
CT4
td (off) Turn off delay time 132 142 WF1
Tf Fall time 226 247
ns
VGE = 15V, RG =10Ω, L = 500µH
WF2
Cies Input Capacitance 1323 VCC = 30V
Coes Output Capacitance 255 VGE = 0V
Cres Reverse Transfer Capacitance 37
pF
f = 1MHz
22
TJ = 150 ºC, I C =60A, VGE = 15V to 0V
RBSOA Reverse Bias Safe Operating Area FULL SQUARE
VCC = 1000V, Vp = 1200V, RG = 5Ω
4
CT2
TJ = 150 ºC, VGE = 15V to 0V CT3
SCSOA Short Circuit Safe Operating Area 10 µs
VCC = 1000V, Vp= 1200V, RG = 5Ω WF4
EREC Diode reverse recovery energy 711 1263 µJ TJ = 125 ºC
Trr Diode reverse recovery time 113 300 ns IF= 15A, VCC = 600V,
Irr Peak reverse recovery current 36 41 A VGE = 15V, RG =10Ω, L = 500µH
17,18
19,20
21
CT4
WF3
RthJ-C_T Each IGBT to copper plate thermal resistance 0.9 ºC/W
RthJ-C_D Each Diode to copper plate thermal resistance 1.54 ºC/W 25,26
RthC-H Module copper plate to heat sink thermal
resistance. Silicon grease applied = 0.1mm 0.03
ºC/W
See also fig. 25, 26
29 IC = 2A, VDC = 530V, fsw = 8kHz, TC = 55 ºC
42 IC = 3A, VDC = 530V, fsw = 8kHz, TC = 55 ºC
81 IC = 3A, VDC = 530V, fsw = 16kHz TC = 55 ºC,
Pdiss Total Dissipated Power
40
W
IC = 7A, VDC = 530V, fsw = 4kHz, TC = 55ºC
PD1
PD2
PD3
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PIIPM15P12D007 I27179 22 - Sep
Electrical Characteristics: Embedded Driving Board (EDB) communication ports
For proper operation the device should be used within the recommended conditions.
Vin = 15V, Vin-iso = 5V, TA = 0 to 55°C, TC = 75°C (unless otherwise specified)
Symbol Parameter Definition Min. Typ. Max. Units Test Conditions Type Conn.
Vin EDB Input supply Voltage 12 15 18 V
Isupp EDB Input Supply Current 150 250 mA VDC = 600V, fPWM = 16kHz
Non
isolated
Suppy
Vin iso EDB isolated supply voltage 4.5 5 5.5 V
Iq. iso EDB isolated quiescent supply current 9 15 mA Rx+ = +5V, Rx- = 0V
SPIRxIn open
10 15 22 mA
SPIRxIn low
Rx+ = 0V, Rx- = +5V
Tx+ and Tx- open
Isupp. iso EDB isolated supply current
50 55 62 mA
SPIRxIn low
Rx+ = 0V, Rx- = +5V
Tx+ and Tx- on 120Ω
Isolated
supply
VDO-TX Differential Driver Output Voltage 2 V
VCO-TX Driver Common mode output voltage 3 V
Rload = 120 Ω
VDI-RX Receiver Input Differential Threshold Voltage - 0.2 0.2 V
RIN-RX Receiver Input Resistance 120 Ω
- 7V ≤ VCM ≤ +12V
fMAX RS485 maximum data rate 2.5 Mbps
RS485
port
Logic High Input Voltage 3.8 V
Logic Low Input Voltage 1.0 V
SpiRxIn
Logic Low Input Current -5 mA
0,8 V
Iout = -510µA
Logic Low Output Voltage
1,2 V Iout = -1,2mA
SpiTxOut
SpiCkOut
Logic High Output Voltage 2.4 V Iout = 3mA
SPI
port
RS485
TMS,TDI,TDO
TCK,TRST-
EMU0
EMU1/OFF~
PD
JTAG interface pins (CAUTION: DO NOT
APPLY DC BUS VOLTAGE WHEN JTAG
INTERFACE IS CONNECTED, SEVER
DAMAGE MAY OCCUR ON POWER
MODULE AND ON YOUR EQUIPMENT!)
Please see
TMS320LF2406A
datasheet from
Texas Instruments
and VPD specifications
Directly connected from DSP
to connector pins.
EMU0 and EMU1 with 4.7k
internal pull up.
JTAG
VPD Presence detect voltage 3.2 3.3 3.4 V IPD = -100µA JTAG
VBoot En~ Boot ROM enable input voltage 0.5 V
IBoot-En~ Boot ROM enable input current - 100 µA
Active low JTAG
Logic Low Output Voltage 0.8 V Iout = - 780µA
CAN Tx
Logic High Output Voltage 2.4 V Iout = 860µA
Logic Low Input Voltage 0.8 V
CAN Rx
Logic High Input Voltage 2.4 V
CAN
port
JTAG
~ indicates active low signals
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PIIPM15P12D007 I27179 22 - Sep
AC Electrical Characteristics: Embedded Driving Board (EDB)
DSP pins mapping
For proper operation the device should be used within the recommended conditions.
Vin = 15V, Vin-iso = 5V, TA = 0 to 55°C, TC = 75°C (unless otherwise specified)
Symbol Parameter Definition Min. Typ. Max. Units
Test
Conditions DSP name; pin N
VDCgain DC bus voltage feedback partition coefficient 2.39 2.44 2.49 mV/V
VDCpole DC bus voltage feedback second order filter - 22 - kHz
ADCIN03 ; 72
VDC-OVth DC bus voltage over-voltage threshold 870 920 970 V PDPINTA~ ; 6
VTH25C Thermal sensor voltage feedback at 25 ºC (Fig. TF1) 2.65 2.75 2.85 V
VTH100C Thermal sensor voltage feedback at 100 ºC (Fig. TF1) 1.04 1.09 1.14 V
ADCIN04 ; 70
Vin-gain Input voltage feedback partition coefficient 125 128 131 mV/V
Vin-pole Input voltage feedback filter pole 1600 1700 1800 Hz
ADCIN05 ; 69
Iph-GAIN Current feedback gain 78 80 82 mV/A
Iph-pole Current feedback filter pole 9.8 10.9 12 kHz
Iph-LAT Current feedback signal delay 5 µs
Iph-Zero Zero current input voltage level 1.62 1.65 1.68 V
all two phases
ADCIN01: 77
ADCIN02: 74
Vce_sc Vce Short Circuit Threshold detection 7.4 V
ISC-DEL Short Circuit detection delay time 3 6 µs
all phases PDPINTA~ ; 6
WD External watchdog timeout (see also RS~ signal),
please see WD internal signal for more details 0.9 Sec IOPC1 ; 85
Generic purpose analog Input 0 3.3 V
ADCin
Generic purpose analog input filter pole 4.13 kHz
ADCIN08 ; 80
Analog input 1 for sincos resolver 0 3.3 V
Analog input for sincos resolver filter pole 4.13 kHz
ADCIN06 ; 67
High level threshold 2,4 V
SinCos1/QE1
QEP1: internal digital
signal of QE1 Low level threshold 1 V
See also QEP1
internal signal
QEP1 ; 57
Analog input 2 for sincos resolver 0 3.3 V
Analog input for sincos resolver filter pole 4.13 kHz
ADCIN07;66
High level threshold 2,4 V
SinCos2/QE2
QEP2: internal digital
signal of QE2 Low level threshold 1 V
See also QEP2
internal signal
QEP2 ; 55
COM DSP Ground 3, 5, 13, 14, 19, 26, 27, 29, 32, 34, 46, 53,55, 58, 63,
65, 68, 71, 73, 75, 76, 78,79, 81, 84, 90, 97
3.3V DSP 3.3V supply 4, 10, 20, 30, 35, 47, 54, 59, 64, 91, 98
Floating Not connected to anything 12, 23, 88, 25, 42, 44, 51
~ indicates active low signals
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PIIPM15P12D007 I27179 22 - Sep
Other DSP pins mapping to the connector
Symbol Signal Definition DSP name ; pin N Comments Connector
Hall1 Hall effect sensor input 1
CAP4/QEP3/IOPE7 ; 60 Digital Input. See elec. characteristic of I/O pins
Hall2 Hall effect sensor input 2
CAP5/QEP4/IOPF0 ; 56 Digital Input. See elec. characteristic of I/O pins
Hall3 /
Excitation Hall effect sensor input 3 / Resolver excitation
PWM7/IOPE1,
CAP6/IOPF1 ; 45, 48
Digital I/O, Output is type G3. See electrical
characteristics of I/O pins
Contactor General purpose I/O IOPB6 ; 11 Digital I/O, Output is type G3. See electrical
characteristics of I/O pins
RS485
CAN Tx CAN transmit data CANTX ; 50 Not isolated
CAN Rx CAN receive data CANRX ; 49 Not isolated
Homin
g
/Direction Homing signal/ Counter direction TDIRB/IOPF4,
CAP3/IOPA5 ;2, 52 Avoid electrical conflicts beetwen these two pins
Start/Stop Start/Stop signal IOPF6 ; 92 Digital Input. See elec. Characteristic of I/O pins
Boot En~ Boot ROM enable signal BOOT_EN~ ; 86 See also EDB electrical characteristics
Counter Counter signal TCLKINB ; 89 Digital Input. See elec. Characteristics of I/O pins
JTAG
These signals are internal only
Symbol Signal Definition DSP name ; pin N Comments
PWM1 Out 1 high side IGBT gate drive signal PWM1; 39 DSP Event Manager A output
PWM2 Out 1 low side IGBT gate drive signal PWM2 ; 37 DSP Event Manager A output
PWM3 Out 2 high side IGBT gate drive signal PWM3 ; 36 DSP Event Manager A output
PWM4 Out 2 low side IGBT gate drive signal PWM4 ; 33 DSP Event Manager A output
PWM5 Out 3 high side IGBT gate drive signal PWM5 ; 31 DSP Event Manager A output
PWM6 Out 3 low side IGBT gate drive signal PWM6 ; 28 DSP Event Manager A output
Brake Brake IGBT gate drive signal T3PWM ; 7 DSP Event Manager B output
SpiTXout SpiTx output SPISIMO ; 21
SpiRXout SpiRx input
SPISOMI ; 22
SpiCKout SpiClk output
SPICLK ; 24
These signal are optically isolated.
See also EDB electrical characteristics
Ref3.3V 3.3V reference voltage VREFHI, VCCA ; 82, 83 3.3V reference and supply voltage for ADC converter
5V supp. Flash programming voltage pin VCCP ; 40 Supplied by the embedded flyback regulator
Tx SCI transmit data SCITXD ; 17 Drives Tx+ and Tx- through the opto-isolator and the line driver
Rx SCI receive data SCIRXD ; 18 Driven by Rx+ and Rx- through the opto-isolator and the line driver
SCI_Tx_en SCI transmitter enable IOPA2 ; 16 Enable the SCI line driver through an opto-isolator
Latch-reset~ System general fault output reset signal IOPD0 ; 15 LFAULT Reset signal, to be activated via software after a fault or
system boot, active low
FaultCLR Gate driver fault output reset signal IOPE3 ; 41 Gate driver reset, to be activated via software after a short-circuit or
system boot
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PIIPM15P12D007 I27179 22 - Sep
RS~ DSP reset input signal (see also WD signal) RS~ ; 93 Forces a DSP reset if WD signal holds too long (see also EDB
electrical char.)
Xtal1 PLL oscillator input pin XTAL1 ; 87 A 10Mhz oscillator at 100ppm frequency stability feeds this pin.
PLLF1 PLL filter input 1 PFFL ; 9 PLL filter for 40Mhz DSP clock frequency
PLLF2 PLL filter input 2 PLLF2 ; 8 PLL filter for 40Mhz DSP clock frequency
FaultMem~ System general fault input PDPINTA~ ; 6 Activated by short circuits on output phases or brake IGBTand by DC
bus over-voltage comparator. Latched signal, see also Latch-reset
BrakeFault~ Brake Protection Interrupt signal PDPINTB~ ; 95 Activated by short circuits on brake
QEP1 Square wave of SinCos1/QE1 QEP1 ; 57 Internal Schmitt trigger, see also AC electrical characteristic
QEP2 Square wave of SinCos2/QE2 QEP2 ; 55 Internal Schmitt trigger, see also AC electrical characteristic
WD = high impedance, external watchdog is disabled
WD Output signal for external watchdog IOPC1 ; 85 WD = high or WD = low, external watchdog is enabled and WD has to
be periodically triggered by positive or negative transition. When the
supervising system fails to retrigger the ext. watchdog within the time
shown on AC electrical Characteristics, RS~ signal becomes active.
~ indicates active low signals
64kbits I2C EEprom (please see Microchip 24LC4 for more specifications)
Symbol Signal Definition DSP name ; pin N Comments
I2C - Clock I2C - Clock IOPE2 ; 43 Connected to the I2C EEPROM
I2C - Data I2C - Clock IOPE4 ; 38 Connected to the I2C EEPROM
Electrical characteristic of digital inputs and outputs.
Symbol Parameter Definition Min. Typ. Max. Units
Test
Conditions
Input: VIH Logic high,generic input voltage 2.4 V
Input: VIL Logic low, generic input voltage 0.8 V
Output
Type G1(*) VOH 2.4 V
Iout = 700µA
VOL 0.8 V
Iout = - 700µΑ
Output
Type G2(*) VOH 2.4 V
Iout = 850 µΑ
VOL 0.8 V
Iout = - 850 µΑ
Output
Type G3(*) VOH 2.4 V
Iout = 950 µA
VOL 0.8 V
Iout = -950 µΑ
(*) Please refer to TMS320LF2406A datasheet from Texas Instruments for more specifications.
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PIIPM15P12D007 I27179 22 - Sep
Fig. 1 – Maximum DC collector
Current vs. case temperature
Fig. 2 – Power Dissipation vs.
Case Temperature
TC = (ºC) TC = (ºC)
Fig. 3 – Forward SOA
TC = 25ºC; Tj ≤ 150ºC
Fig. 4 – Reverse Bias SOA
Tj = 150ºC, VGE = 15V
VCE = (V) VCE = (V)
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PIIPM15P12D007 I27179 22 - Sep
Fig. 5 – Typical IGBT Output Characteristics
Tj = - 40ºC; tp = 300µs
Fig. 6 – Typical IGBT Output Characteristics
Tj = 25ºC; tp = 300µs
VCE = (V) VCE = (V)
Fig. 7 – Typical IGBT Output Characteristics
Tj = 125ºC; tp = 300µs
Fig. 8 – Typical Diode Forward
Characteristics tp = 300µs
VCE = (V) VF = (V)
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PIIPM15P12D007 I27179 22 - Sep
Fig. 9 – Typical VCE vs. VGE
Tj = - 40ºC
Fig. 10 – Typical VCE vs. VGE
Tj = 25ºC
VGE = (V) VGE = (V)
Fig. 11 – Typical VCE vs. VGE
Tj = 125ºC
Fig. 12 – Typical Transfer Characteristics
VCE = 20V; tp = 20µs
VGE = (V) VGE = (V)
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PIIPM15P12D007 I27179 22 - Sep
Fig. 13 – Typical Energy Loss vs. IC
Tj = 125ºC; L = 500µH; VCE = 600V;
Rg = 10Ω; VGE = 15V
Fig. 14 – Typical Switching Time vs. IC
Tj = 125ºC; L = 500µH; VCE = 600V;
Rg = 10Ω; VGE = 15V
IC = (A) IC = (A)
Fig. 15 – Typical Energy Loss vs. Rg
Tj = 125ºC; L = 500µH; VCE = 600V;
ICE = 15A; VGE = 15V
Fig. 16 – Typical Switching Time vs. Rg
Tj = 125ºC; L = 500µH; VCE = 600V;
ICE = 15A; VGE = 15V
Rg = (Ω) Rg = (Ω)
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PIIPM15P12D007 I27179 22 - Sep
Fig. 17 – Typical Diode IRR vs. IF
Tj = 125ºC
Fig. 18 – Typical Diode IRR vs. Rg
IF = 15A; Tj = 125ºC
IF = (A) Rg = (Ω)
Fig. 19 – Typical Diode IRR vs. dIF/dt
VDC = 600V; VGE = 15V; IF = 15A; Tj =
125ºC
Fig. 20 – Typical Diode QRR
VDC = 600V; VGE = 15V; Tj = 125ºC
dIF/dt (A/µs) dIF/dt (A/µs)
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Fig. 21 – Typical Diode EREC vs. IF
Tj = 125ºC
Fig. 22 – Typical Capacitance vs. VCE
VGE = 0V; f = 1MHz
IF = (A) VCE = (V)
Fig. 23 – Typical Gate Charge vs. VGE
IC = 15A; L = 600µH; VCC = 600V
Fig. 24 – On state Voltage Drop characteristic
VFM vs IF tp = 400µs
QG = (nC) VFM = (V)
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PIIPM15P12D007 I27179 22 - Sep
Fig. 25 – Normalized Transient Thermal Impedance, Junction-to-copper plate (IGBTs)
t1, Rectangular Pulse Duration (sec)
Fig. 26 – Normalized Transient Impedance, Junction-to-copper plate (FRED diodes)
t1, Rectangular Pulse Duration (sec)
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PIIPM15P12D007 I27179 22 - Sep
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PIIPM15P12D007 I27179 22 - Sep
Fig. PD1 – Total Dissipated Power vs. fSW
IoutRMS = 2A, VDC = 530V, TC = 55ºC
Fig. PD2 – Total Dissipated Power vs. fSW
IoutRMS = 3A, VDC = 530V, TC = 55ºC
0
30
60
90
120
0 4 8 12 16 20
0
30
60
90
120
048121620
fSW = (kHz) fSW = (kHz)
Fig. PD3 – Total Dissipated Power vs. fSW
IoutRMS = 7A, VDC = 530V, TC = 55ºC
Fig. TF1 – Thermal Sensor Voltage
Feedback vs. Base-plate Temperature
fSW = (kHz) TC (ºC)
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PIIPM15P12D007 I27179 22 - Sep
PIIPM family part number identification
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PIIPM15P12D007 I27179 22 - Sep
Top board suggested footprint
(top view)
RS485 and JTAG Connectors
Top view
These connectors do not have any orientation tag; please check their Pin 1 position on Power Module Frame
Pins Mapping before inserting mate part.
Molex 53916-0204
mates with 54167-0208 or 52991-0208
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PIIPM15P12D007 I27179 22 - Sep
PIIPM15P12D007 case outline and dimensions
Data and specifications subject to change without notice
This product has been designed and qualified for Industrial Level.
Qualification Standards can be found on IR’s Web Site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 3252 7105
TAC Fax: (310) 252 7309
Visit us at www.irf.com for sales contact information 22 - Sep
Data and specifications subject to change without notice.
Sales Offices, Agents and Distributors in Major Cities Throughout the World.
© 2003 International Rectifier - Printed in Italy 09 - 22 - Rev. 3.1
