Advanced Power
Electronics Corp.
FEATURES DESCRIPTION
Ultra Low Dropout Voltage 200mV at 5A Output Current
Low ESR Output Capacitor (MLCC) Applicable
0.8V Reference Voltage
Fast Transient Response
Current Limit and Thermal Shutdown Protection
Adjustable Output Voltage by External Resistors
Power-on-Reset Monitoring on Both VCNTL and
VIN Pins
Under Voltage Protection
Power OK Output with a Delay Time
Internal Soft-Start
SOP-8 with Exposed Pad Package
RoHS Compliant & Halogen Free
Data and specifications subject to change without notice
20090831E
APE8955
TYPICAL APPLICATION
PACKAGE ORDERING INFORMATION
1
5A ULTRA LOW DROPOUT LINEAR REGULATOR
The APE8955 is a 5A ultra low dropout linear regulator.
The product is specifically designed to provide well supply
voltage for front side bus termination on motherboard and
NB applications. The IC needs two supply voltages, a
voltage for the circuitry and a main supply voltage for power
conversion, to reduce power dissipation and provide
extremely low dropout. The APE8955 integrates many
functions. A Power-on-Reset(POR) circuit monitors both
supply voltage to prevent wrong operations. A thermal
shutdown and current limit functions protect the device
against thermal and current over-load. A POK indicates the
output status with time delay which is set internally. It can
control other converter for power sequence. The APE8955
can be enabled by other power system. Pulling and holding
the EN pin below 0.4V shuts off the output.
The APE8955 is available in ESOP-8 package which
features small size as SO-8 and exposed pad to reduce the
j
unction-to-case resistance, being applicable in 2~3W
applications.
Figure 1. Output Capacitor with ESR > 20mΩ Figure 2. Output Capacitor is MLCC
VCNTL
6
POK
7
8EN
1GND
VIN
VOUT
VOUT
FB
5
4
3
2
APE8955
R3
1K
C1
1uF
VCNTL=5V
R1
1K
R2
2K
C6
12~48nF
C4
220uF
C5
0.1uF
C3
0.1uF
VIN=1.5V
VOUT=1.2V/5A
C2
100uF
VCNTL
6
POK
7
8EN
1GND
VIN
VOUT
VOUT
FB
5
4
3
2
APE8955
R3
1K
C1
1uF
VCNTL=5V
R1
39K
R2
78K
C4
30pF
C3
22uF
VIN=1.5V
VOUT=1.2V/5A
VOUT=VFB x (1+R1/R2)
VFB=0.8V
C2
22uF
R4
5.1-15Ω
Package Type
APE8955X - HF
Halogen Free
MP : ESOP-8
Advanced Power
Electronics Corp. APE8955
ABSOLUTE MAXIMUM RATINGS
VCNTL Supply Voltage(VCNTL) ……………………
-0.3 to 7 V
VIN Supply Voltage(VIN) …………………………… -0.3 to 3.3 V
EN and FB Pin Voltage ……………………………
-0.3 to VCNTL + 0.3V
Power Good Voltage(VPOK) ………………………
-0.3 to 7 V
Power Dissipation(PD) ……………………………
3 W
Storage Temperature Range(TST) ………………
-65°C To 150°C
Junction Temperature Range(TJ) ………………… -25°C To 150°C
Operating Temperature Range(TOP) ……………
-20°C To + 85°C
Thermal Resistance from Junction to Case(RthJC) 15°C/W
40°C/W
Note. RthJA is measured with the PCB copper area(need connect to Exposed pad) of approx. 1.5 in 2(multi-layers)
RECOMMENDED OPERATING CONDITIONS
VCNTL Supply Voltage(VCNTL) ……………………
+3.1 to 6 V
VIN Supply Voltage(VIN) …………………………… +1.1 to 3.3 V
Output Voltage(VOUT)V
CNTL=3.3V +0.8 to 1.2 V
VCNTL=5V +0.8 to VIN-0.2 V
Output Current(IOUT) ………………………………
+0 to 5 A
Junction Temperature Range(TJ) ………………… -25°C To 125°C
PACKAGE INFORMATION
ELECTRICAL SPECIFICATIONS
( VCNTL=5V, VIN=1.5V, VOUT=1.2V, TA=25, unless otherwise specified)
Parameter SYM TEST CONDITION MIN TYP MAX UNITS
VCNTL POR Threshold VCNTL 2.7 2.9 3.1 V
VCNTL POR Hysteresis VCNTL(hys) - 0.4 - V
VIN POR Threshold VIN 0.8 0.9 1.0 V
VIN POR Hysteresis VIN(hys) - 0.5 - V
VCNTL Nominal Supply Current ICNTL EN=VCNTL 0.4 1 2 mA
VCNTL Shutdown Current ISD EN=0V - 18 30 uA
Feedback Voltage VFB VCNTL=3.3 ~ 5V 0.784 0.8 0.816 V
Load Regulation IOUT = 0A ~ 5A - 0.06 0.3 %
Dropout Voltage VDROP IOUT = 5A, VCNTL=5V, TJ=25oC - 0.15 0.2 V
IOUT = 5A, VCNTL=5V, TJ=25~125oC - - 0.25 V
2
Thermal Resistance from Junction to Ambient(RthJA)
FB
VOUT
GND
VOUT
EN
VCNTL
POK
VIN
1
3
2
4
8
6
7
5
ESOP-8L (MP)
(Top View)
VIN
Advanced Power
Electronics Corp. APE8955
ELECTRICAL SPECIFICATIONS(Cont.)
Soft Start Time TSS
-2-ms
EN Pin Logic High Threshold
Voltage
EN Hysteresis -30-mV
EN Pin Pull-Up Current IEN EN=GND - 10 - uA
Current Limit ILIM VCNTL=3.3 ~ 5V, TJ=25oC689A
VCNTL=3.3 ~ 5V, TJ=-25~125oC6--A
Under Voltage Threshold VFB Falling - 0.4 - V
POK Threshold Voltage for Powe
OK VPOK VFB Rising 89% 92% 95% VFB
POK Threshold Voltage for Powe
Not OK VPNOK VFB Falling 78% 81% 84% VFB
POK Low Voltage POK Sinks 5mA - 0.25 0.4 V
POK Delay Time TDELAY 0.8 2 10 ms
Thermal Thutdown Temperature TSD - 150 - ºC
Thermal Thutdown Hysteresis -50 -ºC
PIN DESCRIPTIONS
PIN SYMBOL PIN DESCRIPTION
GND GND Pin
FB Feedback Pin
VOUT IC Power Supply Pin
EN H : Normal Operation ; L : Shutdown
POK Power OK Output Pin
VCNTL VCNTL Pin Input Voltage
VIN Input Voltage
3
VENH Enable 0.4 0.8 1.2 V
-+
VIN VOUT
GND
Error
Amp
EN
VCNTL
Soft-Start
And
Cont r ol Log ic
Power -ON
Reset
Current
Limit
Enable
Therm al
Shutdown
Bandgap
FB
-+
POK
Delay
POK
-+
UV
0.4V
90%
Vref
N-MOSFET
BLOCK DIAGRAM
Advanced Power
Electronics Corp. APE8955
FUNCTION PIN DESCRIPTION
FB
VOUT = 0.8 x (1 + R1/R2)
VIN and Exposed Pad
VCNTL
POK
EN
VOUT
FUNCTION DESCRIPTION
Power-On-Reset
Internal Soft-Start
Current Limit
4
Connecting this pin to an external resistor divider receives the feedback voltage of
the regulator. The output voltage set by the resistor divider is determined by:
Where R1 is connected from VOUT to FB with Kelvin sensing and R2 is connected
from FB to GND. A bypass capacitor may be connected with R1 in parallel to improve load
transient response. The recommended R2 and R1 are in the range of 1k~100kohm.
Main supply input pins for power conversions. The exposed pad provides a very low
impedance input path for the main supply voltage. Please tie the exposed pad and VIN Pin
(Pin 5) together to reduce the dropout voltage. The voltage at this pin is monitored for
Power-On Reset purpose.
Power input pin of the control circuitry. Connecting this pin to a +5V(recommended)
supply voltage provides the bias for the control circuitry. The voltage at this pin is monitored
for Power-On Reset purpose.
Power-OK signal output pin. This pin is an open-drain output used to indicate status
of output voltage by sensing FB voltage. This pin is pulled low when the rising FB voltage
is not above the VPOK threshold or the falling FB voltage is below the VPNOK threshold,
indicating the output is not OK.
Enable control pin. Pulling and holding this pin below 0.4V shuts down the output.
When re-enabled, the IC undergoes a new soft-start cycle. Left this pin open, an internal
current source 10uA pulls this pin up to VCNTL voltage, enabling the regulator.
Output of the regulator. Please connect Pin 3 and 4 together using wide tracks. It's
necessary to connect an output capacitor with this pin for closed-loop compensation and
im
p
rovin
g
transient res
p
onses.
Power-On-Reset (POR) circuit monitors both input voltages at VCNTL and VIN pins
to prevent wrong logic controls. The POR function initiates a soft-start process after the
two supply voltages exceed their rising POR threshold voltages during powering on. The
POR function also pulls low the POK pin regardless the output voltage when the VCNTL
voltage falls below it’s falling POR threshold.
An internal soft-start function controls rise rate of the output voltage to limit the
current surge at start-up. The typical soft-start interval is about 2ms.
The APE8955 monitors the current via the output NMOS and limits the maximum
current to prevent load and APE8955 from damage during overload or short circuit
Advanced Power
Electronics Corp. APE8955
FUNCTION DESCRIPTION(Cont.)
Output Voltage Regulation
Under Voltage Protection (UVP)
Thermal Shutdown
5
An error amplifier working with a temperature compensated 0.8V reference and
an output NMOS regulates output to the preset voltage. The error amplifier designed with
high bandwidth and DC gain provides very fast transient response and less load
regulation. It compares the reference with the feedback voltage and amplifies the
difference to drive the out
p
ut NMOS which
p
rovides load current from VIN to VOUT.
The APE8955 monitors the voltage on FB pin after soft-start process is finished.
Therefore the UVP is disabling during soft-start. When the voltage on FB pin falls
below the under-voltage threshold, the UVP circuit shuts off the output immediately.
After a while, the APE8955 starts a new soft-start to regulate output.
A thermal shutdown circuit limits the junction temperature of APE8955. When the
junction temperature exceeds +150°C, a thermal sensor turns off the output NMOS,
allowing the device to cool down. The regulator regulates the output again through
initiation of a new soft-start cycle after the junction temperature cools by 50°C, resulting
in a pulsed output during continuous thermal overload conditions.
Advanced Power
Electronics Corp. APE8955
TYPICAL PERFORMANCE CHARACTERISTICS
Ch1 : VOUT, 500mV/Div Time : 2ms/Div Ch1 : VIN, 1V/Div
Time : 1ms/Div
Ch2 : IOUT, 5A/Div Ch2 : VCNTL, 5V/Div
Ch3 : VPOK, 1V/Div
Ch4 : VOUT, 1V/Div
6
Current Limit EN Pin Floating Test
VCNTL Suppl y Curre nt vs. Tem pera ture
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
-40-250 255075100125
Temperature()
ICNTL(mA)
Reference Voltage vs. Temperature
0.784
0.789
0.794
0.799
0.804
0.809
0.814
-40-250 255075100125
Temperature()
VFB(V)
Curre nt Lim it vs. Tem pera ture
6.1
6.2
6.3
6.4
6.5
6.6
6.7
-40-250 255075100125
Tempera ture ()
Current Limit (A)
Dropout Vol ta ge vs. Output Curre nt
0
20
40
60
80
100
120
140
160
180
012345
IOUT(A)
Dropout Voltage (mV)
125
100
75
50
25
0
-25
-40
I
OUT
V
OUT
V
IN
V
CNTL
V
POK
V
OUT
Advanced Power
Electronics Corp. APE8955
TYPICAL PERFORMANCE CHARACTERISTICS
Ch1 : VIN, 1V/Div Time : 10ms/Div Ch1 : VIN, 1V/Div Time : 10ms/Div
Ch2 : VOUT, 1V/Div Ch2 : VOUT, 1V/Div
Ch3 : VPOK, 1V/Div Ch3 : VPOK, 1V/Div
Ch4 : VCNTL, 2V/Div Ch4 : VCNTL, 2V/Div
Ch1 : VEN, 5V/Div Time : 1ms/Div Ch1 : VEN, 5V/Div Time : 1ms/Div
Ch2 : VOUT, 1V/Div Ch2 : VOUT, 1V/Div
Ch3 : IOUT, 1A/Div Ch3 : IOUT, 1A/Div
Ch4 : VPOK, 1V/Div Ch4 : VPOK, 1V/Div
Ch1 : VIN, 1V/Div Time : 500us/Div Ch1 : VOUT, 20mV/Div Time : 100us/Div
Ch2 : VCNTL, 5V/Div Ch2 : IOUT, 2A/Div
Ch3 : VPOK, 1V/Div
Ch4 : VOUT, 1V/Div
7
Power ON Sequence Power OFF Sequence
Enable Sequence Shutdown Sequence
POK Delay Load Transient Response
V
EN
V
OUT
I
OUT
V
POK
V
EN
V
OUT
I
OUT
V
POK
V
OUT
V
POK
V
CNTL
V
IN
POK Delay
V
OUT
I
OUT
V
OUT
V
IN
V
POK
V
CNTL
V
IN
V
OUT
V
POK
V
CNTL
Package Outline : ESOP-8
Millimeters
SYMBOLS MIN NOM MAX
A 5.80 6.00 6.20
B 4.80 4.90 5.00
C 3.80 3.90 4.00
D 0°4°8°
E 0.40 0.65 0.90
F 0.19 0.22 0.25
M 0.00 0.08 0.15
0.35 0.42 0.49
L 1.35 1.55 1.75
J
K
G
P 3.15 3.25 3.35
Q 2.25 2.35 2.45
1.All Dimension Are In Millimeters.
2.Dimension Does Not Include Mold Protrusions.
Part Marking Information & Packing : ESOP-8
1.27 TYP.
H
ADVANCED POWER ELECTRONICS CORP.
0.375 REF.
45°
J
L
8955MP
YWWSSS
Package Code
Part Numbe
r
Date Code (YWWSSS)
YLast Digit Of The Year
WWWeek
SSSSequence
B
A2
I
P
Q
8