Philips Semiconductors Application note
AN2021
Thermal considerations
for FAST logic products
1995 Mar 13 2
INTRODUCTION
Thermal considerations by both supplier and user require more
attention as package sizes shrink and operating frequencies
increase. This is because an increase in junction temperature (Tj)
can adversely affect the long term operating life of an IC. Some of
the variables that affect Tj are controlled by the IC manufacturer
while others are controlled by the system designer.
With increasingly frequent use of Surface Mount Device (SMD)
technology, management of thermal characteristics becomes a
growing concern. Not only are the SMD packages much smaller, but
the thermal energy is concentrated more densely on the printed
circuit board.
FAST PRODUCTS IN SSOP PACKAGE
The FAST product family is a high performance Bipolar Logic
Family. In the SMD packages, such as SSOP, it is necessary to
estimate operating junction temperatures of the FAST products in
the system environment. The information provided herein should
assist the system designer with thermal management
considerations.
POWER DISSIPATION
The power dissipation equations, definition of terms and the
assumptions made in estimating power dissipation are shown below.
The total power is the sum of the static power and dynamic power.
Ptotal = Pstatic + Pdynamic.
The equation for static power dissipation is,
Pstat = (VCC × ICC)
but since ICCH, ICCL and ICCZ are different values, the equation
becomes,
Pstat = VCC[DCen (NH × ICCH/NT+NL×ICCL/NT)+(1-DCen)ICCZ]
where: DCen = % duty cycle enabled
NH = number of outputs in high state
NL= number of outputs in low state
NT= total number of outputs.
The equation for the dynamic power dissipation is,
Pdyn = [DCen x Nsw x VCC x f1 x (VOH – VOL) x CL]
+[DCen × Nsw × VCC × f2 × (ma/MHZ/bit)] × 10-3
where: DCen = % duty cycle enabled
Nsw = total number of outputs switching
f1 = operating frequency (in Hz)
f2 = operating frequency (in MHz)
CL= external load capacitance (in F)
mA/MHz/bit = slope of the ICC vs frequency curve.
Thermal Resistance (ja)
The ability of a package to conduct heat from the IC chip inside the
package to the environment is expressed in terms of “thermal
resistance”. It is measured in degrees Centigrade per watt of power
dissipated by the chip. Table 1 lists some thermal resistance values
for selected FAST products in SSOP packages. The values listed
were measured in still air with no traces attached (worst case
environment).
Table 1. FAST Products in SSOP Package
PRODUCT PIN
COUNT ja mA/MHz/bit (unloaded)
74F245 20 125 0.158
74F244 20 127 0.125
74F2244 20 127 0.045
74F373 20 125 0.158
74F374 20 125 0.102
74F543 24 118 0.512*
74F827 24 121 0.125
74F240 20 124 0.275
74F299 20 121 0.183
74F533 20 124 0.129
74F657 24 113 0.202
* The 74F543 ICC vs Frequency slope increases above 20 MHz. From 20 MHz to 30 MHz, slope = 1.64. From 30 MHz to 40 MHz, slope = 2.55.
Philips Semiconductors Application note
AN2021
Thermal considerations
for FAST logic products
1995 Mar 13 3
FACTORS AFFECTING ja
For a given package and lead frame, some factors which affect the
thermal resistance (ja) in the application include (1) the die size of
the IC chip, (2) the length of the printed circuit board traces attached
to IC package on the system board and (3) the amount of airflow
across the package.
Figure 1 through Figure 7 provide ja information for the 20 and 24
pin packages as a function of die size, airflow and trace length.
A SAMPLE CALCULATION
An example for the 74F244. Junction temperature is estimated from
the equation:
Tj=(ja x P total) + Tamb
Ptotal=P
stat + Pdyn
Assuming the number of outputs High = 4, VCC at 5.25V, the enable
duty cycle (DCen) = 50%, and worst case ICC’s (ICCL = 90 mA, ICCH
= 60 mA, ICCZ = 90 mA) the static power calculation is:
Pstat = (5.25){(0.50)[(4)(0.060)/8 + (4)(0.090)/8] +
(1–0.50)(0.090)}
= (5.25)[(0.0150) + (0.0225) + (0.045)]
= 0.433 watts
Assuming the following,
DCen= 50% NSW =4
f1 = 25 x 106 Hz VCC = 5.25V
f2 = 25 MHz ma/MHz/bit= 0.26
CL= 50 pf (50 x 10-12F) VOH = 3.4V
VOL = 0.4V
the Pdyn becomes:
Pdyn = [(50%)(4)(5.25)(25x106)(3.4–0.4)(50x10-12)] +
[(50%)(4)(5.25)(25)(0.26)](10-3)
= (0.0394) + (0.0682)
= 0.108 watts
Ptotal= 0.433 + 0.108 = 0.541 watts
The junction temperature estimation then becomes:
Tj= (127)(0.541) + Tamb
= 69 + Tamb
If the system ambient temperature is 55°C, then
Tj= 69 + 55 = 124 °C.
With the junction temperature of a device established for a given
system environment the expected operating life of the IC can be
determined from the graph in Figure 6.
SYSTEM CONSIDERATIONS
The manner in which an IC package is mounted and positioned in its
surrounding environment will have significant effects on operating
junction temperatures. These conditions are under the control of the
system designer and are worthy of serious consideration in the PC
board layout and system ventilation and airflow features.
Forced-air cooling will significantly reduce thermal resistance.
Package mounting can affect thermal resistance. Surface mount
packages dissipate significant amounts of heat through the leads
that attach to the traces. T race length is another significant factor.
Thermally conductive adhesive under the surface mount packages
can lower thermal resistance by providing a direct heat path from the
package to the board.
Philips Semiconductors Application note
AN2021
Thermal considerations
for FAST logic products
1995 Mar 13 4
SSOP20 ja vs Die Size
100
110
120
130
140
150
90
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Die Size (sq. mm)
ja ( C/W)
°
Test Conditions
Test Ambient – Still Air
Power Dissipation – 0.70 W att
– Philips Semiconductors SVL
Test Fixture – SSOP Thermal Test Board
– (40.0x19.0x1.6mm)
Accuracy – 15%
10/94
SF00650
Figure 1.
Philips Semiconductors Application note
AN2021
Thermal considerations
for FAST logic products
1995 Mar 13 5
SSOP20 ja vs Airflow
–25
–20
–15
–10
–5
0
–30
0 200 400 600 800 1000
Airflow (LFPM)
Test Conditions
Test Ambient – 200, 400, 800 LFPM Airflow
Power Dissipation – 0.7 W att
Test Fixture – Philips Semiconductors SVL
SSOP Thermal Test Board
(40.0x19.0x1.6mm)
Accuracy – 15%
10/94
Percent Change in ja
SF00651
Figure 2.
Philips Semiconductors Application note
AN2021
Thermal considerations
for FAST logic products
1995 Mar 13 6
SSOP24 ja vs Die Size
90
100
110
120
130
140
80
02468101214
Die Size (sq. mm)
ja ( C/W)
°
8/94
70
60
16 18 20
Test Conditions
Test Ambient – Still Air
Power Dissipation – 0.70 W att
Test Fixture – Philips Semiconductors SVL
SSOP Thermal Test Board
(40.0x19.0x1.6mm)
Accuracy – 15%
SF00652
2.7mm x 3.5mm PAD
3.85mm x 4.5mm PAD
Figure 3.
Philips Semiconductors Application note
AN2021
Thermal considerations
for FAST logic products
1995 Mar 13 7
SSOP24 ja vs Airflow
90
100
110
120
80
100 200 300 400 500 600 700 800
Airflow (LFPM)
ja ( C/W)
°
8/94
70
60
900
Test Conditions
Test Ambient – 200, 400, 800 LFPM airflow
Power Dissipation – 0.70 W att
Test Fixture – Philips Semiconductors SVL
SSOP Thermal Test Board
(40.0x19.0x1.6mm)
Accuracy – 15%
2.7mm x 3.5mm PAD
3.85mm x 4.5mm PAD
SF00653
Figure 4.
Philips Semiconductors Application note
AN2021
Thermal considerations
for FAST logic products
1995 Mar 13 8
Effect of Trace Length on ja
–15
–10
–5
0
+5
+10
–20
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
A verage Trace Length (Inches)
ja ( C/W)
°
Test Conditions
Die Size – 18,445 sq. mils
Power Dissipation – 1.0 W att
Test Ambient – Still Air
Test Board – Philips PCB
(2.24” x 2.24” x 0.062”)
Traces 27 mil wide
1 oz. soft copper
10/94
–25
–30
% CHANGE IN
SF00654
Figure 5.
Philips Semiconductors Application note
AN2021
Thermal considerations
for FAST logic products
1995 Mar 13 9
FAST IN SSOP – ESTIMATED ONSET TO FAILURE (0.1% CUMULATIVE)
Junction temperature ( C)
Operating Lifetime (hr)
1 year = 8760 Hrs.
190
180
170
160
150
140
130
120
110
100
90
80 1000 10000 100000 1000000
Maximum Safe Junction Temperature
= 1 50°C (Per Data Book)
Molding Compound Characteristics
Activation Energy Ea = 1.54 ev
°
SF00655
Figure 6.
