1/11April 2002
.
STP75NF75L
STB75NF75L STB75NF75L-1
N-CHANNEL 75V - 0.009 Ω-75AD
2
PAK/I2PAK/TO-220
STripFETII POWER MOSFET
■TYPICAL RDS(on) = 0.009Ω
■EXCEPTIONAL dv/dt CAPABILITY
■100% AVALANCHE TESTED
■LOW THRESHOLD DRIVE
DESCRIPTION
This MOSFET series realized with STMicroelectronics
unique STripFET process has specifically been designed
to minimize input capacitance and gate charge. It is
therefore suitable as primary switch in advanced high-
efficiency, high-frequency isolated DC-DC converters for
Telecom and Computer applications. It is also intended
for any applications with low gate drive requirements.
APPLICATIONS
■SOLENOID AND RELAY DRIVERS
■DC MOTOR CONTROL
■DC-DC CONVERTERS
■AUTOMOTIVE ENVIRONMENT
TYPE VDSS RDS(on) ID
STB75NF75L/-1
STP75NF75L 75 V
75 V <0.011 Ω
<0.011 Ω75 A
75 A
123
13123
TO-220
D2PAK
TO-263
I2PAK
TO-262
ABSOLUTE MAXIMUM RATINGS
(•) Current limited by package
(••) Pulse width limitedby safe operating area. (1) ISD ≤
75A, di/dt ≤
500A/µs, VDD ≤V(BR)DSS,T
j≤T
JMAX.
(2) Starting Tj=25o
C, ID= 37.5A, VDD = 30V
Symbol Parameter Value Unit
VDS Drain-source Voltage (VGS =0) 75 V
VDGR Drain-gate Voltage (RGS =20kΩ)75 V
VGS Gate- source Voltage ±15 V
ID(•)Drain Current (continuous) at TC=25°C75 A
IDDrain Current (continuous) at TC= 100°C70 A
IDM(••)Drain Current (pulsed) 300 A
Ptot Total Dissipation at TC=25°C300W
Derating Factor 2 W/°C
dv/dt (1) Peak Diode Recovery voltage slope 20 V/ns
EAS (2) Single Pulse Avalanche Energy 680 mJ
Tstg Storage Temperature -55 to 175 °C
TjMax. Operating Junction Temperature
INTERNAL SCHEMATIC DIAGRAM